drm/exynos: Stop using drm_framebuffer_unregister_private
[linux/fpc-iii.git] / drivers / gpu / drm / sun4i / sun4i_backend.h
blob83e63cc702b412e2c0035d4dcd9b7ba27c9395ad
1 /*
2 * Copyright (C) 2015 Free Electrons
3 * Copyright (C) 2015 NextThing Co
5 * Maxime Ripard <maxime.ripard@free-electrons.com>
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
13 #ifndef _SUN4I_BACKEND_H_
14 #define _SUN4I_BACKEND_H_
16 #include <linux/clk.h>
17 #include <linux/regmap.h>
18 #include <linux/reset.h>
20 #define SUN4I_BACKEND_MODCTL_REG 0x800
21 #define SUN4I_BACKEND_MODCTL_LINE_SEL BIT(29)
22 #define SUN4I_BACKEND_MODCTL_ITLMOD_EN BIT(28)
23 #define SUN4I_BACKEND_MODCTL_OUT_SEL GENMASK(22, 20)
24 #define SUN4I_BACKEND_MODCTL_OUT_LCD (0 << 20)
25 #define SUN4I_BACKEND_MODCTL_OUT_FE0 (6 << 20)
26 #define SUN4I_BACKEND_MODCTL_OUT_FE1 (7 << 20)
27 #define SUN4I_BACKEND_MODCTL_HWC_EN BIT(16)
28 #define SUN4I_BACKEND_MODCTL_LAY_EN(l) BIT(8 + l)
29 #define SUN4I_BACKEND_MODCTL_OCSC_EN BIT(5)
30 #define SUN4I_BACKEND_MODCTL_DFLK_EN BIT(4)
31 #define SUN4I_BACKEND_MODCTL_DLP_START_CTL BIT(2)
32 #define SUN4I_BACKEND_MODCTL_START_CTL BIT(1)
33 #define SUN4I_BACKEND_MODCTL_DEBE_EN BIT(0)
35 #define SUN4I_BACKEND_BACKCOLOR_REG 0x804
36 #define SUN4I_BACKEND_BACKCOLOR(r, g, b) (((r) << 16) | ((g) << 8) | (b))
38 #define SUN4I_BACKEND_DISSIZE_REG 0x808
39 #define SUN4I_BACKEND_DISSIZE(w, h) (((((h) - 1) & 0xffff) << 16) | \
40 (((w) - 1) & 0xffff))
42 #define SUN4I_BACKEND_LAYSIZE_REG(l) (0x810 + (0x4 * (l)))
43 #define SUN4I_BACKEND_LAYSIZE(w, h) (((((h) - 1) & 0x1fff) << 16) | \
44 (((w) - 1) & 0x1fff))
46 #define SUN4I_BACKEND_LAYCOOR_REG(l) (0x820 + (0x4 * (l)))
47 #define SUN4I_BACKEND_LAYCOOR(x, y) ((((u32)(y) & 0xffff) << 16) | \
48 ((u32)(x) & 0xffff))
50 #define SUN4I_BACKEND_LAYLINEWIDTH_REG(l) (0x840 + (0x4 * (l)))
52 #define SUN4I_BACKEND_LAYFB_L32ADD_REG(l) (0x850 + (0x4 * (l)))
54 #define SUN4I_BACKEND_LAYFB_H4ADD_REG 0x860
55 #define SUN4I_BACKEND_LAYFB_H4ADD_MSK(l) GENMASK(3 + ((l) * 8), (l) * 8)
56 #define SUN4I_BACKEND_LAYFB_H4ADD(l, val) ((val) << ((l) * 8))
58 #define SUN4I_BACKEND_REGBUFFCTL_REG 0x870
59 #define SUN4I_BACKEND_REGBUFFCTL_AUTOLOAD_DIS BIT(1)
60 #define SUN4I_BACKEND_REGBUFFCTL_LOADCTL BIT(0)
62 #define SUN4I_BACKEND_CKMAX_REG 0x880
63 #define SUN4I_BACKEND_CKMIN_REG 0x884
64 #define SUN4I_BACKEND_CKCFG_REG 0x888
65 #define SUN4I_BACKEND_ATTCTL_REG0(l) (0x890 + (0x4 * (l)))
66 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL_MASK BIT(15)
67 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PIPESEL(x) ((x) << 15)
68 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL_MASK GENMASK(11, 10)
69 #define SUN4I_BACKEND_ATTCTL_REG0_LAY_PRISEL(x) ((x) << 10)
71 #define SUN4I_BACKEND_ATTCTL_REG1(l) (0x8a0 + (0x4 * (l)))
72 #define SUN4I_BACKEND_ATTCTL_REG1_LAY_HSCAFCT GENMASK(15, 14)
73 #define SUN4I_BACKEND_ATTCTL_REG1_LAY_WSCAFCT GENMASK(13, 12)
74 #define SUN4I_BACKEND_ATTCTL_REG1_LAY_FBFMT GENMASK(11, 8)
75 #define SUN4I_BACKEND_LAY_FBFMT_1BPP (0 << 8)
76 #define SUN4I_BACKEND_LAY_FBFMT_2BPP (1 << 8)
77 #define SUN4I_BACKEND_LAY_FBFMT_4BPP (2 << 8)
78 #define SUN4I_BACKEND_LAY_FBFMT_8BPP (3 << 8)
79 #define SUN4I_BACKEND_LAY_FBFMT_RGB655 (4 << 8)
80 #define SUN4I_BACKEND_LAY_FBFMT_RGB565 (5 << 8)
81 #define SUN4I_BACKEND_LAY_FBFMT_RGB556 (6 << 8)
82 #define SUN4I_BACKEND_LAY_FBFMT_ARGB1555 (7 << 8)
83 #define SUN4I_BACKEND_LAY_FBFMT_RGBA5551 (8 << 8)
84 #define SUN4I_BACKEND_LAY_FBFMT_XRGB8888 (9 << 8)
85 #define SUN4I_BACKEND_LAY_FBFMT_ARGB8888 (10 << 8)
86 #define SUN4I_BACKEND_LAY_FBFMT_RGB888 (11 << 8)
87 #define SUN4I_BACKEND_LAY_FBFMT_ARGB4444 (12 << 8)
88 #define SUN4I_BACKEND_LAY_FBFMT_RGBA4444 (13 << 8)
90 #define SUN4I_BACKEND_DLCDPCTL_REG 0x8b0
91 #define SUN4I_BACKEND_DLCDPFRMBUF_ADDRCTL_REG 0x8b4
92 #define SUN4I_BACKEND_DLCDPCOOR_REG0 0x8b8
93 #define SUN4I_BACKEND_DLCDPCOOR_REG1 0x8bc
95 #define SUN4I_BACKEND_INT_EN_REG 0x8c0
96 #define SUN4I_BACKEND_INT_FLAG_REG 0x8c4
97 #define SUN4I_BACKEND_REG_LOAD_FINISHED BIT(1)
99 #define SUN4I_BACKEND_HWCCTL_REG 0x8d8
100 #define SUN4I_BACKEND_HWCFBCTL_REG 0x8e0
101 #define SUN4I_BACKEND_WBCTL_REG 0x8f0
102 #define SUN4I_BACKEND_WBADD_REG 0x8f4
103 #define SUN4I_BACKEND_WBLINEWIDTH_REG 0x8f8
104 #define SUN4I_BACKEND_SPREN_REG 0x900
105 #define SUN4I_BACKEND_SPRFMTCTL_REG 0x908
106 #define SUN4I_BACKEND_SPRALPHACTL_REG 0x90c
107 #define SUN4I_BACKEND_IYUVCTL_REG 0x920
108 #define SUN4I_BACKEND_IYUVADD_REG(c) (0x930 + (0x4 * (c)))
109 #define SUN4I_BACKEND_IYUVLINEWITDTH_REG(c) (0x940 + (0x4 * (c)))
110 #define SUN4I_BACKEND_YGCOEF_REG(c) (0x950 + (0x4 * (c)))
111 #define SUN4I_BACKEND_YGCONS_REG 0x95c
112 #define SUN4I_BACKEND_URCOEF_REG(c) (0x960 + (0x4 * (c)))
113 #define SUN4I_BACKEND_URCONS_REG 0x96c
114 #define SUN4I_BACKEND_VBCOEF_REG(c) (0x970 + (0x4 * (c)))
115 #define SUN4I_BACKEND_VBCONS_REG 0x97c
116 #define SUN4I_BACKEND_KSCTL_REG 0x980
117 #define SUN4I_BACKEND_KSBKCOLOR_REG 0x984
118 #define SUN4I_BACKEND_KSFSTLINEWIDTH_REG 0x988
119 #define SUN4I_BACKEND_KSVSCAFCT_REG 0x98c
120 #define SUN4I_BACKEND_KSHSCACOEF_REG(x) (0x9a0 + (0x4 * (x)))
121 #define SUN4I_BACKEND_OCCTL_REG 0x9c0
122 #define SUN4I_BACKEND_OCCTL_ENABLE BIT(0)
124 #define SUN4I_BACKEND_OCRCOEF_REG(x) (0x9d0 + (0x4 * (x)))
125 #define SUN4I_BACKEND_OCRCONS_REG 0x9dc
126 #define SUN4I_BACKEND_OCGCOEF_REG(x) (0x9e0 + (0x4 * (x)))
127 #define SUN4I_BACKEND_OCGCONS_REG 0x9ec
128 #define SUN4I_BACKEND_OCBCOEF_REG(x) (0x9f0 + (0x4 * (x)))
129 #define SUN4I_BACKEND_OCBCONS_REG 0x9fc
130 #define SUN4I_BACKEND_SPRCOORCTL_REG(s) (0xa00 + (0x4 * (s)))
131 #define SUN4I_BACKEND_SPRATTCTL_REG(s) (0xb00 + (0x4 * (s)))
132 #define SUN4I_BACKEND_SPRADD_REG(s) (0xc00 + (0x4 * (s)))
133 #define SUN4I_BACKEND_SPRLINEWIDTH_REG(s) (0xd00 + (0x4 * (s)))
135 #define SUN4I_BACKEND_SPRPALTAB_OFF 0x4000
136 #define SUN4I_BACKEND_GAMMATAB_OFF 0x4400
137 #define SUN4I_BACKEND_HWCPATTERN_OFF 0x4800
138 #define SUN4I_BACKEND_HWCCOLORTAB_OFF 0x4c00
139 #define SUN4I_BACKEND_PIPE_OFF(p) (0x5000 + (0x400 * (p)))
141 struct sun4i_backend {
142 struct regmap *regs;
144 struct reset_control *reset;
146 struct clk *bus_clk;
147 struct clk *mod_clk;
148 struct clk *ram_clk;
150 struct clk *sat_clk;
151 struct reset_control *sat_reset;
154 void sun4i_backend_apply_color_correction(struct sun4i_backend *backend);
155 void sun4i_backend_disable_color_correction(struct sun4i_backend *backend);
157 void sun4i_backend_commit(struct sun4i_backend *backend);
159 void sun4i_backend_layer_enable(struct sun4i_backend *backend,
160 int layer, bool enable);
161 int sun4i_backend_update_layer_coord(struct sun4i_backend *backend,
162 int layer, struct drm_plane *plane);
163 int sun4i_backend_update_layer_formats(struct sun4i_backend *backend,
164 int layer, struct drm_plane *plane);
165 int sun4i_backend_update_layer_buffer(struct sun4i_backend *backend,
166 int layer, struct drm_plane *plane);
168 #endif /* _SUN4I_BACKEND_H_ */