drivers/gpu/drm/tilcdc/tilcdc_drv.c

   1 /*
   2  * Copyright (C) 2012 Texas Instruments
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 /* LCDC DRM driver, based on da8xx-fb */
  19
  20 #include <linux/component.h>
  21 #include <linux/pinctrl/consumer.h>
  22 #include <linux/suspend.h>
  23 #include <drm/drm_atomic.h>
  24 #include <drm/drm_atomic_helper.h>
  25
  26 #include "tilcdc_drv.h"
  27 #include "tilcdc_regs.h"
  28 #include "tilcdc_tfp410.h"
  29 #include "tilcdc_panel.h"
  30 #include "tilcdc_external.h"
  31
  32 #include "drm_fb_helper.h"
  33
  34 static LIST_HEAD(module_list);
  35
  36 static const u32 tilcdc_rev1_formats[] = { DRM_FORMAT_RGB565 };
  37
  38 static const u32 tilcdc_straight_formats[] = { DRM_FORMAT_RGB565,
  39                                                DRM_FORMAT_BGR888,
  40                                                DRM_FORMAT_XBGR8888 };
  41
  42 static const u32 tilcdc_crossed_formats[] = { DRM_FORMAT_BGR565,
  43                                               DRM_FORMAT_RGB888,
  44                                               DRM_FORMAT_XRGB8888 };
  45
  46 static const u32 tilcdc_legacy_formats[] = { DRM_FORMAT_RGB565,
  47                                              DRM_FORMAT_RGB888,
  48                                              DRM_FORMAT_XRGB8888 };
  49
  50 void tilcdc_module_init(struct tilcdc_module *mod, const char *name,
  51                 const struct tilcdc_module_ops *funcs)
  52 {
  53         mod->name = name;
  54         mod->funcs = funcs;
  55         INIT_LIST_HEAD(&mod->list);
  56         list_add(&mod->list, &module_list);
  57 }
  58
  59 void tilcdc_module_cleanup(struct tilcdc_module *mod)
  60 {
  61         list_del(&mod->list);
  62 }
  63
  64 static struct of_device_id tilcdc_of_match[];
  65
  66 static struct drm_framebuffer *tilcdc_fb_create(struct drm_device *dev,
  67                 struct drm_file *file_priv, const struct drm_mode_fb_cmd2 *mode_cmd)
  68 {
  69         return drm_fb_cma_create(dev, file_priv, mode_cmd);
  70 }
  71
  72 static void tilcdc_fb_output_poll_changed(struct drm_device *dev)
  73 {
  74         struct tilcdc_drm_private *priv = dev->dev_private;
  75         drm_fbdev_cma_hotplug_event(priv->fbdev);
  76 }
  77
  78 static int tilcdc_atomic_check(struct drm_device *dev,
  79                                struct drm_atomic_state *state)
  80 {
  81         int ret;
  82
  83         ret = drm_atomic_helper_check_modeset(dev, state);
  84         if (ret)
  85                 return ret;
  86
  87         ret = drm_atomic_helper_check_planes(dev, state);
  88         if (ret)
  89                 return ret;
  90
  91         /*
  92          * tilcdc ->atomic_check can update ->mode_changed if pixel format
  93          * changes, hence will we check modeset changes again.
  94          */
  95         ret = drm_atomic_helper_check_modeset(dev, state);
  96         if (ret)
  97                 return ret;
  98
  99         return ret;
 100 }
 101
 102 static int tilcdc_commit(struct drm_device *dev,
 103                   struct drm_atomic_state *state,
 104                   bool async)
 105 {
 106         int ret;
 107
 108         ret = drm_atomic_helper_prepare_planes(dev, state);
 109         if (ret)
 110                 return ret;
 111
 112         drm_atomic_helper_swap_state(state, true);
 113
 114         /*
 115          * Everything below can be run asynchronously without the need to grab
 116          * any modeset locks at all under one condition: It must be guaranteed
 117          * that the asynchronous work has either been cancelled (if the driver
 118          * supports it, which at least requires that the framebuffers get
 119          * cleaned up with drm_atomic_helper_cleanup_planes()) or completed
 120          * before the new state gets committed on the software side with
 121          * drm_atomic_helper_swap_state().
 122          *
 123          * This scheme allows new atomic state updates to be prepared and
 124          * checked in parallel to the asynchronous completion of the previous
 125          * update. Which is important since compositors need to figure out the
 126          * composition of the next frame right after having submitted the
 127          * current layout.
 128          */
 129
 130         drm_atomic_helper_commit_modeset_disables(dev, state);
 131
 132         drm_atomic_helper_commit_planes(dev, state, 0);
 133
 134         drm_atomic_helper_commit_modeset_enables(dev, state);
 135
 136         drm_atomic_helper_wait_for_vblanks(dev, state);
 137
 138         drm_atomic_helper_cleanup_planes(dev, state);
 139
 140         return 0;
 141 }
 142
 143 static const struct drm_mode_config_funcs mode_config_funcs = {
 144         .fb_create = tilcdc_fb_create,
 145         .output_poll_changed = tilcdc_fb_output_poll_changed,
 146         .atomic_check = tilcdc_atomic_check,
 147         .atomic_commit = tilcdc_commit,
 148 };
 149
 150 static void modeset_init(struct drm_device *dev)
 151 {
 152         struct tilcdc_drm_private *priv = dev->dev_private;
 153         struct tilcdc_module *mod;
 154
 155         list_for_each_entry(mod, &module_list, list) {
 156                 DBG("loading module: %s", mod->name);
 157                 mod->funcs->modeset_init(mod, dev);
 158         }
 159
 160         dev->mode_config.min_width = 0;
 161         dev->mode_config.min_height = 0;
 162         dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc);
 163         dev->mode_config.max_height = 2048;
 164         dev->mode_config.funcs = &mode_config_funcs;
 165 }
 166
 167 #ifdef CONFIG_CPU_FREQ
 168 static int cpufreq_transition(struct notifier_block *nb,
 169                                      unsigned long val, void *data)
 170 {
 171         struct tilcdc_drm_private *priv = container_of(nb,
 172                         struct tilcdc_drm_private, freq_transition);
 173
 174         if (val == CPUFREQ_POSTCHANGE)
 175                 tilcdc_crtc_update_clk(priv->crtc);
 176
 177         return 0;
 178 }
 179 #endif
 180
 181 /*
 182  * DRM operations:
 183  */
 184
 185 static void tilcdc_fini(struct drm_device *dev)
 186 {
 187         struct tilcdc_drm_private *priv = dev->dev_private;
 188
 189         if (priv->crtc)
 190                 tilcdc_crtc_shutdown(priv->crtc);
 191
 192         if (priv->is_registered)
 193                 drm_dev_unregister(dev);
 194
 195         drm_kms_helper_poll_fini(dev);
 196
 197         if (priv->fbdev)
 198                 drm_fbdev_cma_fini(priv->fbdev);
 199
 200         drm_irq_uninstall(dev);
 201         drm_mode_config_cleanup(dev);
 202         tilcdc_remove_external_device(dev);
 203
 204 #ifdef CONFIG_CPU_FREQ
 205         if (priv->freq_transition.notifier_call)
 206                 cpufreq_unregister_notifier(&priv->freq_transition,
 207                                             CPUFREQ_TRANSITION_NOTIFIER);
 208 #endif
 209
 210         if (priv->clk)
 211                 clk_put(priv->clk);
 212
 213         if (priv->mmio)
 214                 iounmap(priv->mmio);
 215
 216         if (priv->wq) {
 217                 flush_workqueue(priv->wq);
 218                 destroy_workqueue(priv->wq);
 219         }
 220
 221         dev->dev_private = NULL;
 222
 223         pm_runtime_disable(dev->dev);
 224
 225         drm_dev_unref(dev);
 226 }
 227
 228 static int tilcdc_init(struct drm_driver *ddrv, struct device *dev)
 229 {
 230         struct drm_device *ddev;
 231         struct platform_device *pdev = to_platform_device(dev);
 232         struct device_node *node = dev->of_node;
 233         struct tilcdc_drm_private *priv;
 234         struct resource *res;
 235         u32 bpp = 0;
 236         int ret;
 237
 238         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 239         if (!priv) {
 240                 dev_err(dev, "failed to allocate private data\n");
 241                 return -ENOMEM;
 242         }
 243
 244         ddev = drm_dev_alloc(ddrv, dev);
 245         if (IS_ERR(ddev))
 246                 return PTR_ERR(ddev);
 247
 248         ddev->platformdev = pdev;
 249         ddev->dev_private = priv;
 250         platform_set_drvdata(pdev, ddev);
 251         drm_mode_config_init(ddev);
 252
 253         priv->is_componentized =
 254                 tilcdc_get_external_components(dev, NULL) > 0;
 255
 256         priv->wq = alloc_ordered_workqueue("tilcdc", 0);
 257         if (!priv->wq) {
 258                 ret = -ENOMEM;
 259                 goto init_failed;
 260         }
 261
 262         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 263         if (!res) {
 264                 dev_err(dev, "failed to get memory resource\n");
 265                 ret = -EINVAL;
 266                 goto init_failed;
 267         }
 268
 269         priv->mmio = ioremap_nocache(res->start, resource_size(res));
 270         if (!priv->mmio) {
 271                 dev_err(dev, "failed to ioremap\n");
 272                 ret = -ENOMEM;
 273                 goto init_failed;
 274         }
 275
 276         priv->clk = clk_get(dev, "fck");
 277         if (IS_ERR(priv->clk)) {
 278                 dev_err(dev, "failed to get functional clock\n");
 279                 ret = -ENODEV;
 280                 goto init_failed;
 281         }
 282
 283 #ifdef CONFIG_CPU_FREQ
 284         priv->freq_transition.notifier_call = cpufreq_transition;
 285         ret = cpufreq_register_notifier(&priv->freq_transition,
 286                         CPUFREQ_TRANSITION_NOTIFIER);
 287         if (ret) {
 288                 dev_err(dev, "failed to register cpufreq notifier\n");
 289                 priv->freq_transition.notifier_call = NULL;
 290                 goto init_failed;
 291         }
 292 #endif
 293
 294         if (of_property_read_u32(node, "max-bandwidth", &priv->max_bandwidth))
 295                 priv->max_bandwidth = TILCDC_DEFAULT_MAX_BANDWIDTH;
 296
 297         DBG("Maximum Bandwidth Value %d", priv->max_bandwidth);
 298
 299         if (of_property_read_u32(node, "max-width", &priv->max_width))
 300                 priv->max_width = TILCDC_DEFAULT_MAX_WIDTH;
 301
 302         DBG("Maximum Horizontal Pixel Width Value %dpixels", priv->max_width);
 303
 304         if (of_property_read_u32(node, "max-pixelclock",
 305                                         &priv->max_pixelclock))
 306                 priv->max_pixelclock = TILCDC_DEFAULT_MAX_PIXELCLOCK;
 307
 308         DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);
 309
 310         pm_runtime_enable(dev);
 311
 312         /* Determine LCD IP Version */
 313         pm_runtime_get_sync(dev);
 314         switch (tilcdc_read(ddev, LCDC_PID_REG)) {
 315         case 0x4c100102:
 316                 priv->rev = 1;
 317                 break;
 318         case 0x4f200800:
 319         case 0x4f201000:
 320                 priv->rev = 2;
 321                 break;
 322         default:
 323                 dev_warn(dev, "Unknown PID Reg value 0x%08x, "
 324                         "defaulting to LCD revision 1\n",
 325                         tilcdc_read(ddev, LCDC_PID_REG));
 326                 priv->rev = 1;
 327                 break;
 328         }
 329
 330         pm_runtime_put_sync(dev);
 331
 332         if (priv->rev == 1) {
 333                 DBG("Revision 1 LCDC supports only RGB565 format");
 334                 priv->pixelformats = tilcdc_rev1_formats;
 335                 priv->num_pixelformats = ARRAY_SIZE(tilcdc_rev1_formats);
 336                 bpp = 16;
 337         } else {
 338                 const char *str = "\0";
 339
 340                 of_property_read_string(node, "blue-and-red-wiring", &str);
 341                 if (0 == strcmp(str, "crossed")) {
 342                         DBG("Configured for crossed blue and red wires");
 343                         priv->pixelformats = tilcdc_crossed_formats;
 344                         priv->num_pixelformats =
 345                                 ARRAY_SIZE(tilcdc_crossed_formats);
 346                         bpp = 32; /* Choose bpp with RGB support for fbdef */
 347                 } else if (0 == strcmp(str, "straight")) {
 348                         DBG("Configured for straight blue and red wires");
 349                         priv->pixelformats = tilcdc_straight_formats;
 350                         priv->num_pixelformats =
 351                                 ARRAY_SIZE(tilcdc_straight_formats);
 352                         bpp = 16; /* Choose bpp with RGB support for fbdef */
 353                 } else {
 354                         DBG("Blue and red wiring '%s' unknown, use legacy mode",
 355                             str);
 356                         priv->pixelformats = tilcdc_legacy_formats;
 357                         priv->num_pixelformats =
 358                                 ARRAY_SIZE(tilcdc_legacy_formats);
 359                         bpp = 16; /* This is just a guess */
 360                 }
 361         }
 362
 363         ret = tilcdc_crtc_create(ddev);
 364         if (ret < 0) {
 365                 dev_err(dev, "failed to create crtc\n");
 366                 goto init_failed;
 367         }
 368         modeset_init(ddev);
 369
 370         if (priv->is_componentized) {
 371                 ret = component_bind_all(dev, ddev);
 372                 if (ret < 0)
 373                         goto init_failed;
 374
 375                 ret = tilcdc_add_component_encoder(ddev);
 376                 if (ret < 0)
 377                         goto init_failed;
 378         } else {
 379                 ret = tilcdc_attach_external_device(ddev);
 380                 if (ret)
 381                         goto init_failed;
 382         }
 383
 384         if (!priv->external_connector &&
 385             ((priv->num_encoders == 0) || (priv->num_connectors == 0))) {
 386                 dev_err(dev, "no encoders/connectors found\n");
 387                 ret = -ENXIO;
 388                 goto init_failed;
 389         }
 390
 391         ret = drm_vblank_init(ddev, 1);
 392         if (ret < 0) {
 393                 dev_err(dev, "failed to initialize vblank\n");
 394                 goto init_failed;
 395         }
 396
 397         ret = drm_irq_install(ddev, platform_get_irq(pdev, 0));
 398         if (ret < 0) {
 399                 dev_err(dev, "failed to install IRQ handler\n");
 400                 goto init_failed;
 401         }
 402
 403         drm_mode_config_reset(ddev);
 404
 405         priv->fbdev = drm_fbdev_cma_init(ddev, bpp,
 406                         ddev->mode_config.num_crtc,
 407                         ddev->mode_config.num_connector);
 408         if (IS_ERR(priv->fbdev)) {
 409                 ret = PTR_ERR(priv->fbdev);
 410                 goto init_failed;
 411         }
 412
 413         drm_kms_helper_poll_init(ddev);
 414
 415         ret = drm_dev_register(ddev, 0);
 416         if (ret)
 417                 goto init_failed;
 418
 419         priv->is_registered = true;
 420         return 0;
 421
 422 init_failed:
 423         tilcdc_fini(ddev);
 424
 425         return ret;
 426 }
 427
 428 static void tilcdc_lastclose(struct drm_device *dev)
 429 {
 430         struct tilcdc_drm_private *priv = dev->dev_private;
 431         drm_fbdev_cma_restore_mode(priv->fbdev);
 432 }
 433
 434 static irqreturn_t tilcdc_irq(int irq, void *arg)
 435 {
 436         struct drm_device *dev = arg;
 437         struct tilcdc_drm_private *priv = dev->dev_private;
 438         return tilcdc_crtc_irq(priv->crtc);
 439 }
 440
 441 static int tilcdc_enable_vblank(struct drm_device *dev, unsigned int pipe)
 442 {
 443         return 0;
 444 }
 445
 446 static void tilcdc_disable_vblank(struct drm_device *dev, unsigned int pipe)
 447 {
 448         return;
 449 }
 450
 451 #if defined(CONFIG_DEBUG_FS)
 452 static const struct {
 453         const char *name;
 454         uint8_t  rev;
 455         uint8_t  save;
 456         uint32_t reg;
 457 } registers[] =         {
 458 #define REG(rev, save, reg) { #reg, rev, save, reg }
 459                 /* exists in revision 1: */
 460                 REG(1, false, LCDC_PID_REG),
 461                 REG(1, true,  LCDC_CTRL_REG),
 462                 REG(1, false, LCDC_STAT_REG),
 463                 REG(1, true,  LCDC_RASTER_CTRL_REG),
 464                 REG(1, true,  LCDC_RASTER_TIMING_0_REG),
 465                 REG(1, true,  LCDC_RASTER_TIMING_1_REG),
 466                 REG(1, true,  LCDC_RASTER_TIMING_2_REG),
 467                 REG(1, true,  LCDC_DMA_CTRL_REG),
 468                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_0_REG),
 469                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_0_REG),
 470                 REG(1, true,  LCDC_DMA_FB_BASE_ADDR_1_REG),
 471                 REG(1, true,  LCDC_DMA_FB_CEILING_ADDR_1_REG),
 472                 /* new in revision 2: */
 473                 REG(2, false, LCDC_RAW_STAT_REG),
 474                 REG(2, false, LCDC_MASKED_STAT_REG),
 475                 REG(2, true, LCDC_INT_ENABLE_SET_REG),
 476                 REG(2, false, LCDC_INT_ENABLE_CLR_REG),
 477                 REG(2, false, LCDC_END_OF_INT_IND_REG),
 478                 REG(2, true,  LCDC_CLK_ENABLE_REG),
 479 #undef REG
 480 };
 481
 482 #endif
 483
 484 #ifdef CONFIG_DEBUG_FS
 485 static int tilcdc_regs_show(struct seq_file *m, void *arg)
 486 {
 487         struct drm_info_node *node = (struct drm_info_node *) m->private;
 488         struct drm_device *dev = node->minor->dev;
 489         struct tilcdc_drm_private *priv = dev->dev_private;
 490         unsigned i;
 491
 492         pm_runtime_get_sync(dev->dev);
 493
 494         seq_printf(m, "revision: %d\n", priv->rev);
 495
 496         for (i = 0; i < ARRAY_SIZE(registers); i++)
 497                 if (priv->rev >= registers[i].rev)
 498                         seq_printf(m, "%s:\t %08x\n", registers[i].name,
 499                                         tilcdc_read(dev, registers[i].reg));
 500
 501         pm_runtime_put_sync(dev->dev);
 502
 503         return 0;
 504 }
 505
 506 static int tilcdc_mm_show(struct seq_file *m, void *arg)
 507 {
 508         struct drm_info_node *node = (struct drm_info_node *) m->private;
 509         struct drm_device *dev = node->minor->dev;
 510         struct drm_printer p = drm_seq_file_printer(m);
 511         drm_mm_print(&dev->vma_offset_manager->vm_addr_space_mm, &p);
 512         return 0;
 513 }
 514
 515 static struct drm_info_list tilcdc_debugfs_list[] = {
 516                 { "regs", tilcdc_regs_show, 0 },
 517                 { "mm",   tilcdc_mm_show,   0 },
 518                 { "fb",   drm_fb_cma_debugfs_show, 0 },
 519 };
 520
 521 static int tilcdc_debugfs_init(struct drm_minor *minor)
 522 {
 523         struct drm_device *dev = minor->dev;
 524         struct tilcdc_module *mod;
 525         int ret;
 526
 527         ret = drm_debugfs_create_files(tilcdc_debugfs_list,
 528                         ARRAY_SIZE(tilcdc_debugfs_list),
 529                         minor->debugfs_root, minor);
 530
 531         list_for_each_entry(mod, &module_list, list)
 532                 if (mod->funcs->debugfs_init)
 533                         mod->funcs->debugfs_init(mod, minor);
 534
 535         if (ret) {
 536                 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n");
 537                 return ret;
 538         }
 539
 540         return ret;
 541 }
 542
 543 static void tilcdc_debugfs_cleanup(struct drm_minor *minor)
 544 {
 545         struct tilcdc_module *mod;
 546         drm_debugfs_remove_files(tilcdc_debugfs_list,
 547                         ARRAY_SIZE(tilcdc_debugfs_list), minor);
 548
 549         list_for_each_entry(mod, &module_list, list)
 550                 if (mod->funcs->debugfs_cleanup)
 551                         mod->funcs->debugfs_cleanup(mod, minor);
 552 }
 553 #endif
 554
 555 static const struct file_operations fops = {
 556         .owner              = THIS_MODULE,
 557         .open               = drm_open,
 558         .release            = drm_release,
 559         .unlocked_ioctl     = drm_ioctl,
 560         .compat_ioctl       = drm_compat_ioctl,
 561         .poll               = drm_poll,
 562         .read               = drm_read,
 563         .llseek             = no_llseek,
 564         .mmap               = drm_gem_cma_mmap,
 565 };
 566
 567 static struct drm_driver tilcdc_driver = {
 568         .driver_features    = (DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET |
 569                                DRIVER_PRIME | DRIVER_ATOMIC),
 570         .lastclose          = tilcdc_lastclose,
 571         .irq_handler        = tilcdc_irq,
 572         .get_vblank_counter = drm_vblank_no_hw_counter,
 573         .enable_vblank      = tilcdc_enable_vblank,
 574         .disable_vblank     = tilcdc_disable_vblank,
 575         .gem_free_object_unlocked = drm_gem_cma_free_object,
 576         .gem_vm_ops         = &drm_gem_cma_vm_ops,
 577         .dumb_create        = drm_gem_cma_dumb_create,
 578         .dumb_map_offset    = drm_gem_cma_dumb_map_offset,
 579         .dumb_destroy       = drm_gem_dumb_destroy,
 580
 581         .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
 582         .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
 583         .gem_prime_import       = drm_gem_prime_import,
 584         .gem_prime_export       = drm_gem_prime_export,
 585         .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
 586         .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
 587         .gem_prime_vmap         = drm_gem_cma_prime_vmap,
 588         .gem_prime_vunmap       = drm_gem_cma_prime_vunmap,
 589         .gem_prime_mmap         = drm_gem_cma_prime_mmap,
 590 #ifdef CONFIG_DEBUG_FS
 591         .debugfs_init       = tilcdc_debugfs_init,
 592         .debugfs_cleanup    = tilcdc_debugfs_cleanup,
 593 #endif
 594         .fops               = &fops,
 595         .name               = "tilcdc",
 596         .desc               = "TI LCD Controller DRM",
 597         .date               = "20121205",
 598         .major              = 1,
 599         .minor              = 0,
 600 };
 601
 602 /*
 603  * Power management:
 604  */
 605
 606 #ifdef CONFIG_PM_SLEEP
 607 static int tilcdc_pm_suspend(struct device *dev)
 608 {
 609         struct drm_device *ddev = dev_get_drvdata(dev);
 610         struct tilcdc_drm_private *priv = ddev->dev_private;
 611
 612         priv->saved_state = drm_atomic_helper_suspend(ddev);
 613
 614         /* Select sleep pin state */
 615         pinctrl_pm_select_sleep_state(dev);
 616
 617         return 0;
 618 }
 619
 620 static int tilcdc_pm_resume(struct device *dev)
 621 {
 622         struct drm_device *ddev = dev_get_drvdata(dev);
 623         struct tilcdc_drm_private *priv = ddev->dev_private;
 624         int ret = 0;
 625
 626         /* Select default pin state */
 627         pinctrl_pm_select_default_state(dev);
 628
 629         if (priv->saved_state)
 630                 ret = drm_atomic_helper_resume(ddev, priv->saved_state);
 631
 632         return ret;
 633 }
 634 #endif
 635
 636 static const struct dev_pm_ops tilcdc_pm_ops = {
 637         SET_SYSTEM_SLEEP_PM_OPS(tilcdc_pm_suspend, tilcdc_pm_resume)
 638 };
 639
 640 /*
 641  * Platform driver:
 642  */
 643 static int tilcdc_bind(struct device *dev)
 644 {
 645         return tilcdc_init(&tilcdc_driver, dev);
 646 }
 647
 648 static void tilcdc_unbind(struct device *dev)
 649 {
 650         struct drm_device *ddev = dev_get_drvdata(dev);
 651
 652         /* Check if a subcomponent has already triggered the unloading. */
 653         if (!ddev->dev_private)
 654                 return;
 655
 656         tilcdc_fini(dev_get_drvdata(dev));
 657 }
 658
 659 static const struct component_master_ops tilcdc_comp_ops = {
 660         .bind = tilcdc_bind,
 661         .unbind = tilcdc_unbind,
 662 };
 663
 664 static int tilcdc_pdev_probe(struct platform_device *pdev)
 665 {
 666         struct component_match *match = NULL;
 667         int ret;
 668
 669         /* bail out early if no DT data: */
 670         if (!pdev->dev.of_node) {
 671                 dev_err(&pdev->dev, "device-tree data is missing\n");
 672                 return -ENXIO;
 673         }
 674
 675         ret = tilcdc_get_external_components(&pdev->dev, &match);
 676         if (ret < 0)
 677                 return ret;
 678         else if (ret == 0)
 679                 return tilcdc_init(&tilcdc_driver, &pdev->dev);
 680         else
 681                 return component_master_add_with_match(&pdev->dev,
 682                                                        &tilcdc_comp_ops,
 683                                                        match);
 684 }
 685
 686 static int tilcdc_pdev_remove(struct platform_device *pdev)
 687 {
 688         int ret;
 689
 690         ret = tilcdc_get_external_components(&pdev->dev, NULL);
 691         if (ret < 0)
 692                 return ret;
 693         else if (ret == 0)
 694                 tilcdc_fini(platform_get_drvdata(pdev));
 695         else
 696                 component_master_del(&pdev->dev, &tilcdc_comp_ops);
 697
 698         return 0;
 699 }
 700
 701 static struct of_device_id tilcdc_of_match[] = {
 702                 { .compatible = "ti,am33xx-tilcdc", },
 703                 { .compatible = "ti,da850-tilcdc", },
 704                 { },
 705 };
 706 MODULE_DEVICE_TABLE(of, tilcdc_of_match);
 707
 708 static struct platform_driver tilcdc_platform_driver = {
 709         .probe      = tilcdc_pdev_probe,
 710         .remove     = tilcdc_pdev_remove,
 711         .driver     = {
 712                 .name   = "tilcdc",
 713                 .pm     = &tilcdc_pm_ops,
 714                 .of_match_table = tilcdc_of_match,
 715         },
 716 };
 717
 718 static int __init tilcdc_drm_init(void)
 719 {
 720         DBG("init");
 721         tilcdc_tfp410_init();
 722         tilcdc_panel_init();
 723         return platform_driver_register(&tilcdc_platform_driver);
 724 }
 725
 726 static void __exit tilcdc_drm_fini(void)
 727 {
 728         DBG("fini");
 729         platform_driver_unregister(&tilcdc_platform_driver);
 730         tilcdc_panel_fini();
 731         tilcdc_tfp410_fini();
 732 }
 733
 734 module_init(tilcdc_drm_init);
 735 module_exit(tilcdc_drm_fini);
 736
 737 MODULE_AUTHOR("Rob Clark <robdclark@gmail.com");
 738 MODULE_DESCRIPTION("TI LCD Controller DRM Driver");
 739 MODULE_LICENSE("GPL");