2 * Copyright 2011, Netlogic Microsystems Inc.
3 * Copyright 2004, Matt Porter <mporter@kernel.crashing.org>
5 * This file is licensed under the terms of the GNU General Public
6 * License version 2. This program is licensed "as is" without any
7 * warranty of any kind, whether express or implied.
10 #include <linux/err.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <linux/ioport.h>
15 #include <linux/delay.h>
16 #include <linux/errno.h>
17 #include <linux/i2c.h>
19 #include <linux/platform_device.h>
20 #include <linux/of_device.h>
21 #include <linux/clk.h>
22 #include <linux/interrupt.h>
23 #include <linux/wait.h>
25 /* XLR I2C REGISTERS */
26 #define XLR_I2C_CFG 0x00
27 #define XLR_I2C_CLKDIV 0x01
28 #define XLR_I2C_DEVADDR 0x02
29 #define XLR_I2C_ADDR 0x03
30 #define XLR_I2C_DATAOUT 0x04
31 #define XLR_I2C_DATAIN 0x05
32 #define XLR_I2C_STATUS 0x06
33 #define XLR_I2C_STARTXFR 0x07
34 #define XLR_I2C_BYTECNT 0x08
35 #define XLR_I2C_HDSTATIM 0x09
37 /* Sigma Designs additional registers */
38 #define XLR_I2C_INT_EN 0x09
39 #define XLR_I2C_INT_STAT 0x0a
41 /* XLR I2C REGISTERS FLAGS */
42 #define XLR_I2C_BUS_BUSY 0x01
43 #define XLR_I2C_SDOEMPTY 0x02
44 #define XLR_I2C_RXRDY 0x04
45 #define XLR_I2C_ACK_ERR 0x08
46 #define XLR_I2C_ARB_STARTERR 0x30
49 #define XLR_I2C_CFG_ADDR 0xF8
50 #define XLR_I2C_CFG_NOADDR 0xFA
51 #define XLR_I2C_STARTXFR_ND 0x02 /* No Data */
52 #define XLR_I2C_STARTXFR_RD 0x01 /* Read */
53 #define XLR_I2C_STARTXFR_WR 0x00 /* Write */
55 #define XLR_I2C_TIMEOUT 10 /* timeout per byte in msec */
58 * On XLR/XLS, we need to use __raw_ IO to read the I2C registers
59 * because they are in the big-endian MMIO area on the SoC.
61 * The readl/writel implementation on XLR/XLS byteswaps, because
62 * those are for its little-endian PCI space (see arch/mips/Kconfig).
64 static inline void xlr_i2c_wreg(u32 __iomem
*base
, unsigned int reg
, u32 val
)
66 __raw_writel(val
, base
+ reg
);
69 static inline u32
xlr_i2c_rdreg(u32 __iomem
*base
, unsigned int reg
)
71 return __raw_readl(base
+ reg
);
74 #define XLR_I2C_FLAG_IRQ 1
76 struct xlr_i2c_config
{
77 u32 flags
; /* optional feature support */
78 u32 status_busy
; /* value of STATUS[0] when busy */
79 u32 cfg_extra
; /* extra CFG bits to set */
82 struct xlr_i2c_private
{
83 struct i2c_adapter adap
;
88 const struct xlr_i2c_config
*cfg
;
89 wait_queue_head_t wait
;
93 static int xlr_i2c_busy(struct xlr_i2c_private
*priv
, u32 status
)
95 return (status
& XLR_I2C_BUS_BUSY
) == priv
->cfg
->status_busy
;
98 static int xlr_i2c_idle(struct xlr_i2c_private
*priv
)
100 return !xlr_i2c_busy(priv
, xlr_i2c_rdreg(priv
->iobase
, XLR_I2C_STATUS
));
103 static int xlr_i2c_wait(struct xlr_i2c_private
*priv
, unsigned long timeout
)
108 t
= wait_event_timeout(priv
->wait
, xlr_i2c_idle(priv
),
109 msecs_to_jiffies(timeout
));
113 status
= xlr_i2c_rdreg(priv
->iobase
, XLR_I2C_STATUS
);
115 return status
& XLR_I2C_ACK_ERR
? -EIO
: 0;
118 static void xlr_i2c_tx_irq(struct xlr_i2c_private
*priv
, u32 status
)
120 struct i2c_msg
*msg
= priv
->msg
;
122 if (status
& XLR_I2C_SDOEMPTY
)
123 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_DATAOUT
,
124 msg
->buf
[priv
->pos
++]);
127 static void xlr_i2c_rx_irq(struct xlr_i2c_private
*priv
, u32 status
)
129 struct i2c_msg
*msg
= priv
->msg
;
131 if (status
& XLR_I2C_RXRDY
)
132 msg
->buf
[priv
->pos
++] =
133 xlr_i2c_rdreg(priv
->iobase
, XLR_I2C_DATAIN
);
136 static irqreturn_t
xlr_i2c_irq(int irq
, void *dev_id
)
138 struct xlr_i2c_private
*priv
= dev_id
;
139 struct i2c_msg
*msg
= priv
->msg
;
140 u32 int_stat
, status
;
142 int_stat
= xlr_i2c_rdreg(priv
->iobase
, XLR_I2C_INT_STAT
);
146 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_INT_STAT
, int_stat
);
151 status
= xlr_i2c_rdreg(priv
->iobase
, XLR_I2C_STATUS
);
153 if (priv
->pos
< msg
->len
) {
154 if (msg
->flags
& I2C_M_RD
)
155 xlr_i2c_rx_irq(priv
, status
);
157 xlr_i2c_tx_irq(priv
, status
);
160 if (!xlr_i2c_busy(priv
, status
))
161 wake_up(&priv
->wait
);
166 static int xlr_i2c_tx(struct xlr_i2c_private
*priv
, u16 len
,
169 struct i2c_adapter
*adap
= &priv
->adap
;
170 unsigned long timeout
, stoptime
, checktime
;
180 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_ADDR
, offset
);
181 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_DEVADDR
, addr
);
182 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_CFG
,
183 XLR_I2C_CFG_ADDR
| priv
->cfg
->cfg_extra
);
185 timeout
= msecs_to_jiffies(XLR_I2C_TIMEOUT
);
186 stoptime
= jiffies
+ timeout
;
190 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_BYTECNT
, len
- 1);
191 xfer
= XLR_I2C_STARTXFR_ND
;
194 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_BYTECNT
, len
- 2);
195 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_DATAOUT
, buf
[1]);
196 xfer
= XLR_I2C_STARTXFR_WR
;
203 /* retry can only happen on the first byte */
204 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_STARTXFR
, xfer
);
207 return xlr_i2c_wait(priv
, XLR_I2C_TIMEOUT
* len
);
211 i2c_status
= xlr_i2c_rdreg(priv
->iobase
, XLR_I2C_STATUS
);
213 if ((i2c_status
& XLR_I2C_SDOEMPTY
) && pos
< len
) {
214 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_DATAOUT
, buf
[pos
++]);
216 /* reset timeout on successful xmit */
217 stoptime
= jiffies
+ timeout
;
219 timedout
= time_after(checktime
, stoptime
);
221 if (i2c_status
& XLR_I2C_ARB_STARTERR
) {
227 if (i2c_status
& XLR_I2C_ACK_ERR
)
230 if (!xlr_i2c_busy(priv
, i2c_status
) && pos
>= len
)
233 dev_err(&adap
->dev
, "I2C transmit timeout\n");
237 static int xlr_i2c_rx(struct xlr_i2c_private
*priv
, u16 len
, u8
*buf
, u16 addr
)
239 struct i2c_adapter
*adap
= &priv
->adap
;
241 unsigned long timeout
, stoptime
, checktime
;
242 int nbytes
, timedout
;
247 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_CFG
,
248 XLR_I2C_CFG_NOADDR
| priv
->cfg
->cfg_extra
);
249 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_BYTECNT
, len
- 1);
250 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_DEVADDR
, addr
);
254 timeout
= msecs_to_jiffies(XLR_I2C_TIMEOUT
);
255 stoptime
= jiffies
+ timeout
;
259 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_STARTXFR
, XLR_I2C_STARTXFR_RD
);
262 return xlr_i2c_wait(priv
, XLR_I2C_TIMEOUT
* len
);
266 i2c_status
= xlr_i2c_rdreg(priv
->iobase
, XLR_I2C_STATUS
);
267 if (i2c_status
& XLR_I2C_RXRDY
) {
269 return -EIO
; /* should not happen */
272 xlr_i2c_rdreg(priv
->iobase
, XLR_I2C_DATAIN
);
274 /* reset timeout on successful read */
275 stoptime
= jiffies
+ timeout
;
278 timedout
= time_after(checktime
, stoptime
);
279 if (i2c_status
& XLR_I2C_ARB_STARTERR
) {
285 if (i2c_status
& XLR_I2C_ACK_ERR
)
288 if (!xlr_i2c_busy(priv
, i2c_status
))
292 dev_err(&adap
->dev
, "I2C receive timeout\n");
296 static int xlr_i2c_xfer(struct i2c_adapter
*adap
,
297 struct i2c_msg
*msgs
, int num
)
302 struct xlr_i2c_private
*priv
= i2c_get_adapdata(adap
);
304 ret
= clk_enable(priv
->clk
);
309 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_INT_EN
, 0xf);
312 for (i
= 0; ret
== 0 && i
< num
; i
++) {
315 if (msg
->flags
& I2C_M_RD
)
316 ret
= xlr_i2c_rx(priv
, msg
->len
, &msg
->buf
[0],
319 ret
= xlr_i2c_tx(priv
, msg
->len
, &msg
->buf
[0],
324 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_INT_EN
, 0);
326 clk_disable(priv
->clk
);
329 return (ret
!= 0) ? ret
: num
;
332 static u32
xlr_func(struct i2c_adapter
*adap
)
334 /* Emulate SMBUS over I2C */
335 return (I2C_FUNC_SMBUS_EMUL
& ~I2C_FUNC_SMBUS_QUICK
) | I2C_FUNC_I2C
;
338 static struct i2c_algorithm xlr_i2c_algo
= {
339 .master_xfer
= xlr_i2c_xfer
,
340 .functionality
= xlr_func
,
343 static const struct xlr_i2c_config xlr_i2c_config_default
= {
344 .status_busy
= XLR_I2C_BUS_BUSY
,
348 static const struct xlr_i2c_config xlr_i2c_config_tangox
= {
349 .flags
= XLR_I2C_FLAG_IRQ
,
354 static const struct of_device_id xlr_i2c_dt_ids
[] = {
356 .compatible
= "sigma,smp8642-i2c",
357 .data
= &xlr_i2c_config_tangox
,
361 MODULE_DEVICE_TABLE(of
, xlr_i2c_dt_ids
);
363 static int xlr_i2c_probe(struct platform_device
*pdev
)
365 const struct of_device_id
*match
;
366 struct xlr_i2c_private
*priv
;
367 struct resource
*res
;
369 unsigned long clk_rate
;
370 unsigned long clk_div
;
375 priv
= devm_kzalloc(&pdev
->dev
, sizeof(*priv
), GFP_KERNEL
);
379 match
= of_match_device(xlr_i2c_dt_ids
, &pdev
->dev
);
381 priv
->cfg
= match
->data
;
383 priv
->cfg
= &xlr_i2c_config_default
;
385 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
386 priv
->iobase
= devm_ioremap_resource(&pdev
->dev
, res
);
387 if (IS_ERR(priv
->iobase
))
388 return PTR_ERR(priv
->iobase
);
390 irq
= platform_get_irq(pdev
, 0);
392 if (irq
> 0 && (priv
->cfg
->flags
& XLR_I2C_FLAG_IRQ
)) {
395 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_INT_EN
, 0);
396 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_INT_STAT
, 0xf);
398 ret
= devm_request_irq(&pdev
->dev
, priv
->irq
, xlr_i2c_irq
,
399 IRQF_SHARED
, dev_name(&pdev
->dev
),
404 init_waitqueue_head(&priv
->wait
);
407 if (of_property_read_u32(pdev
->dev
.of_node
, "clock-frequency",
411 clk
= devm_clk_get(&pdev
->dev
, NULL
);
413 ret
= clk_prepare_enable(clk
);
417 clk_rate
= clk_get_rate(clk
);
418 clk_div
= DIV_ROUND_UP(clk_rate
, 2 * busfreq
);
419 xlr_i2c_wreg(priv
->iobase
, XLR_I2C_CLKDIV
, clk_div
);
425 priv
->adap
.dev
.parent
= &pdev
->dev
;
426 priv
->adap
.dev
.of_node
= pdev
->dev
.of_node
;
427 priv
->adap
.owner
= THIS_MODULE
;
428 priv
->adap
.algo_data
= priv
;
429 priv
->adap
.algo
= &xlr_i2c_algo
;
430 priv
->adap
.nr
= pdev
->id
;
431 priv
->adap
.class = I2C_CLASS_HWMON
;
432 snprintf(priv
->adap
.name
, sizeof(priv
->adap
.name
), "xlr-i2c");
434 i2c_set_adapdata(&priv
->adap
, priv
);
435 ret
= i2c_add_numbered_adapter(&priv
->adap
);
439 platform_set_drvdata(pdev
, priv
);
440 dev_info(&priv
->adap
.dev
, "Added I2C Bus.\n");
444 static int xlr_i2c_remove(struct platform_device
*pdev
)
446 struct xlr_i2c_private
*priv
;
448 priv
= platform_get_drvdata(pdev
);
449 i2c_del_adapter(&priv
->adap
);
450 clk_unprepare(priv
->clk
);
455 static struct platform_driver xlr_i2c_driver
= {
456 .probe
= xlr_i2c_probe
,
457 .remove
= xlr_i2c_remove
,
459 .name
= "xlr-i2cbus",
460 .of_match_table
= xlr_i2c_dt_ids
,
464 module_platform_driver(xlr_i2c_driver
);
466 MODULE_AUTHOR("Ganesan Ramalingam <ganesanr@netlogicmicro.com>");
467 MODULE_DESCRIPTION("XLR/XLS SoC I2C Controller driver");
468 MODULE_LICENSE("GPL v2");
469 MODULE_ALIAS("platform:xlr-i2cbus");