ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
[linux/fpc-iii.git] / drivers / clk / st / clkgen.h
blob35c863295268107f7e451c65161465d3a9a01c5a
1 /************************************************************************
2 File : Clock H/w specific Information
4 Author: Pankaj Dev <pankaj.dev@st.com>
6 Copyright (C) 2014 STMicroelectronics
7 ************************************************************************/
9 #ifndef __CLKGEN_INFO_H
10 #define __CLKGEN_INFO_H
12 struct clkgen_field {
13 unsigned int offset;
14 unsigned int mask;
15 unsigned int shift;
18 static inline unsigned long clkgen_read(void __iomem *base,
19 struct clkgen_field *field)
21 return (readl(base + field->offset) >> field->shift) & field->mask;
25 static inline void clkgen_write(void __iomem *base, struct clkgen_field *field,
26 unsigned long val)
28 writel((readl(base + field->offset) &
29 ~(field->mask << field->shift)) | (val << field->shift),
30 base + field->offset);
32 return;
35 #define CLKGEN_FIELD(_offset, _mask, _shift) { \
36 .offset = _offset, \
37 .mask = _mask, \
38 .shift = _shift, \
41 #define CLKGEN_READ(pll, field) clkgen_read(pll->regs_base, \
42 &pll->data->field)
44 #define CLKGEN_WRITE(pll, field, val) clkgen_write(pll->regs_base, \
45 &pll->data->field, val)
47 #endif /*__CLKGEN_INFO_H*/