ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
[linux/fpc-iii.git] / drivers / iio / adc / ad7887.c
blob2fd012ee99f5b3f005bbe4c152760a3af36a27be
1 /*
2 * AD7887 SPI ADC driver
4 * Copyright 2010-2011 Analog Devices Inc.
6 * Licensed under the GPL-2.
7 */
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/sysfs.h>
13 #include <linux/spi/spi.h>
14 #include <linux/regulator/consumer.h>
15 #include <linux/err.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/bitops.h>
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
24 #include <linux/iio/trigger_consumer.h>
25 #include <linux/iio/triggered_buffer.h>
27 #include <linux/platform_data/ad7887.h>
29 #define AD7887_REF_DIS BIT(5) /* on-chip reference disable */
30 #define AD7887_DUAL BIT(4) /* dual-channel mode */
31 #define AD7887_CH_AIN1 BIT(3) /* convert on channel 1, DUAL=1 */
32 #define AD7887_CH_AIN0 0 /* convert on channel 0, DUAL=0,1 */
33 #define AD7887_PM_MODE1 0 /* CS based shutdown */
34 #define AD7887_PM_MODE2 1 /* full on */
35 #define AD7887_PM_MODE3 2 /* auto shutdown after conversion */
36 #define AD7887_PM_MODE4 3 /* standby mode */
38 enum ad7887_channels {
39 AD7887_CH0,
40 AD7887_CH0_CH1,
41 AD7887_CH1,
44 /**
45 * struct ad7887_chip_info - chip specifc information
46 * @int_vref_mv: the internal reference voltage
47 * @channel: channel specification
49 struct ad7887_chip_info {
50 u16 int_vref_mv;
51 struct iio_chan_spec channel[3];
54 struct ad7887_state {
55 struct spi_device *spi;
56 const struct ad7887_chip_info *chip_info;
57 struct regulator *reg;
58 struct spi_transfer xfer[4];
59 struct spi_message msg[3];
60 struct spi_message *ring_msg;
61 unsigned char tx_cmd_buf[4];
64 * DMA (thus cache coherency maintenance) requires the
65 * transfer buffers to live in their own cache lines.
66 * Buffer needs to be large enough to hold two 16 bit samples and a
67 * 64 bit aligned 64 bit timestamp.
69 unsigned char data[ALIGN(4, sizeof(s64)) + sizeof(s64)]
70 ____cacheline_aligned;
73 enum ad7887_supported_device_ids {
74 ID_AD7887
77 static int ad7887_ring_preenable(struct iio_dev *indio_dev)
79 struct ad7887_state *st = iio_priv(indio_dev);
81 /* We know this is a single long so can 'cheat' */
82 switch (*indio_dev->active_scan_mask) {
83 case (1 << 0):
84 st->ring_msg = &st->msg[AD7887_CH0];
85 break;
86 case (1 << 1):
87 st->ring_msg = &st->msg[AD7887_CH1];
88 /* Dummy read: push CH1 setting down to hardware */
89 spi_sync(st->spi, st->ring_msg);
90 break;
91 case ((1 << 1) | (1 << 0)):
92 st->ring_msg = &st->msg[AD7887_CH0_CH1];
93 break;
96 return 0;
99 static int ad7887_ring_postdisable(struct iio_dev *indio_dev)
101 struct ad7887_state *st = iio_priv(indio_dev);
103 /* dummy read: restore default CH0 settin */
104 return spi_sync(st->spi, &st->msg[AD7887_CH0]);
108 * ad7887_trigger_handler() bh of trigger launched polling to ring buffer
110 * Currently there is no option in this driver to disable the saving of
111 * timestamps within the ring.
113 static irqreturn_t ad7887_trigger_handler(int irq, void *p)
115 struct iio_poll_func *pf = p;
116 struct iio_dev *indio_dev = pf->indio_dev;
117 struct ad7887_state *st = iio_priv(indio_dev);
118 int b_sent;
120 b_sent = spi_sync(st->spi, st->ring_msg);
121 if (b_sent)
122 goto done;
124 iio_push_to_buffers_with_timestamp(indio_dev, st->data,
125 iio_get_time_ns());
126 done:
127 iio_trigger_notify_done(indio_dev->trig);
129 return IRQ_HANDLED;
132 static const struct iio_buffer_setup_ops ad7887_ring_setup_ops = {
133 .preenable = &ad7887_ring_preenable,
134 .postenable = &iio_triggered_buffer_postenable,
135 .predisable = &iio_triggered_buffer_predisable,
136 .postdisable = &ad7887_ring_postdisable,
139 static int ad7887_scan_direct(struct ad7887_state *st, unsigned ch)
141 int ret = spi_sync(st->spi, &st->msg[ch]);
142 if (ret)
143 return ret;
145 return (st->data[(ch * 2)] << 8) | st->data[(ch * 2) + 1];
148 static int ad7887_read_raw(struct iio_dev *indio_dev,
149 struct iio_chan_spec const *chan,
150 int *val,
151 int *val2,
152 long m)
154 int ret;
155 struct ad7887_state *st = iio_priv(indio_dev);
157 switch (m) {
158 case IIO_CHAN_INFO_RAW:
159 mutex_lock(&indio_dev->mlock);
160 if (iio_buffer_enabled(indio_dev))
161 ret = -EBUSY;
162 else
163 ret = ad7887_scan_direct(st, chan->address);
164 mutex_unlock(&indio_dev->mlock);
166 if (ret < 0)
167 return ret;
168 *val = ret >> chan->scan_type.shift;
169 *val &= GENMASK(chan->scan_type.realbits - 1, 0);
170 return IIO_VAL_INT;
171 case IIO_CHAN_INFO_SCALE:
172 if (st->reg) {
173 *val = regulator_get_voltage(st->reg);
174 if (*val < 0)
175 return *val;
176 *val /= 1000;
177 } else {
178 *val = st->chip_info->int_vref_mv;
181 *val2 = chan->scan_type.realbits;
183 return IIO_VAL_FRACTIONAL_LOG2;
185 return -EINVAL;
189 static const struct ad7887_chip_info ad7887_chip_info_tbl[] = {
191 * More devices added in future
193 [ID_AD7887] = {
194 .channel[0] = {
195 .type = IIO_VOLTAGE,
196 .indexed = 1,
197 .channel = 1,
198 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
199 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
200 .address = 1,
201 .scan_index = 1,
202 .scan_type = {
203 .sign = 'u',
204 .realbits = 12,
205 .storagebits = 16,
206 .shift = 0,
207 .endianness = IIO_BE,
210 .channel[1] = {
211 .type = IIO_VOLTAGE,
212 .indexed = 1,
213 .channel = 0,
214 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
215 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),
216 .address = 0,
217 .scan_index = 0,
218 .scan_type = {
219 .sign = 'u',
220 .realbits = 12,
221 .storagebits = 16,
222 .shift = 0,
223 .endianness = IIO_BE,
226 .channel[2] = IIO_CHAN_SOFT_TIMESTAMP(2),
227 .int_vref_mv = 2500,
231 static const struct iio_info ad7887_info = {
232 .read_raw = &ad7887_read_raw,
233 .driver_module = THIS_MODULE,
236 static int ad7887_probe(struct spi_device *spi)
238 struct ad7887_platform_data *pdata = spi->dev.platform_data;
239 struct ad7887_state *st;
240 struct iio_dev *indio_dev;
241 uint8_t mode;
242 int ret;
244 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
245 if (indio_dev == NULL)
246 return -ENOMEM;
248 st = iio_priv(indio_dev);
250 if (!pdata || !pdata->use_onchip_ref) {
251 st->reg = devm_regulator_get(&spi->dev, "vref");
252 if (IS_ERR(st->reg))
253 return PTR_ERR(st->reg);
255 ret = regulator_enable(st->reg);
256 if (ret)
257 return ret;
260 st->chip_info =
261 &ad7887_chip_info_tbl[spi_get_device_id(spi)->driver_data];
263 spi_set_drvdata(spi, indio_dev);
264 st->spi = spi;
266 /* Estabilish that the iio_dev is a child of the spi device */
267 indio_dev->dev.parent = &spi->dev;
268 indio_dev->name = spi_get_device_id(spi)->name;
269 indio_dev->info = &ad7887_info;
270 indio_dev->modes = INDIO_DIRECT_MODE;
272 /* Setup default message */
274 mode = AD7887_PM_MODE4;
275 if (!pdata || !pdata->use_onchip_ref)
276 mode |= AD7887_REF_DIS;
277 if (pdata && pdata->en_dual)
278 mode |= AD7887_DUAL;
280 st->tx_cmd_buf[0] = AD7887_CH_AIN0 | mode;
282 st->xfer[0].rx_buf = &st->data[0];
283 st->xfer[0].tx_buf = &st->tx_cmd_buf[0];
284 st->xfer[0].len = 2;
286 spi_message_init(&st->msg[AD7887_CH0]);
287 spi_message_add_tail(&st->xfer[0], &st->msg[AD7887_CH0]);
289 if (pdata && pdata->en_dual) {
290 st->tx_cmd_buf[2] = AD7887_CH_AIN1 | mode;
292 st->xfer[1].rx_buf = &st->data[0];
293 st->xfer[1].tx_buf = &st->tx_cmd_buf[2];
294 st->xfer[1].len = 2;
296 st->xfer[2].rx_buf = &st->data[2];
297 st->xfer[2].tx_buf = &st->tx_cmd_buf[0];
298 st->xfer[2].len = 2;
300 spi_message_init(&st->msg[AD7887_CH0_CH1]);
301 spi_message_add_tail(&st->xfer[1], &st->msg[AD7887_CH0_CH1]);
302 spi_message_add_tail(&st->xfer[2], &st->msg[AD7887_CH0_CH1]);
304 st->xfer[3].rx_buf = &st->data[2];
305 st->xfer[3].tx_buf = &st->tx_cmd_buf[2];
306 st->xfer[3].len = 2;
308 spi_message_init(&st->msg[AD7887_CH1]);
309 spi_message_add_tail(&st->xfer[3], &st->msg[AD7887_CH1]);
311 indio_dev->channels = st->chip_info->channel;
312 indio_dev->num_channels = 3;
313 } else {
314 indio_dev->channels = &st->chip_info->channel[1];
315 indio_dev->num_channels = 2;
318 ret = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
319 &ad7887_trigger_handler, &ad7887_ring_setup_ops);
320 if (ret)
321 goto error_disable_reg;
323 ret = iio_device_register(indio_dev);
324 if (ret)
325 goto error_unregister_ring;
327 return 0;
328 error_unregister_ring:
329 iio_triggered_buffer_cleanup(indio_dev);
330 error_disable_reg:
331 if (st->reg)
332 regulator_disable(st->reg);
334 return ret;
337 static int ad7887_remove(struct spi_device *spi)
339 struct iio_dev *indio_dev = spi_get_drvdata(spi);
340 struct ad7887_state *st = iio_priv(indio_dev);
342 iio_device_unregister(indio_dev);
343 iio_triggered_buffer_cleanup(indio_dev);
344 if (st->reg)
345 regulator_disable(st->reg);
347 return 0;
350 static const struct spi_device_id ad7887_id[] = {
351 {"ad7887", ID_AD7887},
354 MODULE_DEVICE_TABLE(spi, ad7887_id);
356 static struct spi_driver ad7887_driver = {
357 .driver = {
358 .name = "ad7887",
359 .owner = THIS_MODULE,
361 .probe = ad7887_probe,
362 .remove = ad7887_remove,
363 .id_table = ad7887_id,
365 module_spi_driver(ad7887_driver);
367 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
368 MODULE_DESCRIPTION("Analog Devices AD7887 ADC");
369 MODULE_LICENSE("GPL v2");