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ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
[linux/fpc-iii.git] / drivers / iio / light / gp2ap020a00f.c
blob221ed16de1f7babd220c81296c5eef7fdb959a0d
1 /*
2 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
3 * Author: Jacek Anaszewski <j.anaszewski@samsung.com>
4 *
5 * IIO features supported by the driver:
6 *
7 * Read-only raw channels:
8 * - illuminance_clear [lux]
9 * - illuminance_ir
10 * - proximity
11 *
12 * Triggered buffer:
13 * - illuminance_clear
14 * - illuminance_ir
15 * - proximity
16 *
17 * Events:
18 * - illuminance_clear (rising and falling)
19 * - proximity (rising and falling)
20 * - both falling and rising thresholds for the proximity events
21 * must be set to the values greater than 0.
22 *
23 * The driver supports triggered buffers for all the three
24 * channels as well as high and low threshold events for the
25 * illuminance_clear and proxmimity channels. Triggers
26 * can be enabled simultaneously with both illuminance_clear
27 * events. Proximity events cannot be enabled simultaneously
28 * with any triggers or illuminance events. Enabling/disabling
29 * one of the proximity events automatically enables/disables
30 * the other one.
31 *
32 * This program is free software; you can redistribute it and/or modify
33 * it under the terms of the GNU General Public License version 2, as
34 * published by the Free Software Foundation.
35 */
36
37 #include <linux/debugfs.h>
38 #include <linux/delay.h>
39 #include <linux/i2c.h>
40 #include <linux/interrupt.h>
41 #include <linux/irq.h>
42 #include <linux/irq_work.h>
43 #include <linux/module.h>
44 #include <linux/mutex.h>
45 #include <linux/of.h>
46 #include <linux/regmap.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/slab.h>
49 #include <linux/iio/buffer.h>
50 #include <linux/iio/events.h>
51 #include <linux/iio/iio.h>
52 #include <linux/iio/sysfs.h>
53 #include <linux/iio/trigger.h>
54 #include <linux/iio/trigger_consumer.h>
55 #include <linux/iio/triggered_buffer.h>
56
57 #define GP2A_I2C_NAME "gp2ap020a00f"
58
59 /* Registers */
60 #define GP2AP020A00F_OP_REG 0x00 /* Basic operations */
61 #define GP2AP020A00F_ALS_REG 0x01 /* ALS related settings */
62 #define GP2AP020A00F_PS_REG 0x02 /* PS related settings */
63 #define GP2AP020A00F_LED_REG 0x03 /* LED reg */
64 #define GP2AP020A00F_TL_L_REG 0x04 /* ALS: Threshold low LSB */
65 #define GP2AP020A00F_TL_H_REG 0x05 /* ALS: Threshold low MSB */
66 #define GP2AP020A00F_TH_L_REG 0x06 /* ALS: Threshold high LSB */
67 #define GP2AP020A00F_TH_H_REG 0x07 /* ALS: Threshold high MSB */
68 #define GP2AP020A00F_PL_L_REG 0x08 /* PS: Threshold low LSB */
69 #define GP2AP020A00F_PL_H_REG 0x09 /* PS: Threshold low MSB */
70 #define GP2AP020A00F_PH_L_REG 0x0a /* PS: Threshold high LSB */
71 #define GP2AP020A00F_PH_H_REG 0x0b /* PS: Threshold high MSB */
72 #define GP2AP020A00F_D0_L_REG 0x0c /* ALS result: Clear/Illuminance LSB */
73 #define GP2AP020A00F_D0_H_REG 0x0d /* ALS result: Clear/Illuminance MSB */
74 #define GP2AP020A00F_D1_L_REG 0x0e /* ALS result: IR LSB */
75 #define GP2AP020A00F_D1_H_REG 0x0f /* ALS result: IR LSB */
76 #define GP2AP020A00F_D2_L_REG 0x10 /* PS result LSB */
77 #define GP2AP020A00F_D2_H_REG 0x11 /* PS result MSB */
78 #define GP2AP020A00F_NUM_REGS 0x12 /* Number of registers */
79
80 /* OP_REG bits */
81 #define GP2AP020A00F_OP3_MASK 0x80 /* Software shutdown */
82 #define GP2AP020A00F_OP3_SHUTDOWN 0x00
83 #define GP2AP020A00F_OP3_OPERATION 0x80
84 #define GP2AP020A00F_OP2_MASK 0x40 /* Auto shutdown/Continuous mode */
85 #define GP2AP020A00F_OP2_AUTO_SHUTDOWN 0x00
86 #define GP2AP020A00F_OP2_CONT_OPERATION 0x40
87 #define GP2AP020A00F_OP_MASK 0x30 /* Operating mode selection */
88 #define GP2AP020A00F_OP_ALS_AND_PS 0x00
89 #define GP2AP020A00F_OP_ALS 0x10
90 #define GP2AP020A00F_OP_PS 0x20
91 #define GP2AP020A00F_OP_DEBUG 0x30
92 #define GP2AP020A00F_PROX_MASK 0x08 /* PS: detection/non-detection */
93 #define GP2AP020A00F_PROX_NON_DETECT 0x00
94 #define GP2AP020A00F_PROX_DETECT 0x08
95 #define GP2AP020A00F_FLAG_P 0x04 /* PS: interrupt result */
96 #define GP2AP020A00F_FLAG_A 0x02 /* ALS: interrupt result */
97 #define GP2AP020A00F_TYPE_MASK 0x01 /* Output data type selection */
98 #define GP2AP020A00F_TYPE_MANUAL_CALC 0x00
99 #define GP2AP020A00F_TYPE_AUTO_CALC 0x01
100
101 /* ALS_REG bits */
102 #define GP2AP020A00F_PRST_MASK 0xc0 /* Number of measurement cycles */
103 #define GP2AP020A00F_PRST_ONCE 0x00
104 #define GP2AP020A00F_PRST_4_CYCLES 0x40
105 #define GP2AP020A00F_PRST_8_CYCLES 0x80
106 #define GP2AP020A00F_PRST_16_CYCLES 0xc0
107 #define GP2AP020A00F_RES_A_MASK 0x38 /* ALS: Resolution */
108 #define GP2AP020A00F_RES_A_800ms 0x00
109 #define GP2AP020A00F_RES_A_400ms 0x08
110 #define GP2AP020A00F_RES_A_200ms 0x10
111 #define GP2AP020A00F_RES_A_100ms 0x18
112 #define GP2AP020A00F_RES_A_25ms 0x20
113 #define GP2AP020A00F_RES_A_6_25ms 0x28
114 #define GP2AP020A00F_RES_A_1_56ms 0x30
115 #define GP2AP020A00F_RES_A_0_39ms 0x38
116 #define GP2AP020A00F_RANGE_A_MASK 0x07 /* ALS: Max measurable range */
117 #define GP2AP020A00F_RANGE_A_x1 0x00
118 #define GP2AP020A00F_RANGE_A_x2 0x01
119 #define GP2AP020A00F_RANGE_A_x4 0x02
120 #define GP2AP020A00F_RANGE_A_x8 0x03
121 #define GP2AP020A00F_RANGE_A_x16 0x04
122 #define GP2AP020A00F_RANGE_A_x32 0x05
123 #define GP2AP020A00F_RANGE_A_x64 0x06
124 #define GP2AP020A00F_RANGE_A_x128 0x07
125
126 /* PS_REG bits */
127 #define GP2AP020A00F_ALC_MASK 0x80 /* Auto light cancel */
128 #define GP2AP020A00F_ALC_ON 0x80
129 #define GP2AP020A00F_ALC_OFF 0x00
130 #define GP2AP020A00F_INTTYPE_MASK 0x40 /* Interrupt type setting */
131 #define GP2AP020A00F_INTTYPE_LEVEL 0x00
132 #define GP2AP020A00F_INTTYPE_PULSE 0x40
133 #define GP2AP020A00F_RES_P_MASK 0x38 /* PS: Resolution */
134 #define GP2AP020A00F_RES_P_800ms_x2 0x00
135 #define GP2AP020A00F_RES_P_400ms_x2 0x08
136 #define GP2AP020A00F_RES_P_200ms_x2 0x10
137 #define GP2AP020A00F_RES_P_100ms_x2 0x18
138 #define GP2AP020A00F_RES_P_25ms_x2 0x20
139 #define GP2AP020A00F_RES_P_6_25ms_x2 0x28
140 #define GP2AP020A00F_RES_P_1_56ms_x2 0x30
141 #define GP2AP020A00F_RES_P_0_39ms_x2 0x38
142 #define GP2AP020A00F_RANGE_P_MASK 0x07 /* PS: Max measurable range */
143 #define GP2AP020A00F_RANGE_P_x1 0x00
144 #define GP2AP020A00F_RANGE_P_x2 0x01
145 #define GP2AP020A00F_RANGE_P_x4 0x02
146 #define GP2AP020A00F_RANGE_P_x8 0x03
147 #define GP2AP020A00F_RANGE_P_x16 0x04
148 #define GP2AP020A00F_RANGE_P_x32 0x05
149 #define GP2AP020A00F_RANGE_P_x64 0x06
150 #define GP2AP020A00F_RANGE_P_x128 0x07
151
152 /* LED reg bits */
153 #define GP2AP020A00F_INTVAL_MASK 0xc0 /* Intermittent operating */
154 #define GP2AP020A00F_INTVAL_0 0x00
155 #define GP2AP020A00F_INTVAL_4 0x40
156 #define GP2AP020A00F_INTVAL_8 0x80
157 #define GP2AP020A00F_INTVAL_16 0xc0
158 #define GP2AP020A00F_IS_MASK 0x30 /* ILED drive peak current */
159 #define GP2AP020A00F_IS_13_8mA 0x00
160 #define GP2AP020A00F_IS_27_5mA 0x10
161 #define GP2AP020A00F_IS_55mA 0x20
162 #define GP2AP020A00F_IS_110mA 0x30
163 #define GP2AP020A00F_PIN_MASK 0x0c /* INT terminal setting */
164 #define GP2AP020A00F_PIN_ALS_OR_PS 0x00
165 #define GP2AP020A00F_PIN_ALS 0x04
166 #define GP2AP020A00F_PIN_PS 0x08
167 #define GP2AP020A00F_PIN_PS_DETECT 0x0c
168 #define GP2AP020A00F_FREQ_MASK 0x02 /* LED modulation frequency */
169 #define GP2AP020A00F_FREQ_327_5kHz 0x00
170 #define GP2AP020A00F_FREQ_81_8kHz 0x02
171 #define GP2AP020A00F_RST 0x01 /* Software reset */
172
173 #define GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR 0
174 #define GP2AP020A00F_SCAN_MODE_LIGHT_IR 1
175 #define GP2AP020A00F_SCAN_MODE_PROXIMITY 2
176 #define GP2AP020A00F_CHAN_TIMESTAMP 3
177
178 #define GP2AP020A00F_DATA_READY_TIMEOUT msecs_to_jiffies(1000)
179 #define GP2AP020A00F_DATA_REG(chan) (GP2AP020A00F_D0_L_REG + \
180 (chan) * 2)
181 #define GP2AP020A00F_THRESH_REG(th_val_id) (GP2AP020A00F_TL_L_REG + \
182 (th_val_id) * 2)
183 #define GP2AP020A00F_THRESH_VAL_ID(reg_addr) ((reg_addr - 4) / 2)
184
185 #define GP2AP020A00F_SUBTRACT_MODE 0
186 #define GP2AP020A00F_ADD_MODE 1
187
188 #define GP2AP020A00F_MAX_CHANNELS 3
189
190 enum gp2ap020a00f_opmode {
191 GP2AP020A00F_OPMODE_READ_RAW_CLEAR,
192 GP2AP020A00F_OPMODE_READ_RAW_IR,
193 GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY,
194 GP2AP020A00F_OPMODE_ALS,
195 GP2AP020A00F_OPMODE_PS,
196 GP2AP020A00F_OPMODE_ALS_AND_PS,
197 GP2AP020A00F_OPMODE_PROX_DETECT,
198 GP2AP020A00F_OPMODE_SHUTDOWN,
199 GP2AP020A00F_NUM_OPMODES,
200 };
201
202 enum gp2ap020a00f_cmd {
203 GP2AP020A00F_CMD_READ_RAW_CLEAR,
204 GP2AP020A00F_CMD_READ_RAW_IR,
205 GP2AP020A00F_CMD_READ_RAW_PROXIMITY,
206 GP2AP020A00F_CMD_TRIGGER_CLEAR_EN,
207 GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS,
208 GP2AP020A00F_CMD_TRIGGER_IR_EN,
209 GP2AP020A00F_CMD_TRIGGER_IR_DIS,
210 GP2AP020A00F_CMD_TRIGGER_PROX_EN,
211 GP2AP020A00F_CMD_TRIGGER_PROX_DIS,
212 GP2AP020A00F_CMD_ALS_HIGH_EV_EN,
213 GP2AP020A00F_CMD_ALS_HIGH_EV_DIS,
214 GP2AP020A00F_CMD_ALS_LOW_EV_EN,
215 GP2AP020A00F_CMD_ALS_LOW_EV_DIS,
216 GP2AP020A00F_CMD_PROX_HIGH_EV_EN,
217 GP2AP020A00F_CMD_PROX_HIGH_EV_DIS,
218 GP2AP020A00F_CMD_PROX_LOW_EV_EN,
219 GP2AP020A00F_CMD_PROX_LOW_EV_DIS,
220 };
221
222 enum gp2ap020a00f_flags {
223 GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER,
224 GP2AP020A00F_FLAG_ALS_IR_TRIGGER,
225 GP2AP020A00F_FLAG_PROX_TRIGGER,
226 GP2AP020A00F_FLAG_PROX_RISING_EV,
227 GP2AP020A00F_FLAG_PROX_FALLING_EV,
228 GP2AP020A00F_FLAG_ALS_RISING_EV,
229 GP2AP020A00F_FLAG_ALS_FALLING_EV,
230 GP2AP020A00F_FLAG_LUX_MODE_HI,
231 GP2AP020A00F_FLAG_DATA_READY,
232 };
233
234 enum gp2ap020a00f_thresh_val_id {
235 GP2AP020A00F_THRESH_TL,
236 GP2AP020A00F_THRESH_TH,
237 GP2AP020A00F_THRESH_PL,
238 GP2AP020A00F_THRESH_PH,
239 };
240
241 struct gp2ap020a00f_data {
242 const struct gp2ap020a00f_platform_data *pdata;
243 struct i2c_client *client;
244 struct mutex lock;
245 char *buffer;
246 struct regulator *vled_reg;
247 unsigned long flags;
248 enum gp2ap020a00f_opmode cur_opmode;
249 struct iio_trigger *trig;
250 struct regmap *regmap;
251 unsigned int thresh_val[4];
252 u8 debug_reg_addr;
253 struct irq_work work;
254 wait_queue_head_t data_ready_queue;
255 };
256
257 static const u8 gp2ap020a00f_reg_init_tab[] = {
258 [GP2AP020A00F_OP_REG] = GP2AP020A00F_OP3_SHUTDOWN,
259 [GP2AP020A00F_ALS_REG] = GP2AP020A00F_RES_A_25ms |
260 GP2AP020A00F_RANGE_A_x8,
261 [GP2AP020A00F_PS_REG] = GP2AP020A00F_ALC_ON |
262 GP2AP020A00F_RES_P_1_56ms_x2 |
263 GP2AP020A00F_RANGE_P_x4,
264 [GP2AP020A00F_LED_REG] = GP2AP020A00F_INTVAL_0 |
265 GP2AP020A00F_IS_110mA |
266 GP2AP020A00F_FREQ_327_5kHz,
267 [GP2AP020A00F_TL_L_REG] = 0,
268 [GP2AP020A00F_TL_H_REG] = 0,
269 [GP2AP020A00F_TH_L_REG] = 0,
270 [GP2AP020A00F_TH_H_REG] = 0,
271 [GP2AP020A00F_PL_L_REG] = 0,
272 [GP2AP020A00F_PL_H_REG] = 0,
273 [GP2AP020A00F_PH_L_REG] = 0,
274 [GP2AP020A00F_PH_H_REG] = 0,
275 };
276
277 static bool gp2ap020a00f_is_volatile_reg(struct device *dev, unsigned int reg)
278 {
279 switch (reg) {
280 case GP2AP020A00F_OP_REG:
281 case GP2AP020A00F_D0_L_REG:
282 case GP2AP020A00F_D0_H_REG:
283 case GP2AP020A00F_D1_L_REG:
284 case GP2AP020A00F_D1_H_REG:
285 case GP2AP020A00F_D2_L_REG:
286 case GP2AP020A00F_D2_H_REG:
287 return true;
288 default:
289 return false;
290 }
291 }
292
293 static const struct regmap_config gp2ap020a00f_regmap_config = {
294 .reg_bits = 8,
295 .val_bits = 8,
296
297 .max_register = GP2AP020A00F_D2_H_REG,
298 .cache_type = REGCACHE_RBTREE,
299
300 .volatile_reg = gp2ap020a00f_is_volatile_reg,
301 };
302
303 static const struct gp2ap020a00f_mutable_config_regs {
304 u8 op_reg;
305 u8 als_reg;
306 u8 ps_reg;
307 u8 led_reg;
308 } opmode_regs_settings[GP2AP020A00F_NUM_OPMODES] = {
309 [GP2AP020A00F_OPMODE_READ_RAW_CLEAR] = {
310 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
311 | GP2AP020A00F_OP3_OPERATION
312 | GP2AP020A00F_TYPE_AUTO_CALC,
313 GP2AP020A00F_PRST_ONCE,
314 GP2AP020A00F_INTTYPE_LEVEL,
315 GP2AP020A00F_PIN_ALS
316 },
317 [GP2AP020A00F_OPMODE_READ_RAW_IR] = {
318 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
319 | GP2AP020A00F_OP3_OPERATION
320 | GP2AP020A00F_TYPE_MANUAL_CALC,
321 GP2AP020A00F_PRST_ONCE,
322 GP2AP020A00F_INTTYPE_LEVEL,
323 GP2AP020A00F_PIN_ALS
324 },
325 [GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY] = {
326 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
327 | GP2AP020A00F_OP3_OPERATION
328 | GP2AP020A00F_TYPE_MANUAL_CALC,
329 GP2AP020A00F_PRST_ONCE,
330 GP2AP020A00F_INTTYPE_LEVEL,
331 GP2AP020A00F_PIN_PS
332 },
333 [GP2AP020A00F_OPMODE_PROX_DETECT] = {
334 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
335 | GP2AP020A00F_OP3_OPERATION
336 | GP2AP020A00F_TYPE_MANUAL_CALC,
337 GP2AP020A00F_PRST_4_CYCLES,
338 GP2AP020A00F_INTTYPE_PULSE,
339 GP2AP020A00F_PIN_PS_DETECT
340 },
341 [GP2AP020A00F_OPMODE_ALS] = {
342 GP2AP020A00F_OP_ALS | GP2AP020A00F_OP2_CONT_OPERATION
343 | GP2AP020A00F_OP3_OPERATION
344 | GP2AP020A00F_TYPE_AUTO_CALC,
345 GP2AP020A00F_PRST_ONCE,
346 GP2AP020A00F_INTTYPE_LEVEL,
347 GP2AP020A00F_PIN_ALS
348 },
349 [GP2AP020A00F_OPMODE_PS] = {
350 GP2AP020A00F_OP_PS | GP2AP020A00F_OP2_CONT_OPERATION
351 | GP2AP020A00F_OP3_OPERATION
352 | GP2AP020A00F_TYPE_MANUAL_CALC,
353 GP2AP020A00F_PRST_4_CYCLES,
354 GP2AP020A00F_INTTYPE_LEVEL,
355 GP2AP020A00F_PIN_PS
356 },
357 [GP2AP020A00F_OPMODE_ALS_AND_PS] = {
358 GP2AP020A00F_OP_ALS_AND_PS
359 | GP2AP020A00F_OP2_CONT_OPERATION
360 | GP2AP020A00F_OP3_OPERATION
361 | GP2AP020A00F_TYPE_AUTO_CALC,
362 GP2AP020A00F_PRST_4_CYCLES,
363 GP2AP020A00F_INTTYPE_LEVEL,
364 GP2AP020A00F_PIN_ALS_OR_PS
365 },
366 [GP2AP020A00F_OPMODE_SHUTDOWN] = { GP2AP020A00F_OP3_SHUTDOWN, },
367 };
368
369 static int gp2ap020a00f_set_operation_mode(struct gp2ap020a00f_data *data,
370 enum gp2ap020a00f_opmode op)
371 {
372 unsigned int op_reg_val;
373 int err;
374
375 if (op != GP2AP020A00F_OPMODE_SHUTDOWN) {
376 err = regmap_read(data->regmap, GP2AP020A00F_OP_REG,
377 &op_reg_val);
378 if (err < 0)
379 return err;
380 /*
381 * Shutdown the device if the operation being executed entails
382 * mode transition.
383 */
384 if ((opmode_regs_settings[op].op_reg & GP2AP020A00F_OP_MASK) !=
385 (op_reg_val & GP2AP020A00F_OP_MASK)) {
386 /* set shutdown mode */
387 err = regmap_update_bits(data->regmap,
388 GP2AP020A00F_OP_REG, GP2AP020A00F_OP3_MASK,
389 GP2AP020A00F_OP3_SHUTDOWN);
390 if (err < 0)
391 return err;
392 }
393
394 err = regmap_update_bits(data->regmap, GP2AP020A00F_ALS_REG,
395 GP2AP020A00F_PRST_MASK, opmode_regs_settings[op]
396 .als_reg);
397 if (err < 0)
398 return err;
399
400 err = regmap_update_bits(data->regmap, GP2AP020A00F_PS_REG,
401 GP2AP020A00F_INTTYPE_MASK, opmode_regs_settings[op]
402 .ps_reg);
403 if (err < 0)
404 return err;
405
406 err = regmap_update_bits(data->regmap, GP2AP020A00F_LED_REG,
407 GP2AP020A00F_PIN_MASK, opmode_regs_settings[op]
408 .led_reg);
409 if (err < 0)
410 return err;
411 }
412
413 /* Set OP_REG and apply operation mode (power on / off) */
414 err = regmap_update_bits(data->regmap,
415 GP2AP020A00F_OP_REG,
416 GP2AP020A00F_OP_MASK | GP2AP020A00F_OP2_MASK |
417 GP2AP020A00F_OP3_MASK | GP2AP020A00F_TYPE_MASK,
418 opmode_regs_settings[op].op_reg);
419 if (err < 0)
420 return err;
421
422 data->cur_opmode = op;
423
424 return 0;
425 }
426
427 static bool gp2ap020a00f_als_enabled(struct gp2ap020a00f_data *data)
428 {
429 return test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags) ||
430 test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags) ||
431 test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags) ||
432 test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
433 }
434
435 static bool gp2ap020a00f_prox_detect_enabled(struct gp2ap020a00f_data *data)
436 {
437 return test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags) ||
438 test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
439 }
440
441 static int gp2ap020a00f_write_event_threshold(struct gp2ap020a00f_data *data,
442 enum gp2ap020a00f_thresh_val_id th_val_id,
443 bool enable)
444 {
445 __le16 thresh_buf = 0;
446 unsigned int thresh_reg_val;
447
448 if (!enable)
449 thresh_reg_val = 0;
450 else if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags) &&
451 th_val_id != GP2AP020A00F_THRESH_PL &&
452 th_val_id != GP2AP020A00F_THRESH_PH)
453 /*
454 * For the high lux mode ALS threshold has to be scaled down
455 * to allow for proper comparison with the output value.
456 */
457 thresh_reg_val = data->thresh_val[th_val_id] / 16;
458 else
459 thresh_reg_val = data->thresh_val[th_val_id] > 16000 ?
460 16000 :
461 data->thresh_val[th_val_id];
462
463 thresh_buf = cpu_to_le16(thresh_reg_val);
464
465 return regmap_bulk_write(data->regmap,
466 GP2AP020A00F_THRESH_REG(th_val_id),
467 (u8 *)&thresh_buf, 2);
468 }
469
470 static int gp2ap020a00f_alter_opmode(struct gp2ap020a00f_data *data,
471 enum gp2ap020a00f_opmode diff_mode, int add_sub)
472 {
473 enum gp2ap020a00f_opmode new_mode;
474
475 if (diff_mode != GP2AP020A00F_OPMODE_ALS &&
476 diff_mode != GP2AP020A00F_OPMODE_PS)
477 return -EINVAL;
478
479 if (add_sub == GP2AP020A00F_ADD_MODE) {
480 if (data->cur_opmode == GP2AP020A00F_OPMODE_SHUTDOWN)
481 new_mode = diff_mode;
482 else
483 new_mode = GP2AP020A00F_OPMODE_ALS_AND_PS;
484 } else {
485 if (data->cur_opmode == GP2AP020A00F_OPMODE_ALS_AND_PS)
486 new_mode = (diff_mode == GP2AP020A00F_OPMODE_ALS) ?
487 GP2AP020A00F_OPMODE_PS :
488 GP2AP020A00F_OPMODE_ALS;
489 else
490 new_mode = GP2AP020A00F_OPMODE_SHUTDOWN;
491 }
492
493 return gp2ap020a00f_set_operation_mode(data, new_mode);
494 }
495
496 static int gp2ap020a00f_exec_cmd(struct gp2ap020a00f_data *data,
497 enum gp2ap020a00f_cmd cmd)
498 {
499 int err = 0;
500
501 switch (cmd) {
502 case GP2AP020A00F_CMD_READ_RAW_CLEAR:
503 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
504 return -EBUSY;
505 err = gp2ap020a00f_set_operation_mode(data,
506 GP2AP020A00F_OPMODE_READ_RAW_CLEAR);
507 break;
508 case GP2AP020A00F_CMD_READ_RAW_IR:
509 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
510 return -EBUSY;
511 err = gp2ap020a00f_set_operation_mode(data,
512 GP2AP020A00F_OPMODE_READ_RAW_IR);
513 break;
514 case GP2AP020A00F_CMD_READ_RAW_PROXIMITY:
515 if (data->cur_opmode != GP2AP020A00F_OPMODE_SHUTDOWN)
516 return -EBUSY;
517 err = gp2ap020a00f_set_operation_mode(data,
518 GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY);
519 break;
520 case GP2AP020A00F_CMD_TRIGGER_CLEAR_EN:
521 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
522 return -EBUSY;
523 if (!gp2ap020a00f_als_enabled(data))
524 err = gp2ap020a00f_alter_opmode(data,
525 GP2AP020A00F_OPMODE_ALS,
526 GP2AP020A00F_ADD_MODE);
527 set_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
528 break;
529 case GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS:
530 clear_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &data->flags);
531 if (gp2ap020a00f_als_enabled(data))
532 break;
533 err = gp2ap020a00f_alter_opmode(data,
534 GP2AP020A00F_OPMODE_ALS,
535 GP2AP020A00F_SUBTRACT_MODE);
536 break;
537 case GP2AP020A00F_CMD_TRIGGER_IR_EN:
538 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
539 return -EBUSY;
540 if (!gp2ap020a00f_als_enabled(data))
541 err = gp2ap020a00f_alter_opmode(data,
542 GP2AP020A00F_OPMODE_ALS,
543 GP2AP020A00F_ADD_MODE);
544 set_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
545 break;
546 case GP2AP020A00F_CMD_TRIGGER_IR_DIS:
547 clear_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &data->flags);
548 if (gp2ap020a00f_als_enabled(data))
549 break;
550 err = gp2ap020a00f_alter_opmode(data,
551 GP2AP020A00F_OPMODE_ALS,
552 GP2AP020A00F_SUBTRACT_MODE);
553 break;
554 case GP2AP020A00F_CMD_TRIGGER_PROX_EN:
555 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
556 return -EBUSY;
557 err = gp2ap020a00f_alter_opmode(data,
558 GP2AP020A00F_OPMODE_PS,
559 GP2AP020A00F_ADD_MODE);
560 set_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
561 break;
562 case GP2AP020A00F_CMD_TRIGGER_PROX_DIS:
563 clear_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &data->flags);
564 err = gp2ap020a00f_alter_opmode(data,
565 GP2AP020A00F_OPMODE_PS,
566 GP2AP020A00F_SUBTRACT_MODE);
567 break;
568 case GP2AP020A00F_CMD_ALS_HIGH_EV_EN:
569 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
570 return 0;
571 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
572 return -EBUSY;
573 if (!gp2ap020a00f_als_enabled(data)) {
574 err = gp2ap020a00f_alter_opmode(data,
575 GP2AP020A00F_OPMODE_ALS,
576 GP2AP020A00F_ADD_MODE);
577 if (err < 0)
578 return err;
579 }
580 set_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
581 err = gp2ap020a00f_write_event_threshold(data,
582 GP2AP020A00F_THRESH_TH, true);
583 break;
584 case GP2AP020A00F_CMD_ALS_HIGH_EV_DIS:
585 if (!test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags))
586 return 0;
587 clear_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags);
588 if (!gp2ap020a00f_als_enabled(data)) {
589 err = gp2ap020a00f_alter_opmode(data,
590 GP2AP020A00F_OPMODE_ALS,
591 GP2AP020A00F_SUBTRACT_MODE);
592 if (err < 0)
593 return err;
594 }
595 err = gp2ap020a00f_write_event_threshold(data,
596 GP2AP020A00F_THRESH_TH, false);
597 break;
598 case GP2AP020A00F_CMD_ALS_LOW_EV_EN:
599 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
600 return 0;
601 if (data->cur_opmode == GP2AP020A00F_OPMODE_PROX_DETECT)
602 return -EBUSY;
603 if (!gp2ap020a00f_als_enabled(data)) {
604 err = gp2ap020a00f_alter_opmode(data,
605 GP2AP020A00F_OPMODE_ALS,
606 GP2AP020A00F_ADD_MODE);
607 if (err < 0)
608 return err;
609 }
610 set_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
611 err = gp2ap020a00f_write_event_threshold(data,
612 GP2AP020A00F_THRESH_TL, true);
613 break;
614 case GP2AP020A00F_CMD_ALS_LOW_EV_DIS:
615 if (!test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags))
616 return 0;
617 clear_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags);
618 if (!gp2ap020a00f_als_enabled(data)) {
619 err = gp2ap020a00f_alter_opmode(data,
620 GP2AP020A00F_OPMODE_ALS,
621 GP2AP020A00F_SUBTRACT_MODE);
622 if (err < 0)
623 return err;
624 }
625 err = gp2ap020a00f_write_event_threshold(data,
626 GP2AP020A00F_THRESH_TL, false);
627 break;
628 case GP2AP020A00F_CMD_PROX_HIGH_EV_EN:
629 if (test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
630 return 0;
631 if (gp2ap020a00f_als_enabled(data) ||
632 data->cur_opmode == GP2AP020A00F_OPMODE_PS)
633 return -EBUSY;
634 if (!gp2ap020a00f_prox_detect_enabled(data)) {
635 err = gp2ap020a00f_set_operation_mode(data,
636 GP2AP020A00F_OPMODE_PROX_DETECT);
637 if (err < 0)
638 return err;
639 }
640 set_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
641 err = gp2ap020a00f_write_event_threshold(data,
642 GP2AP020A00F_THRESH_PH, true);
643 break;
644 case GP2AP020A00F_CMD_PROX_HIGH_EV_DIS:
645 if (!test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags))
646 return 0;
647 clear_bit(GP2AP020A00F_FLAG_PROX_RISING_EV, &data->flags);
648 err = gp2ap020a00f_set_operation_mode(data,
649 GP2AP020A00F_OPMODE_SHUTDOWN);
650 if (err < 0)
651 return err;
652 err = gp2ap020a00f_write_event_threshold(data,
653 GP2AP020A00F_THRESH_PH, false);
654 break;
655 case GP2AP020A00F_CMD_PROX_LOW_EV_EN:
656 if (test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
657 return 0;
658 if (gp2ap020a00f_als_enabled(data) ||
659 data->cur_opmode == GP2AP020A00F_OPMODE_PS)
660 return -EBUSY;
661 if (!gp2ap020a00f_prox_detect_enabled(data)) {
662 err = gp2ap020a00f_set_operation_mode(data,
663 GP2AP020A00F_OPMODE_PROX_DETECT);
664 if (err < 0)
665 return err;
666 }
667 set_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
668 err = gp2ap020a00f_write_event_threshold(data,
669 GP2AP020A00F_THRESH_PL, true);
670 break;
671 case GP2AP020A00F_CMD_PROX_LOW_EV_DIS:
672 if (!test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags))
673 return 0;
674 clear_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV, &data->flags);
675 err = gp2ap020a00f_set_operation_mode(data,
676 GP2AP020A00F_OPMODE_SHUTDOWN);
677 if (err < 0)
678 return err;
679 err = gp2ap020a00f_write_event_threshold(data,
680 GP2AP020A00F_THRESH_PL, false);
681 break;
682 }
683
684 return err;
685 }
686
687 static int wait_conversion_complete_irq(struct gp2ap020a00f_data *data)
688 {
689 int ret;
690
691 ret = wait_event_timeout(data->data_ready_queue,
692 test_bit(GP2AP020A00F_FLAG_DATA_READY,
693 &data->flags),
694 GP2AP020A00F_DATA_READY_TIMEOUT);
695 clear_bit(GP2AP020A00F_FLAG_DATA_READY, &data->flags);
696
697 return ret > 0 ? 0 : -ETIME;
698 }
699
700 static int gp2ap020a00f_read_output(struct gp2ap020a00f_data *data,
701 unsigned int output_reg, int *val)
702 {
703 u8 reg_buf[2];
704 int err;
705
706 err = wait_conversion_complete_irq(data);
707 if (err < 0)
708 dev_dbg(&data->client->dev, "data ready timeout\n");
709
710 err = regmap_bulk_read(data->regmap, output_reg, reg_buf, 2);
711 if (err < 0)
712 return err;
713
714 *val = le16_to_cpup((__le16 *)reg_buf);
715
716 return err;
717 }
718
719 static bool gp2ap020a00f_adjust_lux_mode(struct gp2ap020a00f_data *data,
720 int output_val)
721 {
722 u8 new_range = 0xff;
723 int err;
724
725 if (!test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags)) {
726 if (output_val > 16000) {
727 set_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
728 new_range = GP2AP020A00F_RANGE_A_x128;
729 }
730 } else {
731 if (output_val < 1000) {
732 clear_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags);
733 new_range = GP2AP020A00F_RANGE_A_x8;
734 }
735 }
736
737 if (new_range != 0xff) {
738 /* Clear als threshold registers to avoid spurious
739 * events caused by lux mode transition.
740 */
741 err = gp2ap020a00f_write_event_threshold(data,
742 GP2AP020A00F_THRESH_TH, false);
743 if (err < 0) {
744 dev_err(&data->client->dev,
745 "Clearing als threshold register failed.\n");
746 return false;
747 }
748
749 err = gp2ap020a00f_write_event_threshold(data,
750 GP2AP020A00F_THRESH_TL, false);
751 if (err < 0) {
752 dev_err(&data->client->dev,
753 "Clearing als threshold register failed.\n");
754 return false;
755 }
756
757 /* Change lux mode */
758 err = regmap_update_bits(data->regmap,
759 GP2AP020A00F_OP_REG,
760 GP2AP020A00F_OP3_MASK,
761 GP2AP020A00F_OP3_SHUTDOWN);
762
763 if (err < 0) {
764 dev_err(&data->client->dev,
765 "Shutting down the device failed.\n");
766 return false;
767 }
768
769 err = regmap_update_bits(data->regmap,
770 GP2AP020A00F_ALS_REG,
771 GP2AP020A00F_RANGE_A_MASK,
772 new_range);
773
774 if (err < 0) {
775 dev_err(&data->client->dev,
776 "Adjusting device lux mode failed.\n");
777 return false;
778 }
779
780 err = regmap_update_bits(data->regmap,
781 GP2AP020A00F_OP_REG,
782 GP2AP020A00F_OP3_MASK,
783 GP2AP020A00F_OP3_OPERATION);
784
785 if (err < 0) {
786 dev_err(&data->client->dev,
787 "Powering up the device failed.\n");
788 return false;
789 }
790
791 /* Adjust als threshold register values to the new lux mode */
792 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &data->flags)) {
793 err = gp2ap020a00f_write_event_threshold(data,
794 GP2AP020A00F_THRESH_TH, true);
795 if (err < 0) {
796 dev_err(&data->client->dev,
797 "Adjusting als threshold value failed.\n");
798 return false;
799 }
800 }
801
802 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &data->flags)) {
803 err = gp2ap020a00f_write_event_threshold(data,
804 GP2AP020A00F_THRESH_TL, true);
805 if (err < 0) {
806 dev_err(&data->client->dev,
807 "Adjusting als threshold value failed.\n");
808 return false;
809 }
810 }
811
812 return true;
813 }
814
815 return false;
816 }
817
818 static void gp2ap020a00f_output_to_lux(struct gp2ap020a00f_data *data,
819 int *output_val)
820 {
821 if (test_bit(GP2AP020A00F_FLAG_LUX_MODE_HI, &data->flags))
822 *output_val *= 16;
823 }
824
825 static void gp2ap020a00f_iio_trigger_work(struct irq_work *work)
826 {
827 struct gp2ap020a00f_data *data =
828 container_of(work, struct gp2ap020a00f_data, work);
829
830 iio_trigger_poll(data->trig);
831 }
832
833 static irqreturn_t gp2ap020a00f_prox_sensing_handler(int irq, void *data)
834 {
835 struct iio_dev *indio_dev = data;
836 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
837 unsigned int op_reg_val;
838 int ret;
839
840 /* Read interrupt flags */
841 ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG, &op_reg_val);
842 if (ret < 0)
843 return IRQ_HANDLED;
844
845 if (gp2ap020a00f_prox_detect_enabled(priv)) {
846 if (op_reg_val & GP2AP020A00F_PROX_DETECT) {
847 iio_push_event(indio_dev,
848 IIO_UNMOD_EVENT_CODE(
849 IIO_PROXIMITY,
850 GP2AP020A00F_SCAN_MODE_PROXIMITY,
851 IIO_EV_TYPE_ROC,
852 IIO_EV_DIR_RISING),
853 iio_get_time_ns());
854 } else {
855 iio_push_event(indio_dev,
856 IIO_UNMOD_EVENT_CODE(
857 IIO_PROXIMITY,
858 GP2AP020A00F_SCAN_MODE_PROXIMITY,
859 IIO_EV_TYPE_ROC,
860 IIO_EV_DIR_FALLING),
861 iio_get_time_ns());
862 }
863 }
864
865 return IRQ_HANDLED;
866 }
867
868 static irqreturn_t gp2ap020a00f_thresh_event_handler(int irq, void *data)
869 {
870 struct iio_dev *indio_dev = data;
871 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
872 u8 op_reg_flags, d0_reg_buf[2];
873 unsigned int output_val, op_reg_val;
874 int thresh_val_id, ret;
875
876 /* Read interrupt flags */
877 ret = regmap_read(priv->regmap, GP2AP020A00F_OP_REG,
878 &op_reg_val);
879 if (ret < 0)
880 goto done;
881
882 op_reg_flags = op_reg_val & (GP2AP020A00F_FLAG_A | GP2AP020A00F_FLAG_P
883 | GP2AP020A00F_PROX_DETECT);
884
885 op_reg_val &= (~GP2AP020A00F_FLAG_A & ~GP2AP020A00F_FLAG_P
886 & ~GP2AP020A00F_PROX_DETECT);
887
888 /* Clear interrupt flags (if not in INTTYPE_PULSE mode) */
889 if (priv->cur_opmode != GP2AP020A00F_OPMODE_PROX_DETECT) {
890 ret = regmap_write(priv->regmap, GP2AP020A00F_OP_REG,
891 op_reg_val);
892 if (ret < 0)
893 goto done;
894 }
895
896 if (op_reg_flags & GP2AP020A00F_FLAG_A) {
897 /* Check D0 register to assess if the lux mode
898 * transition is required.
899 */
900 ret = regmap_bulk_read(priv->regmap, GP2AP020A00F_D0_L_REG,
901 d0_reg_buf, 2);
902 if (ret < 0)
903 goto done;
904
905 output_val = le16_to_cpup((__le16 *)d0_reg_buf);
906
907 if (gp2ap020a00f_adjust_lux_mode(priv, output_val))
908 goto done;
909
910 gp2ap020a00f_output_to_lux(priv, &output_val);
911
912 /*
913 * We need to check output value to distinguish
914 * between high and low ambient light threshold event.
915 */
916 if (test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV, &priv->flags)) {
917 thresh_val_id =
918 GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TH_L_REG);
919 if (output_val > priv->thresh_val[thresh_val_id])
920 iio_push_event(indio_dev,
921 IIO_MOD_EVENT_CODE(
922 IIO_LIGHT,
923 GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
924 IIO_MOD_LIGHT_CLEAR,
925 IIO_EV_TYPE_THRESH,
926 IIO_EV_DIR_RISING),
927 iio_get_time_ns());
928 }
929
930 if (test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV, &priv->flags)) {
931 thresh_val_id =
932 GP2AP020A00F_THRESH_VAL_ID(GP2AP020A00F_TL_L_REG);
933 if (output_val < priv->thresh_val[thresh_val_id])
934 iio_push_event(indio_dev,
935 IIO_MOD_EVENT_CODE(
936 IIO_LIGHT,
937 GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
938 IIO_MOD_LIGHT_CLEAR,
939 IIO_EV_TYPE_THRESH,
940 IIO_EV_DIR_FALLING),
941 iio_get_time_ns());
942 }
943 }
944
945 if (priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_CLEAR ||
946 priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_IR ||
947 priv->cur_opmode == GP2AP020A00F_OPMODE_READ_RAW_PROXIMITY) {
948 set_bit(GP2AP020A00F_FLAG_DATA_READY, &priv->flags);
949 wake_up(&priv->data_ready_queue);
950 goto done;
951 }
952
953 if (test_bit(GP2AP020A00F_FLAG_ALS_CLEAR_TRIGGER, &priv->flags) ||
954 test_bit(GP2AP020A00F_FLAG_ALS_IR_TRIGGER, &priv->flags) ||
955 test_bit(GP2AP020A00F_FLAG_PROX_TRIGGER, &priv->flags))
956 /* This fires off the trigger. */
957 irq_work_queue(&priv->work);
958
959 done:
960 return IRQ_HANDLED;
961 }
962
963 static irqreturn_t gp2ap020a00f_trigger_handler(int irq, void *data)
964 {
965 struct iio_poll_func *pf = data;
966 struct iio_dev *indio_dev = pf->indio_dev;
967 struct gp2ap020a00f_data *priv = iio_priv(indio_dev);
968 size_t d_size = 0;
969 __le32 light_lux;
970 int i, out_val, ret;
971
972 for_each_set_bit(i, indio_dev->active_scan_mask,
973 indio_dev->masklength) {
974 ret = regmap_bulk_read(priv->regmap,
975 GP2AP020A00F_DATA_REG(i),
976 &priv->buffer[d_size], 2);
977 if (ret < 0)
978 goto done;
979
980 if (i == GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR ||
981 i == GP2AP020A00F_SCAN_MODE_LIGHT_IR) {
982 out_val = le16_to_cpup((__le16 *)&priv->buffer[d_size]);
983 gp2ap020a00f_output_to_lux(priv, &out_val);
984 light_lux = cpu_to_le32(out_val);
985 memcpy(&priv->buffer[d_size], (u8 *)&light_lux, 4);
986 d_size += 4;
987 } else {
988 d_size += 2;
989 }
990 }
991
992 iio_push_to_buffers_with_timestamp(indio_dev, priv->buffer,
993 pf->timestamp);
994 done:
995 iio_trigger_notify_done(indio_dev->trig);
996
997 return IRQ_HANDLED;
998 }
999
1000 static u8 gp2ap020a00f_get_thresh_reg(const struct iio_chan_spec *chan,
1001 enum iio_event_direction event_dir)
1002 {
1003 switch (chan->type) {
1004 case IIO_PROXIMITY:
1005 if (event_dir == IIO_EV_DIR_RISING)
1006 return GP2AP020A00F_PH_L_REG;
1007 else
1008 return GP2AP020A00F_PL_L_REG;
1009 case IIO_LIGHT:
1010 if (event_dir == IIO_EV_DIR_RISING)
1011 return GP2AP020A00F_TH_L_REG;
1012 else
1013 return GP2AP020A00F_TL_L_REG;
1014 default:
1015 break;
1016 }
1017
1018 return -EINVAL;
1019 }
1020
1021 static int gp2ap020a00f_write_event_val(struct iio_dev *indio_dev,
1022 const struct iio_chan_spec *chan,
1023 enum iio_event_type type,
1024 enum iio_event_direction dir,
1025 enum iio_event_info info,
1026 int val, int val2)
1027 {
1028 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1029 bool event_en = false;
1030 u8 thresh_val_id;
1031 u8 thresh_reg_l;
1032 int err = 0;
1033
1034 mutex_lock(&data->lock);
1035
1036 thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
1037 thresh_val_id = GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l);
1038
1039 if (thresh_val_id > GP2AP020A00F_THRESH_PH) {
1040 err = -EINVAL;
1041 goto error_unlock;
1042 }
1043
1044 switch (thresh_reg_l) {
1045 case GP2AP020A00F_TH_L_REG:
1046 event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
1047 &data->flags);
1048 break;
1049 case GP2AP020A00F_TL_L_REG:
1050 event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
1051 &data->flags);
1052 break;
1053 case GP2AP020A00F_PH_L_REG:
1054 if (val == 0) {
1055 err = -EINVAL;
1056 goto error_unlock;
1057 }
1058 event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
1059 &data->flags);
1060 break;
1061 case GP2AP020A00F_PL_L_REG:
1062 if (val == 0) {
1063 err = -EINVAL;
1064 goto error_unlock;
1065 }
1066 event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
1067 &data->flags);
1068 break;
1069 }
1070
1071 data->thresh_val[thresh_val_id] = val;
1072 err = gp2ap020a00f_write_event_threshold(data, thresh_val_id,
1073 event_en);
1074 error_unlock:
1075 mutex_unlock(&data->lock);
1076
1077 return err;
1078 }
1079
1080 static int gp2ap020a00f_read_event_val(struct iio_dev *indio_dev,
1081 const struct iio_chan_spec *chan,
1082 enum iio_event_type type,
1083 enum iio_event_direction dir,
1084 enum iio_event_info info,
1085 int *val, int *val2)
1086 {
1087 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1088 u8 thresh_reg_l;
1089 int err = IIO_VAL_INT;
1090
1091 mutex_lock(&data->lock);
1092
1093 thresh_reg_l = gp2ap020a00f_get_thresh_reg(chan, dir);
1094
1095 if (thresh_reg_l > GP2AP020A00F_PH_L_REG) {
1096 err = -EINVAL;
1097 goto error_unlock;
1098 }
1099
1100 *val = data->thresh_val[GP2AP020A00F_THRESH_VAL_ID(thresh_reg_l)];
1101
1102 error_unlock:
1103 mutex_unlock(&data->lock);
1104
1105 return err;
1106 }
1107
1108 static int gp2ap020a00f_write_prox_event_config(struct iio_dev *indio_dev,
1109 int state)
1110 {
1111 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1112 enum gp2ap020a00f_cmd cmd_high_ev, cmd_low_ev;
1113 int err;
1114
1115 cmd_high_ev = state ? GP2AP020A00F_CMD_PROX_HIGH_EV_EN :
1116 GP2AP020A00F_CMD_PROX_HIGH_EV_DIS;
1117 cmd_low_ev = state ? GP2AP020A00F_CMD_PROX_LOW_EV_EN :
1118 GP2AP020A00F_CMD_PROX_LOW_EV_DIS;
1119
1120 /*
1121 * In order to enable proximity detection feature in the device
1122 * both high and low threshold registers have to be written
1123 * with different values, greater than zero.
1124 */
1125 if (state) {
1126 if (data->thresh_val[GP2AP020A00F_THRESH_PL] == 0)
1127 return -EINVAL;
1128
1129 if (data->thresh_val[GP2AP020A00F_THRESH_PH] == 0)
1130 return -EINVAL;
1131 }
1132
1133 err = gp2ap020a00f_exec_cmd(data, cmd_high_ev);
1134 if (err < 0)
1135 return err;
1136
1137 err = gp2ap020a00f_exec_cmd(data, cmd_low_ev);
1138 if (err < 0)
1139 return err;
1140
1141 free_irq(data->client->irq, indio_dev);
1142
1143 if (state)
1144 err = request_threaded_irq(data->client->irq, NULL,
1145 &gp2ap020a00f_prox_sensing_handler,
1146 IRQF_TRIGGER_RISING |
1147 IRQF_TRIGGER_FALLING |
1148 IRQF_ONESHOT,
1149 "gp2ap020a00f_prox_sensing",
1150 indio_dev);
1151 else {
1152 err = request_threaded_irq(data->client->irq, NULL,
1153 &gp2ap020a00f_thresh_event_handler,
1154 IRQF_TRIGGER_FALLING |
1155 IRQF_ONESHOT,
1156 "gp2ap020a00f_thresh_event",
1157 indio_dev);
1158 }
1159
1160 return err;
1161 }
1162
1163 static int gp2ap020a00f_write_event_config(struct iio_dev *indio_dev,
1164 const struct iio_chan_spec *chan,
1165 enum iio_event_type type,
1166 enum iio_event_direction dir,
1167 int state)
1168 {
1169 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1170 enum gp2ap020a00f_cmd cmd;
1171 int err;
1172
1173 mutex_lock(&data->lock);
1174
1175 switch (chan->type) {
1176 case IIO_PROXIMITY:
1177 err = gp2ap020a00f_write_prox_event_config(indio_dev, state);
1178 break;
1179 case IIO_LIGHT:
1180 if (dir == IIO_EV_DIR_RISING) {
1181 cmd = state ? GP2AP020A00F_CMD_ALS_HIGH_EV_EN :
1182 GP2AP020A00F_CMD_ALS_HIGH_EV_DIS;
1183 err = gp2ap020a00f_exec_cmd(data, cmd);
1184 } else {
1185 cmd = state ? GP2AP020A00F_CMD_ALS_LOW_EV_EN :
1186 GP2AP020A00F_CMD_ALS_LOW_EV_DIS;
1187 err = gp2ap020a00f_exec_cmd(data, cmd);
1188 }
1189 break;
1190 default:
1191 err = -EINVAL;
1192 }
1193
1194 mutex_unlock(&data->lock);
1195
1196 return err;
1197 }
1198
1199 static int gp2ap020a00f_read_event_config(struct iio_dev *indio_dev,
1200 const struct iio_chan_spec *chan,
1201 enum iio_event_type type,
1202 enum iio_event_direction dir)
1203 {
1204 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1205 int event_en = 0;
1206
1207 mutex_lock(&data->lock);
1208
1209 switch (chan->type) {
1210 case IIO_PROXIMITY:
1211 if (dir == IIO_EV_DIR_RISING)
1212 event_en = test_bit(GP2AP020A00F_FLAG_PROX_RISING_EV,
1213 &data->flags);
1214 else
1215 event_en = test_bit(GP2AP020A00F_FLAG_PROX_FALLING_EV,
1216 &data->flags);
1217 break;
1218 case IIO_LIGHT:
1219 if (dir == IIO_EV_DIR_RISING)
1220 event_en = test_bit(GP2AP020A00F_FLAG_ALS_RISING_EV,
1221 &data->flags);
1222 else
1223 event_en = test_bit(GP2AP020A00F_FLAG_ALS_FALLING_EV,
1224 &data->flags);
1225 break;
1226 default:
1227 event_en = -EINVAL;
1228 break;
1229 }
1230
1231 mutex_unlock(&data->lock);
1232
1233 return event_en;
1234 }
1235
1236 static int gp2ap020a00f_read_channel(struct gp2ap020a00f_data *data,
1237 struct iio_chan_spec const *chan, int *val)
1238 {
1239 enum gp2ap020a00f_cmd cmd;
1240 int err;
1241
1242 switch (chan->scan_index) {
1243 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1244 cmd = GP2AP020A00F_CMD_READ_RAW_CLEAR;
1245 break;
1246 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1247 cmd = GP2AP020A00F_CMD_READ_RAW_IR;
1248 break;
1249 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1250 cmd = GP2AP020A00F_CMD_READ_RAW_PROXIMITY;
1251 break;
1252 default:
1253 return -EINVAL;
1254 }
1255
1256 err = gp2ap020a00f_exec_cmd(data, cmd);
1257 if (err < 0) {
1258 dev_err(&data->client->dev,
1259 "gp2ap020a00f_exec_cmd failed\n");
1260 goto error_ret;
1261 }
1262
1263 err = gp2ap020a00f_read_output(data, chan->address, val);
1264 if (err < 0)
1265 dev_err(&data->client->dev,
1266 "gp2ap020a00f_read_output failed\n");
1267
1268 err = gp2ap020a00f_set_operation_mode(data,
1269 GP2AP020A00F_OPMODE_SHUTDOWN);
1270 if (err < 0)
1271 dev_err(&data->client->dev,
1272 "Failed to shut down the device.\n");
1273
1274 if (cmd == GP2AP020A00F_CMD_READ_RAW_CLEAR ||
1275 cmd == GP2AP020A00F_CMD_READ_RAW_IR)
1276 gp2ap020a00f_output_to_lux(data, val);
1277
1278 error_ret:
1279 return err;
1280 }
1281
1282 static int gp2ap020a00f_read_raw(struct iio_dev *indio_dev,
1283 struct iio_chan_spec const *chan,
1284 int *val, int *val2,
1285 long mask)
1286 {
1287 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1288 int err = -EINVAL;
1289
1290 mutex_lock(&data->lock);
1291
1292 switch (mask) {
1293 case IIO_CHAN_INFO_RAW:
1294 if (iio_buffer_enabled(indio_dev)) {
1295 err = -EBUSY;
1296 goto error_unlock;
1297 }
1298
1299 err = gp2ap020a00f_read_channel(data, chan, val);
1300 break;
1301 }
1302
1303 error_unlock:
1304 mutex_unlock(&data->lock);
1305
1306 return err < 0 ? err : IIO_VAL_INT;
1307 }
1308
1309 static const struct iio_event_spec gp2ap020a00f_event_spec_light[] = {
1310 {
1311 .type = IIO_EV_TYPE_THRESH,
1312 .dir = IIO_EV_DIR_RISING,
1313 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1314 BIT(IIO_EV_INFO_ENABLE),
1315 }, {
1316 .type = IIO_EV_TYPE_THRESH,
1317 .dir = IIO_EV_DIR_FALLING,
1318 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1319 BIT(IIO_EV_INFO_ENABLE),
1320 },
1321 };
1322
1323 static const struct iio_event_spec gp2ap020a00f_event_spec_prox[] = {
1324 {
1325 .type = IIO_EV_TYPE_ROC,
1326 .dir = IIO_EV_DIR_RISING,
1327 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1328 BIT(IIO_EV_INFO_ENABLE),
1329 }, {
1330 .type = IIO_EV_TYPE_ROC,
1331 .dir = IIO_EV_DIR_FALLING,
1332 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
1333 BIT(IIO_EV_INFO_ENABLE),
1334 },
1335 };
1336
1337 static const struct iio_chan_spec gp2ap020a00f_channels[] = {
1338 {
1339 .type = IIO_LIGHT,
1340 .channel2 = IIO_MOD_LIGHT_CLEAR,
1341 .modified = 1,
1342 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1343 .scan_type = {
1344 .sign = 'u',
1345 .realbits = 24,
1346 .shift = 0,
1347 .storagebits = 32,
1348 .endianness = IIO_LE,
1349 },
1350 .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR,
1351 .address = GP2AP020A00F_D0_L_REG,
1352 .event_spec = gp2ap020a00f_event_spec_light,
1353 .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_light),
1354 },
1355 {
1356 .type = IIO_LIGHT,
1357 .channel2 = IIO_MOD_LIGHT_IR,
1358 .modified = 1,
1359 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1360 .scan_type = {
1361 .sign = 'u',
1362 .realbits = 24,
1363 .shift = 0,
1364 .storagebits = 32,
1365 .endianness = IIO_LE,
1366 },
1367 .scan_index = GP2AP020A00F_SCAN_MODE_LIGHT_IR,
1368 .address = GP2AP020A00F_D1_L_REG,
1369 },
1370 {
1371 .type = IIO_PROXIMITY,
1372 .modified = 0,
1373 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),
1374 .scan_type = {
1375 .sign = 'u',
1376 .realbits = 16,
1377 .shift = 0,
1378 .storagebits = 16,
1379 .endianness = IIO_LE,
1380 },
1381 .scan_index = GP2AP020A00F_SCAN_MODE_PROXIMITY,
1382 .address = GP2AP020A00F_D2_L_REG,
1383 .event_spec = gp2ap020a00f_event_spec_prox,
1384 .num_event_specs = ARRAY_SIZE(gp2ap020a00f_event_spec_prox),
1385 },
1386 IIO_CHAN_SOFT_TIMESTAMP(GP2AP020A00F_CHAN_TIMESTAMP),
1387 };
1388
1389 static const struct iio_info gp2ap020a00f_info = {
1390 .read_raw = &gp2ap020a00f_read_raw,
1391 .read_event_value = &gp2ap020a00f_read_event_val,
1392 .read_event_config = &gp2ap020a00f_read_event_config,
1393 .write_event_value = &gp2ap020a00f_write_event_val,
1394 .write_event_config = &gp2ap020a00f_write_event_config,
1395 .driver_module = THIS_MODULE,
1396 };
1397
1398 static int gp2ap020a00f_buffer_postenable(struct iio_dev *indio_dev)
1399 {
1400 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1401 int i, err = 0;
1402
1403 mutex_lock(&data->lock);
1404
1405 /*
1406 * Enable triggers according to the scan_mask. Enabling either
1407 * LIGHT_CLEAR or LIGHT_IR scan mode results in enabling ALS
1408 * module in the device, which generates samples in both D0 (clear)
1409 * and D1 (ir) registers. As the two registers are bound to the
1410 * two separate IIO channels they are treated in the driver logic
1411 * as if they were controlled independently.
1412 */
1413 for_each_set_bit(i, indio_dev->active_scan_mask,
1414 indio_dev->masklength) {
1415 switch (i) {
1416 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1417 err = gp2ap020a00f_exec_cmd(data,
1418 GP2AP020A00F_CMD_TRIGGER_CLEAR_EN);
1419 break;
1420 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1421 err = gp2ap020a00f_exec_cmd(data,
1422 GP2AP020A00F_CMD_TRIGGER_IR_EN);
1423 break;
1424 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1425 err = gp2ap020a00f_exec_cmd(data,
1426 GP2AP020A00F_CMD_TRIGGER_PROX_EN);
1427 break;
1428 }
1429 }
1430
1431 if (err < 0)
1432 goto error_unlock;
1433
1434 data->buffer = kmalloc(indio_dev->scan_bytes, GFP_KERNEL);
1435 if (!data->buffer) {
1436 err = -ENOMEM;
1437 goto error_unlock;
1438 }
1439
1440 err = iio_triggered_buffer_postenable(indio_dev);
1441
1442 error_unlock:
1443 mutex_unlock(&data->lock);
1444
1445 return err;
1446 }
1447
1448 static int gp2ap020a00f_buffer_predisable(struct iio_dev *indio_dev)
1449 {
1450 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1451 int i, err;
1452
1453 mutex_lock(&data->lock);
1454
1455 err = iio_triggered_buffer_predisable(indio_dev);
1456 if (err < 0)
1457 goto error_unlock;
1458
1459 for_each_set_bit(i, indio_dev->active_scan_mask,
1460 indio_dev->masklength) {
1461 switch (i) {
1462 case GP2AP020A00F_SCAN_MODE_LIGHT_CLEAR:
1463 err = gp2ap020a00f_exec_cmd(data,
1464 GP2AP020A00F_CMD_TRIGGER_CLEAR_DIS);
1465 break;
1466 case GP2AP020A00F_SCAN_MODE_LIGHT_IR:
1467 err = gp2ap020a00f_exec_cmd(data,
1468 GP2AP020A00F_CMD_TRIGGER_IR_DIS);
1469 break;
1470 case GP2AP020A00F_SCAN_MODE_PROXIMITY:
1471 err = gp2ap020a00f_exec_cmd(data,
1472 GP2AP020A00F_CMD_TRIGGER_PROX_DIS);
1473 break;
1474 }
1475 }
1476
1477 if (err == 0)
1478 kfree(data->buffer);
1479
1480 error_unlock:
1481 mutex_unlock(&data->lock);
1482
1483 return err;
1484 }
1485
1486 static const struct iio_buffer_setup_ops gp2ap020a00f_buffer_setup_ops = {
1487 .postenable = &gp2ap020a00f_buffer_postenable,
1488 .predisable = &gp2ap020a00f_buffer_predisable,
1489 };
1490
1491 static const struct iio_trigger_ops gp2ap020a00f_trigger_ops = {
1492 .owner = THIS_MODULE,
1493 };
1494
1495 static int gp2ap020a00f_probe(struct i2c_client *client,
1496 const struct i2c_device_id *id)
1497 {
1498 struct gp2ap020a00f_data *data;
1499 struct iio_dev *indio_dev;
1500 struct regmap *regmap;
1501 int err;
1502
1503 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1504 if (!indio_dev)
1505 return -ENOMEM;
1506
1507 data = iio_priv(indio_dev);
1508
1509 data->vled_reg = devm_regulator_get(&client->dev, "vled");
1510 if (IS_ERR(data->vled_reg))
1511 return PTR_ERR(data->vled_reg);
1512
1513 err = regulator_enable(data->vled_reg);
1514 if (err)
1515 return err;
1516
1517 regmap = devm_regmap_init_i2c(client, &gp2ap020a00f_regmap_config);
1518 if (IS_ERR(regmap)) {
1519 dev_err(&client->dev, "Regmap initialization failed.\n");
1520 err = PTR_ERR(regmap);
1521 goto error_regulator_disable;
1522 }
1523
1524 /* Initialize device registers */
1525 err = regmap_bulk_write(regmap, GP2AP020A00F_OP_REG,
1526 gp2ap020a00f_reg_init_tab,
1527 ARRAY_SIZE(gp2ap020a00f_reg_init_tab));
1528
1529 if (err < 0) {
1530 dev_err(&client->dev, "Device initialization failed.\n");
1531 goto error_regulator_disable;
1532 }
1533
1534 i2c_set_clientdata(client, indio_dev);
1535
1536 data->client = client;
1537 data->cur_opmode = GP2AP020A00F_OPMODE_SHUTDOWN;
1538 data->regmap = regmap;
1539 init_waitqueue_head(&data->data_ready_queue);
1540
1541 mutex_init(&data->lock);
1542 indio_dev->dev.parent = &client->dev;
1543 indio_dev->channels = gp2ap020a00f_channels;
1544 indio_dev->num_channels = ARRAY_SIZE(gp2ap020a00f_channels);
1545 indio_dev->info = &gp2ap020a00f_info;
1546 indio_dev->name = id->name;
1547 indio_dev->modes = INDIO_DIRECT_MODE;
1548
1549 /* Allocate buffer */
1550 err = iio_triggered_buffer_setup(indio_dev, &iio_pollfunc_store_time,
1551 &gp2ap020a00f_trigger_handler, &gp2ap020a00f_buffer_setup_ops);
1552 if (err < 0)
1553 goto error_regulator_disable;
1554
1555 /* Allocate trigger */
1556 data->trig = devm_iio_trigger_alloc(&client->dev, "%s-trigger",
1557 indio_dev->name);
1558 if (data->trig == NULL) {
1559 err = -ENOMEM;
1560 dev_err(&indio_dev->dev, "Failed to allocate iio trigger.\n");
1561 goto error_uninit_buffer;
1562 }
1563
1564 /* This needs to be requested here for read_raw calls to work. */
1565 err = request_threaded_irq(client->irq, NULL,
1566 &gp2ap020a00f_thresh_event_handler,
1567 IRQF_TRIGGER_FALLING |
1568 IRQF_ONESHOT,
1569 "gp2ap020a00f_als_event",
1570 indio_dev);
1571 if (err < 0) {
1572 dev_err(&client->dev, "Irq request failed.\n");
1573 goto error_uninit_buffer;
1574 }
1575
1576 data->trig->ops = &gp2ap020a00f_trigger_ops;
1577 data->trig->dev.parent = &data->client->dev;
1578
1579 init_irq_work(&data->work, gp2ap020a00f_iio_trigger_work);
1580
1581 err = iio_trigger_register(data->trig);
1582 if (err < 0) {
1583 dev_err(&client->dev, "Failed to register iio trigger.\n");
1584 goto error_free_irq;
1585 }
1586
1587 err = iio_device_register(indio_dev);
1588 if (err < 0)
1589 goto error_trigger_unregister;
1590
1591 return 0;
1592
1593 error_trigger_unregister:
1594 iio_trigger_unregister(data->trig);
1595 error_free_irq:
1596 free_irq(client->irq, indio_dev);
1597 error_uninit_buffer:
1598 iio_triggered_buffer_cleanup(indio_dev);
1599 error_regulator_disable:
1600 regulator_disable(data->vled_reg);
1601
1602 return err;
1603 }
1604
1605 static int gp2ap020a00f_remove(struct i2c_client *client)
1606 {
1607 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1608 struct gp2ap020a00f_data *data = iio_priv(indio_dev);
1609 int err;
1610
1611 err = gp2ap020a00f_set_operation_mode(data,
1612 GP2AP020A00F_OPMODE_SHUTDOWN);
1613 if (err < 0)
1614 dev_err(&indio_dev->dev, "Failed to power off the device.\n");
1615
1616 iio_device_unregister(indio_dev);
1617 iio_trigger_unregister(data->trig);
1618 free_irq(client->irq, indio_dev);
1619 iio_triggered_buffer_cleanup(indio_dev);
1620 regulator_disable(data->vled_reg);
1621
1622 return 0;
1623 }
1624
1625 static const struct i2c_device_id gp2ap020a00f_id[] = {
1626 { GP2A_I2C_NAME, 0 },
1627 { }
1628 };
1629
1630 MODULE_DEVICE_TABLE(i2c, gp2ap020a00f_id);
1631
1632 #ifdef CONFIG_OF
1633 static const struct of_device_id gp2ap020a00f_of_match[] = {
1634 { .compatible = "sharp,gp2ap020a00f" },
1635 { }
1636 };
1637 #endif
1638
1639 static struct i2c_driver gp2ap020a00f_driver = {
1640 .driver = {
1641 .name = GP2A_I2C_NAME,
1642 .of_match_table = of_match_ptr(gp2ap020a00f_of_match),
1643 .owner = THIS_MODULE,
1644 },
1645 .probe = gp2ap020a00f_probe,
1646 .remove = gp2ap020a00f_remove,
1647 .id_table = gp2ap020a00f_id,
1648 };
1649
1650 module_i2c_driver(gp2ap020a00f_driver);
1651
1652 MODULE_AUTHOR("Jacek Anaszewski <j.anaszewski@samsung.com>");
1653 MODULE_DESCRIPTION("Sharp GP2AP020A00F Proximity/ALS sensor driver");
1654 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support