4 * Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
13 #include <linux/irq.h>
14 #include <linux/irqdomain.h>
15 #include <linux/of_address.h>
16 #include <linux/of_irq.h>
17 #include <linux/slab.h>
19 #include <asm/exception.h>
20 #include <asm/mach/irq.h>
24 #define CLPS711X_INTSR1 (0x0240)
25 #define CLPS711X_INTMR1 (0x0280)
26 #define CLPS711X_BLEOI (0x0600)
27 #define CLPS711X_MCEOI (0x0640)
28 #define CLPS711X_TEOI (0x0680)
29 #define CLPS711X_TC1EOI (0x06c0)
30 #define CLPS711X_TC2EOI (0x0700)
31 #define CLPS711X_RTCEOI (0x0740)
32 #define CLPS711X_UMSEOI (0x0780)
33 #define CLPS711X_COEOI (0x07c0)
34 #define CLPS711X_INTSR2 (0x1240)
35 #define CLPS711X_INTMR2 (0x1280)
36 #define CLPS711X_SRXEOF (0x1600)
37 #define CLPS711X_KBDEOI (0x1700)
38 #define CLPS711X_INTSR3 (0x2240)
39 #define CLPS711X_INTMR3 (0x2280)
42 #define CLPS711X_FLAG_EN (1 << 0)
43 #define CLPS711X_FLAG_FIQ (1 << 1)
47 [1] = { CLPS711X_FLAG_FIQ
, CLPS711X_BLEOI
, },
48 [3] = { CLPS711X_FLAG_FIQ
, CLPS711X_MCEOI
, },
49 [4] = { CLPS711X_FLAG_EN
, CLPS711X_COEOI
, },
50 [5] = { CLPS711X_FLAG_EN
, },
51 [6] = { CLPS711X_FLAG_EN
, },
52 [7] = { CLPS711X_FLAG_EN
, },
53 [8] = { CLPS711X_FLAG_EN
, CLPS711X_TC1EOI
, },
54 [9] = { CLPS711X_FLAG_EN
, CLPS711X_TC2EOI
, },
55 [10] = { CLPS711X_FLAG_EN
, CLPS711X_RTCEOI
, },
56 [11] = { CLPS711X_FLAG_EN
, CLPS711X_TEOI
, },
57 [12] = { CLPS711X_FLAG_EN
, },
58 [13] = { CLPS711X_FLAG_EN
, },
59 [14] = { CLPS711X_FLAG_EN
, CLPS711X_UMSEOI
, },
60 [15] = { CLPS711X_FLAG_EN
, CLPS711X_SRXEOF
, },
61 [16] = { CLPS711X_FLAG_EN
, CLPS711X_KBDEOI
, },
62 [17] = { CLPS711X_FLAG_EN
, },
63 [18] = { CLPS711X_FLAG_EN
, },
64 [28] = { CLPS711X_FLAG_EN
, },
65 [29] = { CLPS711X_FLAG_EN
, },
66 [32] = { CLPS711X_FLAG_FIQ
, },
71 void __iomem
*intmr
[3];
72 void __iomem
*intsr
[3];
73 struct irq_domain
*domain
;
74 struct irq_domain_ops ops
;
77 static asmlinkage
void __exception_irq_entry
clps711x_irqh(struct pt_regs
*regs
)
82 irqstat
= readw_relaxed(clps711x_intc
->intmr
[0]) &
83 readw_relaxed(clps711x_intc
->intsr
[0]);
85 handle_domain_irq(clps711x_intc
->domain
,
86 fls(irqstat
) - 1, regs
);
88 irqstat
= readw_relaxed(clps711x_intc
->intmr
[1]) &
89 readw_relaxed(clps711x_intc
->intsr
[1]);
91 handle_domain_irq(clps711x_intc
->domain
,
92 fls(irqstat
) - 1 + 16, regs
);
96 static void clps711x_intc_eoi(struct irq_data
*d
)
98 irq_hw_number_t hwirq
= irqd_to_hwirq(d
);
100 writel_relaxed(0, clps711x_intc
->base
+ clps711x_irqs
[hwirq
].eoi
);
103 static void clps711x_intc_mask(struct irq_data
*d
)
105 irq_hw_number_t hwirq
= irqd_to_hwirq(d
);
106 void __iomem
*intmr
= clps711x_intc
->intmr
[hwirq
/ 16];
109 tmp
= readl_relaxed(intmr
);
110 tmp
&= ~(1 << (hwirq
% 16));
111 writel_relaxed(tmp
, intmr
);
114 static void clps711x_intc_unmask(struct irq_data
*d
)
116 irq_hw_number_t hwirq
= irqd_to_hwirq(d
);
117 void __iomem
*intmr
= clps711x_intc
->intmr
[hwirq
/ 16];
120 tmp
= readl_relaxed(intmr
);
121 tmp
|= 1 << (hwirq
% 16);
122 writel_relaxed(tmp
, intmr
);
125 static struct irq_chip clps711x_intc_chip
= {
126 .name
= "clps711x-intc",
127 .irq_eoi
= clps711x_intc_eoi
,
128 .irq_mask
= clps711x_intc_mask
,
129 .irq_unmask
= clps711x_intc_unmask
,
132 static int __init
clps711x_intc_irq_map(struct irq_domain
*h
, unsigned int virq
,
135 irq_flow_handler_t handler
= handle_level_irq
;
136 unsigned int flags
= IRQF_VALID
| IRQF_PROBE
;
138 if (!clps711x_irqs
[hw
].flags
)
141 if (clps711x_irqs
[hw
].flags
& CLPS711X_FLAG_FIQ
) {
142 handler
= handle_bad_irq
;
143 flags
|= IRQF_NOAUTOEN
;
144 } else if (clps711x_irqs
[hw
].eoi
) {
145 handler
= handle_fasteoi_irq
;
148 /* Clear down pending interrupt */
149 if (clps711x_irqs
[hw
].eoi
)
150 writel_relaxed(0, clps711x_intc
->base
+ clps711x_irqs
[hw
].eoi
);
152 irq_set_chip_and_handler(virq
, &clps711x_intc_chip
, handler
);
153 set_irq_flags(virq
, flags
);
158 static int __init
_clps711x_intc_init(struct device_node
*np
,
159 phys_addr_t base
, resource_size_t size
)
163 clps711x_intc
= kzalloc(sizeof(*clps711x_intc
), GFP_KERNEL
);
167 clps711x_intc
->base
= ioremap(base
, size
);
168 if (!clps711x_intc
->base
) {
173 clps711x_intc
->intsr
[0] = clps711x_intc
->base
+ CLPS711X_INTSR1
;
174 clps711x_intc
->intmr
[0] = clps711x_intc
->base
+ CLPS711X_INTMR1
;
175 clps711x_intc
->intsr
[1] = clps711x_intc
->base
+ CLPS711X_INTSR2
;
176 clps711x_intc
->intmr
[1] = clps711x_intc
->base
+ CLPS711X_INTMR2
;
177 clps711x_intc
->intsr
[2] = clps711x_intc
->base
+ CLPS711X_INTSR3
;
178 clps711x_intc
->intmr
[2] = clps711x_intc
->base
+ CLPS711X_INTMR3
;
180 /* Mask all interrupts */
181 writel_relaxed(0, clps711x_intc
->intmr
[0]);
182 writel_relaxed(0, clps711x_intc
->intmr
[1]);
183 writel_relaxed(0, clps711x_intc
->intmr
[2]);
185 err
= irq_alloc_descs(-1, 0, ARRAY_SIZE(clps711x_irqs
), numa_node_id());
186 if (IS_ERR_VALUE(err
))
189 clps711x_intc
->ops
.map
= clps711x_intc_irq_map
;
190 clps711x_intc
->ops
.xlate
= irq_domain_xlate_onecell
;
191 clps711x_intc
->domain
=
192 irq_domain_add_legacy(np
, ARRAY_SIZE(clps711x_irqs
),
193 0, 0, &clps711x_intc
->ops
, NULL
);
194 if (!clps711x_intc
->domain
) {
199 irq_set_default_host(clps711x_intc
->domain
);
200 set_handle_irq(clps711x_irqh
);
209 irq_free_descs(0, ARRAY_SIZE(clps711x_irqs
));
212 iounmap(clps711x_intc
->base
);
215 kfree(clps711x_intc
);
220 void __init
clps711x_intc_init(phys_addr_t base
, resource_size_t size
)
222 BUG_ON(_clps711x_intc_init(NULL
, base
, size
));
225 #ifdef CONFIG_IRQCHIP
226 static int __init
clps711x_intc_init_dt(struct device_node
*np
,
227 struct device_node
*parent
)
232 err
= of_address_to_resource(np
, 0, &res
);
236 return _clps711x_intc_init(np
, res
.start
, resource_size(&res
));
238 IRQCHIP_DECLARE(clps711x
, "cirrus,clps711x-intc", clps711x_intc_init_dt
);