ARM: dts: add 'dr_mode' property to hsotg devices for exynos boards
[linux/fpc-iii.git] / drivers / rtc / rtc-pcf2123.c
blobd1953bb244c599ebd02ea2c3ce8da20171626820
1 /*
2 * An SPI driver for the Philips PCF2123 RTC
3 * Copyright 2009 Cyber Switching, Inc.
5 * Author: Chris Verges <chrisv@cyberswitching.com>
6 * Maintainers: http://www.cyberswitching.com
8 * based on the RS5C348 driver in this same directory.
10 * Thanks to Christian Pellegrin <chripell@fsfe.org> for
11 * the sysfs contributions to this driver.
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
17 * Please note that the CS is active high, so platform data
18 * should look something like:
20 * static struct spi_board_info ek_spi_devices[] = {
21 * ...
22 * {
23 * .modalias = "rtc-pcf2123",
24 * .chip_select = 1,
25 * .controller_data = (void *)AT91_PIN_PA10,
26 * .max_speed_hz = 1000 * 1000,
27 * .mode = SPI_CS_HIGH,
28 * .bus_num = 0,
29 * },
30 * ...
31 *};
35 #include <linux/bcd.h>
36 #include <linux/delay.h>
37 #include <linux/device.h>
38 #include <linux/errno.h>
39 #include <linux/init.h>
40 #include <linux/kernel.h>
41 #include <linux/string.h>
42 #include <linux/slab.h>
43 #include <linux/rtc.h>
44 #include <linux/spi/spi.h>
45 #include <linux/module.h>
46 #include <linux/sysfs.h>
48 #define DRV_VERSION "0.6"
50 #define PCF2123_REG_CTRL1 (0x00) /* Control Register 1 */
51 #define PCF2123_REG_CTRL2 (0x01) /* Control Register 2 */
52 #define PCF2123_REG_SC (0x02) /* datetime */
53 #define PCF2123_REG_MN (0x03)
54 #define PCF2123_REG_HR (0x04)
55 #define PCF2123_REG_DM (0x05)
56 #define PCF2123_REG_DW (0x06)
57 #define PCF2123_REG_MO (0x07)
58 #define PCF2123_REG_YR (0x08)
60 #define PCF2123_SUBADDR (1 << 4)
61 #define PCF2123_WRITE ((0 << 7) | PCF2123_SUBADDR)
62 #define PCF2123_READ ((1 << 7) | PCF2123_SUBADDR)
64 static struct spi_driver pcf2123_driver;
66 struct pcf2123_sysfs_reg {
67 struct device_attribute attr;
68 char name[2];
71 struct pcf2123_plat_data {
72 struct rtc_device *rtc;
73 struct pcf2123_sysfs_reg regs[16];
77 * Causes a 30 nanosecond delay to ensure that the PCF2123 chip select
78 * is released properly after an SPI write. This function should be
79 * called after EVERY read/write call over SPI.
81 static inline void pcf2123_delay_trec(void)
83 ndelay(30);
86 static ssize_t pcf2123_show(struct device *dev, struct device_attribute *attr,
87 char *buffer)
89 struct spi_device *spi = to_spi_device(dev);
90 struct pcf2123_sysfs_reg *r;
91 u8 txbuf[1], rxbuf[1];
92 unsigned long reg;
93 int ret;
95 r = container_of(attr, struct pcf2123_sysfs_reg, attr);
97 ret = kstrtoul(r->name, 16, &reg);
98 if (ret)
99 return ret;
101 txbuf[0] = PCF2123_READ | reg;
102 ret = spi_write_then_read(spi, txbuf, 1, rxbuf, 1);
103 if (ret < 0)
104 return -EIO;
105 pcf2123_delay_trec();
106 return sprintf(buffer, "0x%x\n", rxbuf[0]);
109 static ssize_t pcf2123_store(struct device *dev, struct device_attribute *attr,
110 const char *buffer, size_t count) {
111 struct spi_device *spi = to_spi_device(dev);
112 struct pcf2123_sysfs_reg *r;
113 u8 txbuf[2];
114 unsigned long reg;
115 unsigned long val;
117 int ret;
119 r = container_of(attr, struct pcf2123_sysfs_reg, attr);
121 ret = kstrtoul(r->name, 16, &reg);
122 if (ret)
123 return ret;
125 ret = kstrtoul(buffer, 10, &val);
126 if (ret)
127 return ret;
129 txbuf[0] = PCF2123_WRITE | reg;
130 txbuf[1] = val;
131 ret = spi_write(spi, txbuf, sizeof(txbuf));
132 if (ret < 0)
133 return -EIO;
134 pcf2123_delay_trec();
135 return count;
138 static int pcf2123_rtc_read_time(struct device *dev, struct rtc_time *tm)
140 struct spi_device *spi = to_spi_device(dev);
141 u8 txbuf[1], rxbuf[7];
142 int ret;
144 txbuf[0] = PCF2123_READ | PCF2123_REG_SC;
145 ret = spi_write_then_read(spi, txbuf, sizeof(txbuf),
146 rxbuf, sizeof(rxbuf));
147 if (ret < 0)
148 return ret;
149 pcf2123_delay_trec();
151 tm->tm_sec = bcd2bin(rxbuf[0] & 0x7F);
152 tm->tm_min = bcd2bin(rxbuf[1] & 0x7F);
153 tm->tm_hour = bcd2bin(rxbuf[2] & 0x3F); /* rtc hr 0-23 */
154 tm->tm_mday = bcd2bin(rxbuf[3] & 0x3F);
155 tm->tm_wday = rxbuf[4] & 0x07;
156 tm->tm_mon = bcd2bin(rxbuf[5] & 0x1F) - 1; /* rtc mn 1-12 */
157 tm->tm_year = bcd2bin(rxbuf[6]);
158 if (tm->tm_year < 70)
159 tm->tm_year += 100; /* assume we are in 1970...2069 */
161 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
162 "mday=%d, mon=%d, year=%d, wday=%d\n",
163 __func__,
164 tm->tm_sec, tm->tm_min, tm->tm_hour,
165 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
167 /* the clock can give out invalid datetime, but we cannot return
168 * -EINVAL otherwise hwclock will refuse to set the time on bootup.
170 if (rtc_valid_tm(tm) < 0)
171 dev_err(dev, "retrieved date/time is not valid.\n");
173 return 0;
176 static int pcf2123_rtc_set_time(struct device *dev, struct rtc_time *tm)
178 struct spi_device *spi = to_spi_device(dev);
179 u8 txbuf[8];
180 int ret;
182 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
183 "mday=%d, mon=%d, year=%d, wday=%d\n",
184 __func__,
185 tm->tm_sec, tm->tm_min, tm->tm_hour,
186 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
188 /* Stop the counter first */
189 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
190 txbuf[1] = 0x20;
191 ret = spi_write(spi, txbuf, 2);
192 if (ret < 0)
193 return ret;
194 pcf2123_delay_trec();
196 /* Set the new time */
197 txbuf[0] = PCF2123_WRITE | PCF2123_REG_SC;
198 txbuf[1] = bin2bcd(tm->tm_sec & 0x7F);
199 txbuf[2] = bin2bcd(tm->tm_min & 0x7F);
200 txbuf[3] = bin2bcd(tm->tm_hour & 0x3F);
201 txbuf[4] = bin2bcd(tm->tm_mday & 0x3F);
202 txbuf[5] = tm->tm_wday & 0x07;
203 txbuf[6] = bin2bcd((tm->tm_mon + 1) & 0x1F); /* rtc mn 1-12 */
204 txbuf[7] = bin2bcd(tm->tm_year < 100 ? tm->tm_year : tm->tm_year - 100);
206 ret = spi_write(spi, txbuf, sizeof(txbuf));
207 if (ret < 0)
208 return ret;
209 pcf2123_delay_trec();
211 /* Start the counter */
212 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
213 txbuf[1] = 0x00;
214 ret = spi_write(spi, txbuf, 2);
215 if (ret < 0)
216 return ret;
217 pcf2123_delay_trec();
219 return 0;
222 static const struct rtc_class_ops pcf2123_rtc_ops = {
223 .read_time = pcf2123_rtc_read_time,
224 .set_time = pcf2123_rtc_set_time,
227 static int pcf2123_probe(struct spi_device *spi)
229 struct rtc_device *rtc;
230 struct pcf2123_plat_data *pdata;
231 u8 txbuf[2], rxbuf[2];
232 int ret, i;
234 pdata = devm_kzalloc(&spi->dev, sizeof(struct pcf2123_plat_data),
235 GFP_KERNEL);
236 if (!pdata)
237 return -ENOMEM;
238 spi->dev.platform_data = pdata;
240 /* Send a software reset command */
241 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
242 txbuf[1] = 0x58;
243 dev_dbg(&spi->dev, "resetting RTC (0x%02X 0x%02X)\n",
244 txbuf[0], txbuf[1]);
245 ret = spi_write(spi, txbuf, 2 * sizeof(u8));
246 if (ret < 0)
247 goto kfree_exit;
248 pcf2123_delay_trec();
250 /* Stop the counter */
251 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
252 txbuf[1] = 0x20;
253 dev_dbg(&spi->dev, "stopping RTC (0x%02X 0x%02X)\n",
254 txbuf[0], txbuf[1]);
255 ret = spi_write(spi, txbuf, 2 * sizeof(u8));
256 if (ret < 0)
257 goto kfree_exit;
258 pcf2123_delay_trec();
260 /* See if the counter was actually stopped */
261 txbuf[0] = PCF2123_READ | PCF2123_REG_CTRL1;
262 dev_dbg(&spi->dev, "checking for presence of RTC (0x%02X)\n",
263 txbuf[0]);
264 ret = spi_write_then_read(spi, txbuf, 1 * sizeof(u8),
265 rxbuf, 2 * sizeof(u8));
266 dev_dbg(&spi->dev, "received data from RTC (0x%02X 0x%02X)\n",
267 rxbuf[0], rxbuf[1]);
268 if (ret < 0)
269 goto kfree_exit;
270 pcf2123_delay_trec();
272 if (!(rxbuf[0] & 0x20)) {
273 dev_err(&spi->dev, "chip not found\n");
274 ret = -ENODEV;
275 goto kfree_exit;
278 dev_info(&spi->dev, "chip found, driver version " DRV_VERSION "\n");
279 dev_info(&spi->dev, "spiclk %u KHz.\n",
280 (spi->max_speed_hz + 500) / 1000);
282 /* Start the counter */
283 txbuf[0] = PCF2123_WRITE | PCF2123_REG_CTRL1;
284 txbuf[1] = 0x00;
285 ret = spi_write(spi, txbuf, sizeof(txbuf));
286 if (ret < 0)
287 goto kfree_exit;
288 pcf2123_delay_trec();
290 /* Finalize the initialization */
291 rtc = devm_rtc_device_register(&spi->dev, pcf2123_driver.driver.name,
292 &pcf2123_rtc_ops, THIS_MODULE);
294 if (IS_ERR(rtc)) {
295 dev_err(&spi->dev, "failed to register.\n");
296 ret = PTR_ERR(rtc);
297 goto kfree_exit;
300 pdata->rtc = rtc;
302 for (i = 0; i < 16; i++) {
303 sysfs_attr_init(&pdata->regs[i].attr.attr);
304 sprintf(pdata->regs[i].name, "%1x", i);
305 pdata->regs[i].attr.attr.mode = S_IRUGO | S_IWUSR;
306 pdata->regs[i].attr.attr.name = pdata->regs[i].name;
307 pdata->regs[i].attr.show = pcf2123_show;
308 pdata->regs[i].attr.store = pcf2123_store;
309 ret = device_create_file(&spi->dev, &pdata->regs[i].attr);
310 if (ret) {
311 dev_err(&spi->dev, "Unable to create sysfs %s\n",
312 pdata->regs[i].name);
313 goto sysfs_exit;
317 return 0;
319 sysfs_exit:
320 for (i--; i >= 0; i--)
321 device_remove_file(&spi->dev, &pdata->regs[i].attr);
323 kfree_exit:
324 spi->dev.platform_data = NULL;
325 return ret;
328 static int pcf2123_remove(struct spi_device *spi)
330 struct pcf2123_plat_data *pdata = dev_get_platdata(&spi->dev);
331 int i;
333 if (pdata) {
334 for (i = 0; i < 16; i++)
335 if (pdata->regs[i].name[0])
336 device_remove_file(&spi->dev,
337 &pdata->regs[i].attr);
340 return 0;
343 static struct spi_driver pcf2123_driver = {
344 .driver = {
345 .name = "rtc-pcf2123",
346 .owner = THIS_MODULE,
348 .probe = pcf2123_probe,
349 .remove = pcf2123_remove,
352 module_spi_driver(pcf2123_driver);
354 MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>");
355 MODULE_DESCRIPTION("NXP PCF2123 RTC driver");
356 MODULE_LICENSE("GPL");
357 MODULE_VERSION(DRV_VERSION);