2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/module.h>
32 #include <linux/acpi.h>
33 #include <linux/dmi.h>
34 #include <linux/sched.h> /* need_resched() */
35 #include <linux/tick.h>
36 #include <linux/cpuidle.h>
37 #include <linux/syscore_ops.h>
38 #include <acpi/processor.h>
41 * Include the apic definitions for x86 to have the APIC timer related defines
42 * available also for UP (on SMP it gets magically included via linux/smp.h).
43 * asm/acpi.h is not an option, as it would require more include magic. Also
44 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50 #define PREFIX "ACPI: "
52 #define ACPI_PROCESSOR_CLASS "processor"
53 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
54 ACPI_MODULE_NAME("processor_idle");
56 static unsigned int max_cstate __read_mostly
= ACPI_PROCESSOR_MAX_POWER
;
57 module_param(max_cstate
, uint
, 0000);
58 static unsigned int nocst __read_mostly
;
59 module_param(nocst
, uint
, 0000);
60 static int bm_check_disable __read_mostly
;
61 module_param(bm_check_disable
, uint
, 0000);
63 static unsigned int latency_factor __read_mostly
= 2;
64 module_param(latency_factor
, uint
, 0644);
66 static DEFINE_PER_CPU(struct cpuidle_device
*, acpi_cpuidle_device
);
68 static DEFINE_PER_CPU(struct acpi_processor_cx
* [CPUIDLE_STATE_MAX
],
71 static int disabled_by_idle_boot_param(void)
73 return boot_option_idle_override
== IDLE_POLL
||
74 boot_option_idle_override
== IDLE_HALT
;
78 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
79 * For now disable this. Probably a bug somewhere else.
81 * To skip this limit, boot/load with a large max_cstate limit.
83 static int set_max_cstate(const struct dmi_system_id
*id
)
85 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
88 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
89 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
90 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
92 max_cstate
= (long)id
->driver_data
;
97 static struct dmi_system_id processor_power_dmi_table
[] = {
98 { set_max_cstate
, "Clevo 5600D", {
99 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
100 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
102 { set_max_cstate
, "Pavilion zv5000", {
103 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
104 DMI_MATCH(DMI_PRODUCT_NAME
,"Pavilion zv5000 (DS502A#ABA)")},
106 { set_max_cstate
, "Asus L8400B", {
107 DMI_MATCH(DMI_SYS_VENDOR
, "ASUSTeK Computer Inc."),
108 DMI_MATCH(DMI_PRODUCT_NAME
,"L8400B series Notebook PC")},
115 * Callers should disable interrupts before the call and enable
116 * interrupts after return.
118 static void acpi_safe_halt(void)
120 if (!tif_need_resched()) {
126 #ifdef ARCH_APICTIMER_STOPS_ON_C3
129 * Some BIOS implementations switch to C3 in the published C2 state.
130 * This seems to be a common problem on AMD boxen, but other vendors
131 * are affected too. We pick the most conservative approach: we assume
132 * that the local APIC stops in both C2 and C3.
134 static void lapic_timer_check_state(int state
, struct acpi_processor
*pr
,
135 struct acpi_processor_cx
*cx
)
137 struct acpi_processor_power
*pwr
= &pr
->power
;
138 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
140 if (cpu_has(&cpu_data(pr
->id
), X86_FEATURE_ARAT
))
143 if (amd_e400_c1e_detected
)
144 type
= ACPI_STATE_C1
;
147 * Check, if one of the previous states already marked the lapic
150 if (pwr
->timer_broadcast_on_state
< state
)
153 if (cx
->type
>= type
)
154 pr
->power
.timer_broadcast_on_state
= state
;
157 static void __lapic_timer_propagate_broadcast(void *arg
)
159 struct acpi_processor
*pr
= (struct acpi_processor
*) arg
;
161 if (pr
->power
.timer_broadcast_on_state
< INT_MAX
)
162 tick_broadcast_enable();
164 tick_broadcast_disable();
167 static void lapic_timer_propagate_broadcast(struct acpi_processor
*pr
)
169 smp_call_function_single(pr
->id
, __lapic_timer_propagate_broadcast
,
173 /* Power(C) State timer broadcast control */
174 static void lapic_timer_state_broadcast(struct acpi_processor
*pr
,
175 struct acpi_processor_cx
*cx
,
178 int state
= cx
- pr
->power
.states
;
180 if (state
>= pr
->power
.timer_broadcast_on_state
) {
182 tick_broadcast_enter();
184 tick_broadcast_exit();
190 static void lapic_timer_check_state(int state
, struct acpi_processor
*pr
,
191 struct acpi_processor_cx
*cstate
) { }
192 static void lapic_timer_propagate_broadcast(struct acpi_processor
*pr
) { }
193 static void lapic_timer_state_broadcast(struct acpi_processor
*pr
,
194 struct acpi_processor_cx
*cx
,
201 #ifdef CONFIG_PM_SLEEP
202 static u32 saved_bm_rld
;
204 static int acpi_processor_suspend(void)
206 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &saved_bm_rld
);
210 static void acpi_processor_resume(void)
212 u32 resumed_bm_rld
= 0;
214 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, &resumed_bm_rld
);
215 if (resumed_bm_rld
== saved_bm_rld
)
218 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, saved_bm_rld
);
221 static struct syscore_ops acpi_processor_syscore_ops
= {
222 .suspend
= acpi_processor_suspend
,
223 .resume
= acpi_processor_resume
,
226 void acpi_processor_syscore_init(void)
228 register_syscore_ops(&acpi_processor_syscore_ops
);
231 void acpi_processor_syscore_exit(void)
233 unregister_syscore_ops(&acpi_processor_syscore_ops
);
235 #endif /* CONFIG_PM_SLEEP */
237 #if defined(CONFIG_X86)
238 static void tsc_check_state(int state
)
240 switch (boot_cpu_data
.x86_vendor
) {
242 case X86_VENDOR_INTEL
:
244 * AMD Fam10h TSC will tick in all
245 * C/P/S0/S1 states when this bit is set.
247 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC
))
252 /* TSC could halt in idle, so notify users */
253 if (state
> ACPI_STATE_C1
)
254 mark_tsc_unstable("TSC halts in idle");
258 static void tsc_check_state(int state
) { return; }
261 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
267 /* if info is obtained from pblk/fadt, type equals state */
268 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
269 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
271 #ifndef CONFIG_HOTPLUG_CPU
273 * Check for P_LVL2_UP flag before entering C2 and above on
276 if ((num_online_cpus() > 1) &&
277 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
281 /* determine C2 and C3 address from pblk */
282 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
283 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
285 /* determine latencies from FADT */
286 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.c2_latency
;
287 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.c3_latency
;
290 * FADT specified C2 latency must be less than or equal to
293 if (acpi_gbl_FADT
.c2_latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
294 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
295 "C2 latency too large [%d]\n", acpi_gbl_FADT
.c2_latency
));
297 pr
->power
.states
[ACPI_STATE_C2
].address
= 0;
301 * FADT supplied C3 latency must be less than or equal to
304 if (acpi_gbl_FADT
.c3_latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
305 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
306 "C3 latency too large [%d]\n", acpi_gbl_FADT
.c3_latency
));
308 pr
->power
.states
[ACPI_STATE_C3
].address
= 0;
311 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
312 "lvl2[0x%08x] lvl3[0x%08x]\n",
313 pr
->power
.states
[ACPI_STATE_C2
].address
,
314 pr
->power
.states
[ACPI_STATE_C3
].address
));
319 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
321 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
322 /* set the first C-State to C1 */
323 /* all processors need to support C1 */
324 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
325 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
326 pr
->power
.states
[ACPI_STATE_C1
].entry_method
= ACPI_CSTATE_HALT
;
328 /* the C0 state only exists as a filler in our array */
329 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
333 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
339 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
340 union acpi_object
*cst
;
348 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
349 if (ACPI_FAILURE(status
)) {
350 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
354 cst
= buffer
.pointer
;
356 /* There must be at least 2 elements */
357 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
358 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
363 count
= cst
->package
.elements
[0].integer
.value
;
365 /* Validate number of power states. */
366 if (count
< 1 || count
!= cst
->package
.count
- 1) {
367 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
372 /* Tell driver that at least _CST is supported. */
373 pr
->flags
.has_cst
= 1;
375 for (i
= 1; i
<= count
; i
++) {
376 union acpi_object
*element
;
377 union acpi_object
*obj
;
378 struct acpi_power_register
*reg
;
379 struct acpi_processor_cx cx
;
381 memset(&cx
, 0, sizeof(cx
));
383 element
= &(cst
->package
.elements
[i
]);
384 if (element
->type
!= ACPI_TYPE_PACKAGE
)
387 if (element
->package
.count
!= 4)
390 obj
= &(element
->package
.elements
[0]);
392 if (obj
->type
!= ACPI_TYPE_BUFFER
)
395 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
397 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
398 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
401 /* There should be an easy way to extract an integer... */
402 obj
= &(element
->package
.elements
[1]);
403 if (obj
->type
!= ACPI_TYPE_INTEGER
)
406 cx
.type
= obj
->integer
.value
;
408 * Some buggy BIOSes won't list C1 in _CST -
409 * Let acpi_processor_get_power_info_default() handle them later
411 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
414 cx
.address
= reg
->address
;
415 cx
.index
= current_count
+ 1;
417 cx
.entry_method
= ACPI_CSTATE_SYSTEMIO
;
418 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
419 if (acpi_processor_ffh_cstate_probe
420 (pr
->id
, &cx
, reg
) == 0) {
421 cx
.entry_method
= ACPI_CSTATE_FFH
;
422 } else if (cx
.type
== ACPI_STATE_C1
) {
424 * C1 is a special case where FIXED_HARDWARE
425 * can be handled in non-MWAIT way as well.
426 * In that case, save this _CST entry info.
427 * Otherwise, ignore this info and continue.
429 cx
.entry_method
= ACPI_CSTATE_HALT
;
430 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
434 if (cx
.type
== ACPI_STATE_C1
&&
435 (boot_option_idle_override
== IDLE_NOMWAIT
)) {
437 * In most cases the C1 space_id obtained from
438 * _CST object is FIXED_HARDWARE access mode.
439 * But when the option of idle=halt is added,
440 * the entry_method type should be changed from
441 * CSTATE_FFH to CSTATE_HALT.
442 * When the option of idle=nomwait is added,
443 * the C1 entry_method type should be
446 cx
.entry_method
= ACPI_CSTATE_HALT
;
447 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI HLT");
450 snprintf(cx
.desc
, ACPI_CX_DESC_LEN
, "ACPI IOPORT 0x%x",
454 if (cx
.type
== ACPI_STATE_C1
) {
458 obj
= &(element
->package
.elements
[2]);
459 if (obj
->type
!= ACPI_TYPE_INTEGER
)
462 cx
.latency
= obj
->integer
.value
;
464 obj
= &(element
->package
.elements
[3]);
465 if (obj
->type
!= ACPI_TYPE_INTEGER
)
469 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
472 * We support total ACPI_PROCESSOR_MAX_POWER - 1
473 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
475 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
477 "Limiting number of power states to max (%d)\n",
478 ACPI_PROCESSOR_MAX_POWER
);
480 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
485 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
488 /* Validate number of power states discovered */
489 if (current_count
< 2)
493 kfree(buffer
.pointer
);
498 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
499 struct acpi_processor_cx
*cx
)
501 static int bm_check_flag
= -1;
502 static int bm_control_flag
= -1;
509 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
510 * DMA transfers are used by any ISA device to avoid livelock.
511 * Note that we could disable Type-F DMA (as recommended by
512 * the erratum), but this is known to disrupt certain ISA
513 * devices thus we take the conservative approach.
515 else if (errata
.piix4
.fdma
) {
516 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
517 "C3 not supported on PIIX4 with Type-F DMA\n"));
521 /* All the logic here assumes flags.bm_check is same across all CPUs */
522 if (bm_check_flag
== -1) {
523 /* Determine whether bm_check is needed based on CPU */
524 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
525 bm_check_flag
= pr
->flags
.bm_check
;
526 bm_control_flag
= pr
->flags
.bm_control
;
528 pr
->flags
.bm_check
= bm_check_flag
;
529 pr
->flags
.bm_control
= bm_control_flag
;
532 if (pr
->flags
.bm_check
) {
533 if (!pr
->flags
.bm_control
) {
534 if (pr
->flags
.has_cst
!= 1) {
535 /* bus mastering control is necessary */
536 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
537 "C3 support requires BM control\n"));
540 /* Here we enter C3 without bus mastering */
541 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
542 "C3 support without BM control\n"));
547 * WBINVD should be set in fadt, for C3 state to be
548 * supported on when bm_check is not required.
550 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
551 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
552 "Cache invalidation should work properly"
553 " for C3 to be enabled on SMP systems\n"));
559 * Otherwise we've met all of our C3 requirements.
560 * Normalize the C3 latency to expidite policy. Enable
561 * checking of bus mastering status (bm_check) so we can
562 * use this in our C3 policy
567 * On older chipsets, BM_RLD needs to be set
568 * in order for Bus Master activity to wake the
569 * system from C3. Newer chipsets handle DMA
570 * during C3 automatically and BM_RLD is a NOP.
571 * In either case, the proper way to
572 * handle BM_RLD is to set it and leave it set.
574 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
579 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
582 unsigned int working
= 0;
584 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
586 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
587 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
601 acpi_processor_power_verify_c3(pr
, cx
);
607 lapic_timer_check_state(i
, pr
, cx
);
608 tsc_check_state(cx
->type
);
612 lapic_timer_propagate_broadcast(pr
);
617 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
623 /* NOTE: the idle thread may not be running while calling
626 /* Zero initialize all the C-states info. */
627 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
629 result
= acpi_processor_get_power_info_cst(pr
);
630 if (result
== -ENODEV
)
631 result
= acpi_processor_get_power_info_fadt(pr
);
636 acpi_processor_get_power_info_default(pr
);
638 pr
->power
.count
= acpi_processor_power_verify(pr
);
641 * if one state of type C2 or C3 is available, mark this
642 * CPU as being "idle manageable"
644 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
645 if (pr
->power
.states
[i
].valid
) {
647 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
656 * acpi_idle_bm_check - checks if bus master activity was detected
658 static int acpi_idle_bm_check(void)
662 if (bm_check_disable
)
665 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
667 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
669 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
670 * the true state of bus mastering activity; forcing us to
671 * manually check the BMIDEA bit of each IDE channel.
673 else if (errata
.piix4
.bmisx
) {
674 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
675 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
682 * acpi_idle_do_entry - enter idle state using the appropriate method
685 * Caller disables interrupt before call and enables interrupt after return.
687 static void acpi_idle_do_entry(struct acpi_processor_cx
*cx
)
689 if (cx
->entry_method
== ACPI_CSTATE_FFH
) {
690 /* Call into architectural FFH based C-state */
691 acpi_processor_ffh_cstate_enter(cx
);
692 } else if (cx
->entry_method
== ACPI_CSTATE_HALT
) {
695 /* IO port based C-state */
697 /* Dummy wait op - must do something useless after P_LVL2 read
698 because chipsets cannot guarantee that STPCLK# signal
699 gets asserted in time to freeze execution properly. */
700 inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
705 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
706 * @dev: the target CPU
707 * @index: the index of suggested state
709 static int acpi_idle_play_dead(struct cpuidle_device
*dev
, int index
)
711 struct acpi_processor_cx
*cx
= per_cpu(acpi_cstate
[index
], dev
->cpu
);
713 ACPI_FLUSH_CPU_CACHE();
717 if (cx
->entry_method
== ACPI_CSTATE_HALT
)
719 else if (cx
->entry_method
== ACPI_CSTATE_SYSTEMIO
) {
721 /* See comment in acpi_idle_do_entry() */
722 inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
731 static bool acpi_idle_fallback_to_c1(struct acpi_processor
*pr
)
733 return IS_ENABLED(CONFIG_HOTPLUG_CPU
) && !pr
->flags
.has_cst
&&
734 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
);
737 static int c3_cpu_count
;
738 static DEFINE_RAW_SPINLOCK(c3_lock
);
741 * acpi_idle_enter_bm - enters C3 with proper BM handling
742 * @pr: Target processor
743 * @cx: Target state context
744 * @timer_bc: Whether or not to change timer mode to broadcast
746 static void acpi_idle_enter_bm(struct acpi_processor
*pr
,
747 struct acpi_processor_cx
*cx
, bool timer_bc
)
749 acpi_unlazy_tlb(smp_processor_id());
752 * Must be done before busmaster disable as we might need to
756 lapic_timer_state_broadcast(pr
, cx
, 1);
760 * bm_check implies we need ARB_DIS
761 * bm_control implies whether we can do ARB_DIS
763 * That leaves a case where bm_check is set and bm_control is
764 * not set. In that case we cannot do much, we enter C3
765 * without doing anything.
767 if (pr
->flags
.bm_control
) {
768 raw_spin_lock(&c3_lock
);
770 /* Disable bus master arbitration when all CPUs are in C3 */
771 if (c3_cpu_count
== num_online_cpus())
772 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 1);
773 raw_spin_unlock(&c3_lock
);
776 acpi_idle_do_entry(cx
);
778 /* Re-enable bus master arbitration */
779 if (pr
->flags
.bm_control
) {
780 raw_spin_lock(&c3_lock
);
781 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE
, 0);
783 raw_spin_unlock(&c3_lock
);
787 lapic_timer_state_broadcast(pr
, cx
, 0);
790 static int acpi_idle_enter(struct cpuidle_device
*dev
,
791 struct cpuidle_driver
*drv
, int index
)
793 struct acpi_processor_cx
*cx
= per_cpu(acpi_cstate
[index
], dev
->cpu
);
794 struct acpi_processor
*pr
;
796 pr
= __this_cpu_read(processors
);
800 if (cx
->type
!= ACPI_STATE_C1
) {
801 if (acpi_idle_fallback_to_c1(pr
) && num_online_cpus() > 1) {
802 index
= CPUIDLE_DRIVER_STATE_START
;
803 cx
= per_cpu(acpi_cstate
[index
], dev
->cpu
);
804 } else if (cx
->type
== ACPI_STATE_C3
&& pr
->flags
.bm_check
) {
805 if (cx
->bm_sts_skip
|| !acpi_idle_bm_check()) {
806 acpi_idle_enter_bm(pr
, cx
, true);
808 } else if (drv
->safe_state_index
>= 0) {
809 index
= drv
->safe_state_index
;
810 cx
= per_cpu(acpi_cstate
[index
], dev
->cpu
);
818 lapic_timer_state_broadcast(pr
, cx
, 1);
820 if (cx
->type
== ACPI_STATE_C3
)
821 ACPI_FLUSH_CPU_CACHE();
823 acpi_idle_do_entry(cx
);
825 lapic_timer_state_broadcast(pr
, cx
, 0);
830 static void acpi_idle_enter_freeze(struct cpuidle_device
*dev
,
831 struct cpuidle_driver
*drv
, int index
)
833 struct acpi_processor_cx
*cx
= per_cpu(acpi_cstate
[index
], dev
->cpu
);
835 if (cx
->type
== ACPI_STATE_C3
) {
836 struct acpi_processor
*pr
= __this_cpu_read(processors
);
841 if (pr
->flags
.bm_check
) {
842 acpi_idle_enter_bm(pr
, cx
, false);
845 ACPI_FLUSH_CPU_CACHE();
848 acpi_idle_do_entry(cx
);
851 struct cpuidle_driver acpi_idle_driver
= {
853 .owner
= THIS_MODULE
,
857 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
858 * device i.e. per-cpu data
860 * @pr: the ACPI processor
861 * @dev : the cpuidle device
863 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor
*pr
,
864 struct cpuidle_device
*dev
)
866 int i
, count
= CPUIDLE_DRIVER_STATE_START
;
867 struct acpi_processor_cx
*cx
;
869 if (!pr
->flags
.power_setup_done
)
872 if (pr
->flags
.power
== 0) {
884 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
885 cx
= &pr
->power
.states
[i
];
890 per_cpu(acpi_cstate
[count
], dev
->cpu
) = cx
;
893 if (count
== CPUIDLE_STATE_MAX
)
904 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
905 * global state data i.e. idle routines
907 * @pr: the ACPI processor
909 static int acpi_processor_setup_cpuidle_states(struct acpi_processor
*pr
)
911 int i
, count
= CPUIDLE_DRIVER_STATE_START
;
912 struct acpi_processor_cx
*cx
;
913 struct cpuidle_state
*state
;
914 struct cpuidle_driver
*drv
= &acpi_idle_driver
;
916 if (!pr
->flags
.power_setup_done
)
919 if (pr
->flags
.power
== 0)
922 drv
->safe_state_index
= -1;
923 for (i
= CPUIDLE_DRIVER_STATE_START
; i
< CPUIDLE_STATE_MAX
; i
++) {
924 drv
->states
[i
].name
[0] = '\0';
925 drv
->states
[i
].desc
[0] = '\0';
931 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
&& i
<= max_cstate
; i
++) {
932 cx
= &pr
->power
.states
[i
];
937 state
= &drv
->states
[count
];
938 snprintf(state
->name
, CPUIDLE_NAME_LEN
, "C%d", i
);
939 strncpy(state
->desc
, cx
->desc
, CPUIDLE_DESC_LEN
);
940 state
->exit_latency
= cx
->latency
;
941 state
->target_residency
= cx
->latency
* latency_factor
;
942 state
->enter
= acpi_idle_enter
;
945 if (cx
->type
== ACPI_STATE_C1
|| cx
->type
== ACPI_STATE_C2
) {
946 state
->enter_dead
= acpi_idle_play_dead
;
947 drv
->safe_state_index
= count
;
950 * Halt-induced C1 is not good for ->enter_freeze, because it
951 * re-enables interrupts on exit. Moreover, C1 is generally not
952 * particularly interesting from the suspend-to-idle angle, so
953 * avoid C1 and the situations in which we may need to fall back
956 if (cx
->type
!= ACPI_STATE_C1
&& !acpi_idle_fallback_to_c1(pr
))
957 state
->enter_freeze
= acpi_idle_enter_freeze
;
960 if (count
== CPUIDLE_STATE_MAX
)
964 drv
->state_count
= count
;
972 int acpi_processor_hotplug(struct acpi_processor
*pr
)
975 struct cpuidle_device
*dev
;
977 if (disabled_by_idle_boot_param())
983 if (!pr
->flags
.power_setup_done
)
986 dev
= per_cpu(acpi_cpuidle_device
, pr
->id
);
987 cpuidle_pause_and_lock();
988 cpuidle_disable_device(dev
);
989 acpi_processor_get_power_info(pr
);
990 if (pr
->flags
.power
) {
991 acpi_processor_setup_cpuidle_cx(pr
, dev
);
992 ret
= cpuidle_enable_device(dev
);
994 cpuidle_resume_and_unlock();
999 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1002 struct acpi_processor
*_pr
;
1003 struct cpuidle_device
*dev
;
1005 if (disabled_by_idle_boot_param())
1011 if (!pr
->flags
.power_setup_done
)
1015 * FIXME: Design the ACPI notification to make it once per
1016 * system instead of once per-cpu. This condition is a hack
1017 * to make the code that updates C-States be called once.
1020 if (pr
->id
== 0 && cpuidle_get_driver() == &acpi_idle_driver
) {
1022 /* Protect against cpu-hotplug */
1024 cpuidle_pause_and_lock();
1026 /* Disable all cpuidle devices */
1027 for_each_online_cpu(cpu
) {
1028 _pr
= per_cpu(processors
, cpu
);
1029 if (!_pr
|| !_pr
->flags
.power_setup_done
)
1031 dev
= per_cpu(acpi_cpuidle_device
, cpu
);
1032 cpuidle_disable_device(dev
);
1035 /* Populate Updated C-state information */
1036 acpi_processor_get_power_info(pr
);
1037 acpi_processor_setup_cpuidle_states(pr
);
1039 /* Enable all cpuidle devices */
1040 for_each_online_cpu(cpu
) {
1041 _pr
= per_cpu(processors
, cpu
);
1042 if (!_pr
|| !_pr
->flags
.power_setup_done
)
1044 acpi_processor_get_power_info(_pr
);
1045 if (_pr
->flags
.power
) {
1046 dev
= per_cpu(acpi_cpuidle_device
, cpu
);
1047 acpi_processor_setup_cpuidle_cx(_pr
, dev
);
1048 cpuidle_enable_device(dev
);
1051 cpuidle_resume_and_unlock();
1058 static int acpi_processor_registered
;
1060 int acpi_processor_power_init(struct acpi_processor
*pr
)
1064 struct cpuidle_device
*dev
;
1065 static int first_run
;
1067 if (disabled_by_idle_boot_param())
1071 dmi_check_system(processor_power_dmi_table
);
1072 max_cstate
= acpi_processor_cstate_check(max_cstate
);
1073 if (max_cstate
< ACPI_C_STATES_MAX
)
1075 "ACPI: processor limited to max C-state %d\n",
1080 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1082 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1083 if (ACPI_FAILURE(status
)) {
1084 ACPI_EXCEPTION((AE_INFO
, status
,
1085 "Notifying BIOS of _CST ability failed"));
1089 acpi_processor_get_power_info(pr
);
1090 pr
->flags
.power_setup_done
= 1;
1093 * Install the idle handler if processor power management is supported.
1094 * Note that we use previously set idle handler will be used on
1095 * platforms that only support C1.
1097 if (pr
->flags
.power
) {
1098 /* Register acpi_idle_driver if not already registered */
1099 if (!acpi_processor_registered
) {
1100 acpi_processor_setup_cpuidle_states(pr
);
1101 retval
= cpuidle_register_driver(&acpi_idle_driver
);
1104 printk(KERN_DEBUG
"ACPI: %s registered with cpuidle\n",
1105 acpi_idle_driver
.name
);
1108 dev
= kzalloc(sizeof(*dev
), GFP_KERNEL
);
1111 per_cpu(acpi_cpuidle_device
, pr
->id
) = dev
;
1113 acpi_processor_setup_cpuidle_cx(pr
, dev
);
1115 /* Register per-cpu cpuidle_device. Cpuidle driver
1116 * must already be registered before registering device
1118 retval
= cpuidle_register_device(dev
);
1120 if (acpi_processor_registered
== 0)
1121 cpuidle_unregister_driver(&acpi_idle_driver
);
1124 acpi_processor_registered
++;
1129 int acpi_processor_power_exit(struct acpi_processor
*pr
)
1131 struct cpuidle_device
*dev
= per_cpu(acpi_cpuidle_device
, pr
->id
);
1133 if (disabled_by_idle_boot_param())
1136 if (pr
->flags
.power
) {
1137 cpuidle_unregister_device(dev
);
1138 acpi_processor_registered
--;
1139 if (acpi_processor_registered
== 0)
1140 cpuidle_unregister_driver(&acpi_idle_driver
);
1143 pr
->flags
.power_setup_done
= 0;