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bridge: Pull ip header into skb->data before looking into ip header.
[linux/fpc-iii.git] / drivers / video / fsl-diu-fb.c
bloba16beeb5f548637698803ac22171691454f482aa
1 /*
2 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
3 *
4 * Freescale DIU Frame Buffer device driver
5 *
6 * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
7 * Paul Widmer <paul.widmer@freescale.com>
8 * Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
9 * York Sun <yorksun@freescale.com>
10 *
11 * Based on imxfb.c Copyright (C) 2004 S.Hauer, Pengutronix
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 *
18 */
19
20 #include <linux/module.h>
21 #include <linux/kernel.h>
22 #include <linux/errno.h>
23 #include <linux/string.h>
24 #include <linux/slab.h>
25 #include <linux/fb.h>
26 #include <linux/init.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/platform_device.h>
29 #include <linux/interrupt.h>
30 #include <linux/clk.h>
31 #include <linux/uaccess.h>
32 #include <linux/vmalloc.h>
33 #include <linux/spinlock.h>
34
35 #include <sysdev/fsl_soc.h>
36 #include <linux/fsl-diu-fb.h>
37 #include "edid.h"
38
39 #define FSL_AOI_NUM 6 /* 5 AOIs and one dummy AOI */
40 /* 1 for plane 0, 2 for plane 1&2 each */
41
42 /* HW cursor parameters */
43 #define MAX_CURS 32
44
45 /* INT_STATUS/INT_MASK field descriptions */
46 #define INT_VSYNC 0x01 /* Vsync interrupt */
47 #define INT_VSYNC_WB 0x02 /* Vsync interrupt for write back operation */
48 #define INT_UNDRUN 0x04 /* Under run exception interrupt */
49 #define INT_PARERR 0x08 /* Display parameters error interrupt */
50 #define INT_LS_BF_VS 0x10 /* Lines before vsync. interrupt */
51
52 struct diu_addr {
53 void *vaddr; /* Virtual address */
54 dma_addr_t paddr; /* Physical address */
55 __u32 offset;
56 };
57
58 /*
59 * List of supported video modes
60 *
61 * The first entry is the default video mode. The remain entries are in
62 * order if increasing resolution and frequency. The 320x240-60 mode is
63 * the initial AOI for the second and third planes.
64 */
65 static struct fb_videomode __devinitdata fsl_diu_mode_db[] = {
66 {
67 .refresh = 60,
68 .xres = 1024,
69 .yres = 768,
70 .pixclock = 15385,
71 .left_margin = 160,
72 .right_margin = 24,
73 .upper_margin = 29,
74 .lower_margin = 3,
75 .hsync_len = 136,
76 .vsync_len = 6,
77 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
78 .vmode = FB_VMODE_NONINTERLACED
79 },
80 {
81 .refresh = 60,
82 .xres = 320,
83 .yres = 240,
84 .pixclock = 79440,
85 .left_margin = 16,
86 .right_margin = 16,
87 .upper_margin = 16,
88 .lower_margin = 5,
89 .hsync_len = 48,
90 .vsync_len = 1,
91 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
92 .vmode = FB_VMODE_NONINTERLACED
93 },
94 {
95 .refresh = 60,
96 .xres = 640,
97 .yres = 480,
98 .pixclock = 39722,
99 .left_margin = 48,
100 .right_margin = 16,
101 .upper_margin = 33,
102 .lower_margin = 10,
103 .hsync_len = 96,
104 .vsync_len = 2,
105 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
106 .vmode = FB_VMODE_NONINTERLACED
107 },
108 {
109 .refresh = 72,
110 .xres = 640,
111 .yres = 480,
112 .pixclock = 32052,
113 .left_margin = 128,
114 .right_margin = 24,
115 .upper_margin = 28,
116 .lower_margin = 9,
117 .hsync_len = 40,
118 .vsync_len = 3,
119 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
120 .vmode = FB_VMODE_NONINTERLACED
121 },
122 {
123 .refresh = 75,
124 .xres = 640,
125 .yres = 480,
126 .pixclock = 31747,
127 .left_margin = 120,
128 .right_margin = 16,
129 .upper_margin = 16,
130 .lower_margin = 1,
131 .hsync_len = 64,
132 .vsync_len = 3,
133 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
134 .vmode = FB_VMODE_NONINTERLACED
135 },
136 {
137 .refresh = 90,
138 .xres = 640,
139 .yres = 480,
140 .pixclock = 25057,
141 .left_margin = 120,
142 .right_margin = 32,
143 .upper_margin = 14,
144 .lower_margin = 25,
145 .hsync_len = 40,
146 .vsync_len = 14,
147 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
148 .vmode = FB_VMODE_NONINTERLACED
149 },
150 {
151 .refresh = 100,
152 .xres = 640,
153 .yres = 480,
154 .pixclock = 22272,
155 .left_margin = 48,
156 .right_margin = 32,
157 .upper_margin = 17,
158 .lower_margin = 22,
159 .hsync_len = 128,
160 .vsync_len = 12,
161 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
162 .vmode = FB_VMODE_NONINTERLACED
163 },
164 {
165 .refresh = 60,
166 .xres = 800,
167 .yres = 480,
168 .pixclock = 33805,
169 .left_margin = 96,
170 .right_margin = 24,
171 .upper_margin = 10,
172 .lower_margin = 3,
173 .hsync_len = 72,
174 .vsync_len = 7,
175 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
176 .vmode = FB_VMODE_NONINTERLACED
177 },
178 {
179 .refresh = 60,
180 .xres = 800,
181 .yres = 600,
182 .pixclock = 25000,
183 .left_margin = 88,
184 .right_margin = 40,
185 .upper_margin = 23,
186 .lower_margin = 1,
187 .hsync_len = 128,
188 .vsync_len = 4,
189 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
190 .vmode = FB_VMODE_NONINTERLACED
191 },
192 {
193 .refresh = 60,
194 .xres = 854,
195 .yres = 480,
196 .pixclock = 31518,
197 .left_margin = 104,
198 .right_margin = 16,
199 .upper_margin = 13,
200 .lower_margin = 1,
201 .hsync_len = 88,
202 .vsync_len = 3,
203 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
204 .vmode = FB_VMODE_NONINTERLACED
205 },
206 {
207 .refresh = 70,
208 .xres = 1024,
209 .yres = 768,
210 .pixclock = 16886,
211 .left_margin = 3,
212 .right_margin = 3,
213 .upper_margin = 2,
214 .lower_margin = 2,
215 .hsync_len = 40,
216 .vsync_len = 18,
217 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
218 .vmode = FB_VMODE_NONINTERLACED
219 },
220 {
221 .refresh = 75,
222 .xres = 1024,
223 .yres = 768,
224 .pixclock = 15009,
225 .left_margin = 3,
226 .right_margin = 3,
227 .upper_margin = 2,
228 .lower_margin = 2,
229 .hsync_len = 80,
230 .vsync_len = 32,
231 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
232 .vmode = FB_VMODE_NONINTERLACED
233 },
234 {
235 .refresh = 60,
236 .xres = 1280,
237 .yres = 480,
238 .pixclock = 18939,
239 .left_margin = 353,
240 .right_margin = 47,
241 .upper_margin = 39,
242 .lower_margin = 4,
243 .hsync_len = 8,
244 .vsync_len = 2,
245 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
246 .vmode = FB_VMODE_NONINTERLACED
247 },
248 {
249 .refresh = 60,
250 .xres = 1280,
251 .yres = 720,
252 .pixclock = 13426,
253 .left_margin = 192,
254 .right_margin = 64,
255 .upper_margin = 22,
256 .lower_margin = 1,
257 .hsync_len = 136,
258 .vsync_len = 3,
259 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
260 .vmode = FB_VMODE_NONINTERLACED
261 },
262 {
263 .refresh = 60,
264 .xres = 1280,
265 .yres = 1024,
266 .pixclock = 9375,
267 .left_margin = 38,
268 .right_margin = 128,
269 .upper_margin = 2,
270 .lower_margin = 7,
271 .hsync_len = 216,
272 .vsync_len = 37,
273 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
274 .vmode = FB_VMODE_NONINTERLACED
275 },
276 {
277 .refresh = 70,
278 .xres = 1280,
279 .yres = 1024,
280 .pixclock = 9380,
281 .left_margin = 6,
282 .right_margin = 6,
283 .upper_margin = 4,
284 .lower_margin = 4,
285 .hsync_len = 60,
286 .vsync_len = 94,
287 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
288 .vmode = FB_VMODE_NONINTERLACED
289 },
290 {
291 .refresh = 75,
292 .xres = 1280,
293 .yres = 1024,
294 .pixclock = 9380,
295 .left_margin = 6,
296 .right_margin = 6,
297 .upper_margin = 4,
298 .lower_margin = 4,
299 .hsync_len = 60,
300 .vsync_len = 15,
301 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
302 .vmode = FB_VMODE_NONINTERLACED
303 },
304 {
305 .refresh = 60,
306 .xres = 1920,
307 .yres = 1080,
308 .pixclock = 5787,
309 .left_margin = 328,
310 .right_margin = 120,
311 .upper_margin = 34,
312 .lower_margin = 1,
313 .hsync_len = 208,
314 .vsync_len = 3,
315 .sync = FB_SYNC_COMP_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
316 .vmode = FB_VMODE_NONINTERLACED
317 },
318 };
319
320 static char *fb_mode;
321 static unsigned long default_bpp = 32;
322 static enum fsl_diu_monitor_port monitor_port;
323 static char *monitor_string;
324
325 #if defined(CONFIG_NOT_COHERENT_CACHE)
326 static u8 *coherence_data;
327 static size_t coherence_data_size;
328 static unsigned int d_cache_line_size;
329 #endif
330
331 static DEFINE_SPINLOCK(diu_lock);
332
333 struct fsl_diu_data {
334 struct fb_info *fsl_diu_info[FSL_AOI_NUM - 1];
335 /*FSL_AOI_NUM has one dummy AOI */
336 struct device_attribute dev_attr;
337 struct diu_ad *dummy_ad;
338 void *dummy_aoi_virt;
339 unsigned int irq;
340 int fb_enabled;
341 enum fsl_diu_monitor_port monitor_port;
342 struct diu __iomem *diu_reg;
343 spinlock_t reg_lock;
344 struct diu_addr ad;
345 struct diu_addr gamma;
346 struct diu_addr pallete;
347 struct diu_addr cursor;
348 };
349
350 enum mfb_index {
351 PLANE0 = 0, /* Plane 0, only one AOI that fills the screen */
352 PLANE1_AOI0, /* Plane 1, first AOI */
353 PLANE1_AOI1, /* Plane 1, second AOI */
354 PLANE2_AOI0, /* Plane 2, first AOI */
355 PLANE2_AOI1, /* Plane 2, second AOI */
356 };
357
358 struct mfb_info {
359 enum mfb_index index;
360 char *id;
361 int registered;
362 unsigned long pseudo_palette[16];
363 struct diu_ad *ad;
364 int cursor_reset;
365 unsigned char g_alpha;
366 unsigned int count;
367 int x_aoi_d; /* aoi display x offset to physical screen */
368 int y_aoi_d; /* aoi display y offset to physical screen */
369 struct fsl_diu_data *parent;
370 u8 *edid_data;
371 };
372
373
374 static struct mfb_info mfb_template[] = {
375 {
376 .index = PLANE0,
377 .id = "Panel0",
378 .registered = 0,
379 .count = 0,
380 .x_aoi_d = 0,
381 .y_aoi_d = 0,
382 },
383 {
384 .index = PLANE1_AOI0,
385 .id = "Panel1 AOI0",
386 .registered = 0,
387 .g_alpha = 0xff,
388 .count = 0,
389 .x_aoi_d = 0,
390 .y_aoi_d = 0,
391 },
392 {
393 .index = PLANE1_AOI1,
394 .id = "Panel1 AOI1",
395 .registered = 0,
396 .g_alpha = 0xff,
397 .count = 0,
398 .x_aoi_d = 0,
399 .y_aoi_d = 480,
400 },
401 {
402 .index = PLANE2_AOI0,
403 .id = "Panel2 AOI0",
404 .registered = 0,
405 .g_alpha = 0xff,
406 .count = 0,
407 .x_aoi_d = 640,
408 .y_aoi_d = 0,
409 },
410 {
411 .index = PLANE2_AOI1,
412 .id = "Panel2 AOI1",
413 .registered = 0,
414 .g_alpha = 0xff,
415 .count = 0,
416 .x_aoi_d = 640,
417 .y_aoi_d = 480,
418 },
419 };
420
421 /**
422 * fsl_diu_name_to_port - convert a port name to a monitor port enum
423 *
424 * Takes the name of a monitor port ("dvi", "lvds", or "dlvds") and returns
425 * the enum fsl_diu_monitor_port that corresponds to that string.
426 *
427 * For compatibility with older versions, a number ("0", "1", or "2") is also
428 * supported.
429 *
430 * If the string is unknown, DVI is assumed.
431 *
432 * If the particular port is not supported by the platform, another port
433 * (platform-specific) is chosen instead.
434 */
435 static enum fsl_diu_monitor_port fsl_diu_name_to_port(const char *s)
436 {
437 enum fsl_diu_monitor_port port = FSL_DIU_PORT_DVI;
438 unsigned long val;
439
440 if (s) {
441 if (!strict_strtoul(s, 10, &val) && (val <= 2))
442 port = (enum fsl_diu_monitor_port) val;
443 else if (strncmp(s, "lvds", 4) == 0)
444 port = FSL_DIU_PORT_LVDS;
445 else if (strncmp(s, "dlvds", 5) == 0)
446 port = FSL_DIU_PORT_DLVDS;
447 }
448
449 return diu_ops.valid_monitor_port(port);
450 }
451
452 /**
453 * fsl_diu_alloc - allocate memory for the DIU
454 * @size: number of bytes to allocate
455 * @param: returned physical address of memory
456 *
457 * This function allocates a physically-contiguous block of memory.
458 */
459 static void *fsl_diu_alloc(size_t size, phys_addr_t *phys)
460 {
461 void *virt;
462
463 virt = alloc_pages_exact(size, GFP_DMA | __GFP_ZERO);
464 if (virt)
465 *phys = virt_to_phys(virt);
466
467 return virt;
468 }
469
470 /**
471 * fsl_diu_free - release DIU memory
472 * @virt: pointer returned by fsl_diu_alloc()
473 * @size: number of bytes allocated by fsl_diu_alloc()
474 *
475 * This function releases memory allocated by fsl_diu_alloc().
476 */
477 static void fsl_diu_free(void *virt, size_t size)
478 {
479 if (virt && size)
480 free_pages_exact(virt, size);
481 }
482
483 /*
484 * Workaround for failed writing desc register of planes.
485 * Needed with MPC5121 DIU rev 2.0 silicon.
486 */
487 void wr_reg_wa(u32 *reg, u32 val)
488 {
489 do {
490 out_be32(reg, val);
491 } while (in_be32(reg) != val);
492 }
493
494 static void fsl_diu_enable_panel(struct fb_info *info)
495 {
496 struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
497 struct diu_ad *ad = mfbi->ad;
498 struct fsl_diu_data *machine_data = mfbi->parent;
499 struct diu __iomem *hw = machine_data->diu_reg;
500
501 switch (mfbi->index) {
502 case PLANE0:
503 if (hw->desc[0] != ad->paddr)
504 wr_reg_wa(&hw->desc[0], ad->paddr);
505 break;
506 case PLANE1_AOI0:
507 cmfbi = machine_data->fsl_diu_info[2]->par;
508 if (hw->desc[1] != ad->paddr) { /* AOI0 closed */
509 if (cmfbi->count > 0) /* AOI1 open */
510 ad->next_ad =
511 cpu_to_le32(cmfbi->ad->paddr);
512 else
513 ad->next_ad = 0;
514 wr_reg_wa(&hw->desc[1], ad->paddr);
515 }
516 break;
517 case PLANE2_AOI0:
518 cmfbi = machine_data->fsl_diu_info[4]->par;
519 if (hw->desc[2] != ad->paddr) { /* AOI0 closed */
520 if (cmfbi->count > 0) /* AOI1 open */
521 ad->next_ad =
522 cpu_to_le32(cmfbi->ad->paddr);
523 else
524 ad->next_ad = 0;
525 wr_reg_wa(&hw->desc[2], ad->paddr);
526 }
527 break;
528 case PLANE1_AOI1:
529 pmfbi = machine_data->fsl_diu_info[1]->par;
530 ad->next_ad = 0;
531 if (hw->desc[1] == machine_data->dummy_ad->paddr)
532 wr_reg_wa(&hw->desc[1], ad->paddr);
533 else /* AOI0 open */
534 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
535 break;
536 case PLANE2_AOI1:
537 pmfbi = machine_data->fsl_diu_info[3]->par;
538 ad->next_ad = 0;
539 if (hw->desc[2] == machine_data->dummy_ad->paddr)
540 wr_reg_wa(&hw->desc[2], ad->paddr);
541 else /* AOI0 was open */
542 pmfbi->ad->next_ad = cpu_to_le32(ad->paddr);
543 break;
544 }
545 }
546
547 static void fsl_diu_disable_panel(struct fb_info *info)
548 {
549 struct mfb_info *pmfbi, *cmfbi, *mfbi = info->par;
550 struct diu_ad *ad = mfbi->ad;
551 struct fsl_diu_data *machine_data = mfbi->parent;
552 struct diu __iomem *hw = machine_data->diu_reg;
553
554 switch (mfbi->index) {
555 case PLANE0:
556 if (hw->desc[0] != machine_data->dummy_ad->paddr)
557 wr_reg_wa(&hw->desc[0], machine_data->dummy_ad->paddr);
558 break;
559 case PLANE1_AOI0:
560 cmfbi = machine_data->fsl_diu_info[2]->par;
561 if (cmfbi->count > 0) /* AOI1 is open */
562 wr_reg_wa(&hw->desc[1], cmfbi->ad->paddr);
563 /* move AOI1 to the first */
564 else /* AOI1 was closed */
565 wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
566 /* close AOI 0 */
567 break;
568 case PLANE2_AOI0:
569 cmfbi = machine_data->fsl_diu_info[4]->par;
570 if (cmfbi->count > 0) /* AOI1 is open */
571 wr_reg_wa(&hw->desc[2], cmfbi->ad->paddr);
572 /* move AOI1 to the first */
573 else /* AOI1 was closed */
574 wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
575 /* close AOI 0 */
576 break;
577 case PLANE1_AOI1:
578 pmfbi = machine_data->fsl_diu_info[1]->par;
579 if (hw->desc[1] != ad->paddr) {
580 /* AOI1 is not the first in the chain */
581 if (pmfbi->count > 0)
582 /* AOI0 is open, must be the first */
583 pmfbi->ad->next_ad = 0;
584 } else /* AOI1 is the first in the chain */
585 wr_reg_wa(&hw->desc[1], machine_data->dummy_ad->paddr);
586 /* close AOI 1 */
587 break;
588 case PLANE2_AOI1:
589 pmfbi = machine_data->fsl_diu_info[3]->par;
590 if (hw->desc[2] != ad->paddr) {
591 /* AOI1 is not the first in the chain */
592 if (pmfbi->count > 0)
593 /* AOI0 is open, must be the first */
594 pmfbi->ad->next_ad = 0;
595 } else /* AOI1 is the first in the chain */
596 wr_reg_wa(&hw->desc[2], machine_data->dummy_ad->paddr);
597 /* close AOI 1 */
598 break;
599 }
600 }
601
602 static void enable_lcdc(struct fb_info *info)
603 {
604 struct mfb_info *mfbi = info->par;
605 struct fsl_diu_data *machine_data = mfbi->parent;
606 struct diu __iomem *hw = machine_data->diu_reg;
607
608 if (!machine_data->fb_enabled) {
609 out_be32(&hw->diu_mode, MFB_MODE1);
610 machine_data->fb_enabled++;
611 }
612 }
613
614 static void disable_lcdc(struct fb_info *info)
615 {
616 struct mfb_info *mfbi = info->par;
617 struct fsl_diu_data *machine_data = mfbi->parent;
618 struct diu __iomem *hw = machine_data->diu_reg;
619
620 if (machine_data->fb_enabled) {
621 out_be32(&hw->diu_mode, 0);
622 machine_data->fb_enabled = 0;
623 }
624 }
625
626 static void adjust_aoi_size_position(struct fb_var_screeninfo *var,
627 struct fb_info *info)
628 {
629 struct mfb_info *lower_aoi_mfbi, *upper_aoi_mfbi, *mfbi = info->par;
630 struct fsl_diu_data *machine_data = mfbi->parent;
631 int available_height, upper_aoi_bottom;
632 enum mfb_index index = mfbi->index;
633 int lower_aoi_is_open, upper_aoi_is_open;
634 __u32 base_plane_width, base_plane_height, upper_aoi_height;
635
636 base_plane_width = machine_data->fsl_diu_info[0]->var.xres;
637 base_plane_height = machine_data->fsl_diu_info[0]->var.yres;
638
639 if (mfbi->x_aoi_d < 0)
640 mfbi->x_aoi_d = 0;
641 if (mfbi->y_aoi_d < 0)
642 mfbi->y_aoi_d = 0;
643 switch (index) {
644 case PLANE0:
645 if (mfbi->x_aoi_d != 0)
646 mfbi->x_aoi_d = 0;
647 if (mfbi->y_aoi_d != 0)
648 mfbi->y_aoi_d = 0;
649 break;
650 case PLANE1_AOI0:
651 case PLANE2_AOI0:
652 lower_aoi_mfbi = machine_data->fsl_diu_info[index+1]->par;
653 lower_aoi_is_open = lower_aoi_mfbi->count > 0 ? 1 : 0;
654 if (var->xres > base_plane_width)
655 var->xres = base_plane_width;
656 if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
657 mfbi->x_aoi_d = base_plane_width - var->xres;
658
659 if (lower_aoi_is_open)
660 available_height = lower_aoi_mfbi->y_aoi_d;
661 else
662 available_height = base_plane_height;
663 if (var->yres > available_height)
664 var->yres = available_height;
665 if ((mfbi->y_aoi_d + var->yres) > available_height)
666 mfbi->y_aoi_d = available_height - var->yres;
667 break;
668 case PLANE1_AOI1:
669 case PLANE2_AOI1:
670 upper_aoi_mfbi = machine_data->fsl_diu_info[index-1]->par;
671 upper_aoi_height =
672 machine_data->fsl_diu_info[index-1]->var.yres;
673 upper_aoi_bottom = upper_aoi_mfbi->y_aoi_d + upper_aoi_height;
674 upper_aoi_is_open = upper_aoi_mfbi->count > 0 ? 1 : 0;
675 if (var->xres > base_plane_width)
676 var->xres = base_plane_width;
677 if ((mfbi->x_aoi_d + var->xres) > base_plane_width)
678 mfbi->x_aoi_d = base_plane_width - var->xres;
679 if (mfbi->y_aoi_d < 0)
680 mfbi->y_aoi_d = 0;
681 if (upper_aoi_is_open) {
682 if (mfbi->y_aoi_d < upper_aoi_bottom)
683 mfbi->y_aoi_d = upper_aoi_bottom;
684 available_height = base_plane_height
685 - upper_aoi_bottom;
686 } else
687 available_height = base_plane_height;
688 if (var->yres > available_height)
689 var->yres = available_height;
690 if ((mfbi->y_aoi_d + var->yres) > base_plane_height)
691 mfbi->y_aoi_d = base_plane_height - var->yres;
692 break;
693 }
694 }
695 /*
696 * Checks to see if the hardware supports the state requested by var passed
697 * in. This function does not alter the hardware state! If the var passed in
698 * is slightly off by what the hardware can support then we alter the var
699 * PASSED in to what we can do. If the hardware doesn't support mode change
700 * a -EINVAL will be returned by the upper layers.
701 */
702 static int fsl_diu_check_var(struct fb_var_screeninfo *var,
703 struct fb_info *info)
704 {
705 if (var->xres_virtual < var->xres)
706 var->xres_virtual = var->xres;
707 if (var->yres_virtual < var->yres)
708 var->yres_virtual = var->yres;
709
710 if (var->xoffset < 0)
711 var->xoffset = 0;
712
713 if (var->yoffset < 0)
714 var->yoffset = 0;
715
716 if (var->xoffset + info->var.xres > info->var.xres_virtual)
717 var->xoffset = info->var.xres_virtual - info->var.xres;
718
719 if (var->yoffset + info->var.yres > info->var.yres_virtual)
720 var->yoffset = info->var.yres_virtual - info->var.yres;
721
722 if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
723 (var->bits_per_pixel != 16))
724 var->bits_per_pixel = default_bpp;
725
726 switch (var->bits_per_pixel) {
727 case 16:
728 var->red.length = 5;
729 var->red.offset = 11;
730 var->red.msb_right = 0;
731
732 var->green.length = 6;
733 var->green.offset = 5;
734 var->green.msb_right = 0;
735
736 var->blue.length = 5;
737 var->blue.offset = 0;
738 var->blue.msb_right = 0;
739
740 var->transp.length = 0;
741 var->transp.offset = 0;
742 var->transp.msb_right = 0;
743 break;
744 case 24:
745 var->red.length = 8;
746 var->red.offset = 0;
747 var->red.msb_right = 0;
748
749 var->green.length = 8;
750 var->green.offset = 8;
751 var->green.msb_right = 0;
752
753 var->blue.length = 8;
754 var->blue.offset = 16;
755 var->blue.msb_right = 0;
756
757 var->transp.length = 0;
758 var->transp.offset = 0;
759 var->transp.msb_right = 0;
760 break;
761 case 32:
762 var->red.length = 8;
763 var->red.offset = 16;
764 var->red.msb_right = 0;
765
766 var->green.length = 8;
767 var->green.offset = 8;
768 var->green.msb_right = 0;
769
770 var->blue.length = 8;
771 var->blue.offset = 0;
772 var->blue.msb_right = 0;
773
774 var->transp.length = 8;
775 var->transp.offset = 24;
776 var->transp.msb_right = 0;
777
778 break;
779 }
780
781 var->height = -1;
782 var->width = -1;
783 var->grayscale = 0;
784
785 /* Copy nonstd field to/from sync for fbset usage */
786 var->sync |= var->nonstd;
787 var->nonstd |= var->sync;
788
789 adjust_aoi_size_position(var, info);
790 return 0;
791 }
792
793 static void set_fix(struct fb_info *info)
794 {
795 struct fb_fix_screeninfo *fix = &info->fix;
796 struct fb_var_screeninfo *var = &info->var;
797 struct mfb_info *mfbi = info->par;
798
799 strncpy(fix->id, mfbi->id, sizeof(fix->id));
800 fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
801 fix->type = FB_TYPE_PACKED_PIXELS;
802 fix->accel = FB_ACCEL_NONE;
803 fix->visual = FB_VISUAL_TRUECOLOR;
804 fix->xpanstep = 1;
805 fix->ypanstep = 1;
806 }
807
808 static void update_lcdc(struct fb_info *info)
809 {
810 struct fb_var_screeninfo *var = &info->var;
811 struct mfb_info *mfbi = info->par;
812 struct fsl_diu_data *machine_data = mfbi->parent;
813 struct diu __iomem *hw;
814 int i, j;
815 char __iomem *cursor_base, *gamma_table_base;
816
817 u32 temp;
818
819 hw = machine_data->diu_reg;
820
821 diu_ops.set_monitor_port(machine_data->monitor_port);
822 gamma_table_base = machine_data->gamma.vaddr;
823 cursor_base = machine_data->cursor.vaddr;
824 /* Prep for DIU init - gamma table, cursor table */
825
826 for (i = 0; i <= 2; i++)
827 for (j = 0; j <= 255; j++)
828 *gamma_table_base++ = j;
829
830 diu_ops.set_gamma_table(machine_data->monitor_port,
831 machine_data->gamma.vaddr);
832
833 disable_lcdc(info);
834
835 /* Program DIU registers */
836
837 out_be32(&hw->gamma, machine_data->gamma.paddr);
838 out_be32(&hw->cursor, machine_data->cursor.paddr);
839
840 out_be32(&hw->bgnd, 0x007F7F7F); /* BGND */
841 out_be32(&hw->bgnd_wb, 0); /* BGND_WB */
842 out_be32(&hw->disp_size, (var->yres << 16 | var->xres));
843 /* DISP SIZE */
844 out_be32(&hw->wb_size, 0); /* WB SIZE */
845 out_be32(&hw->wb_mem_addr, 0); /* WB MEM ADDR */
846
847 /* Horizontal and vertical configuration register */
848 temp = var->left_margin << 22 | /* BP_H */
849 var->hsync_len << 11 | /* PW_H */
850 var->right_margin; /* FP_H */
851
852 out_be32(&hw->hsyn_para, temp);
853
854 temp = var->upper_margin << 22 | /* BP_V */
855 var->vsync_len << 11 | /* PW_V */
856 var->lower_margin; /* FP_V */
857
858 out_be32(&hw->vsyn_para, temp);
859
860 diu_ops.set_pixel_clock(var->pixclock);
861
862 out_be32(&hw->syn_pol, 0); /* SYNC SIGNALS POLARITY */
863 out_be32(&hw->thresholds, 0x00037800); /* The Thresholds */
864 out_be32(&hw->int_status, 0); /* INTERRUPT STATUS */
865 out_be32(&hw->plut, 0x01F5F666);
866
867 /* Enable the DIU */
868 enable_lcdc(info);
869 }
870
871 static int map_video_memory(struct fb_info *info)
872 {
873 phys_addr_t phys;
874 u32 smem_len = info->fix.line_length * info->var.yres_virtual;
875
876 info->screen_base = fsl_diu_alloc(smem_len, &phys);
877 if (info->screen_base == NULL) {
878 dev_err(info->dev, "unable to allocate fb memory\n");
879 return -ENOMEM;
880 }
881 mutex_lock(&info->mm_lock);
882 info->fix.smem_start = (unsigned long) phys;
883 info->fix.smem_len = smem_len;
884 mutex_unlock(&info->mm_lock);
885 info->screen_size = info->fix.smem_len;
886
887 return 0;
888 }
889
890 static void unmap_video_memory(struct fb_info *info)
891 {
892 fsl_diu_free(info->screen_base, info->fix.smem_len);
893 mutex_lock(&info->mm_lock);
894 info->screen_base = NULL;
895 info->fix.smem_start = 0;
896 info->fix.smem_len = 0;
897 mutex_unlock(&info->mm_lock);
898 }
899
900 /*
901 * Using the fb_var_screeninfo in fb_info we set the aoi of this
902 * particular framebuffer. It is a light version of fsl_diu_set_par.
903 */
904 static int fsl_diu_set_aoi(struct fb_info *info)
905 {
906 struct fb_var_screeninfo *var = &info->var;
907 struct mfb_info *mfbi = info->par;
908 struct diu_ad *ad = mfbi->ad;
909
910 /* AOI should not be greater than display size */
911 ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
912 ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
913 return 0;
914 }
915
916 /*
917 * Using the fb_var_screeninfo in fb_info we set the resolution of this
918 * particular framebuffer. This function alters the fb_fix_screeninfo stored
919 * in fb_info. It does not alter var in fb_info since we are using that
920 * data. This means we depend on the data in var inside fb_info to be
921 * supported by the hardware. fsl_diu_check_var is always called before
922 * fsl_diu_set_par to ensure this.
923 */
924 static int fsl_diu_set_par(struct fb_info *info)
925 {
926 unsigned long len;
927 struct fb_var_screeninfo *var = &info->var;
928 struct mfb_info *mfbi = info->par;
929 struct fsl_diu_data *machine_data = mfbi->parent;
930 struct diu_ad *ad = mfbi->ad;
931 struct diu __iomem *hw;
932
933 hw = machine_data->diu_reg;
934
935 set_fix(info);
936 mfbi->cursor_reset = 1;
937
938 len = info->var.yres_virtual * info->fix.line_length;
939 /* Alloc & dealloc each time resolution/bpp change */
940 if (len != info->fix.smem_len) {
941 if (info->fix.smem_start)
942 unmap_video_memory(info);
943
944 /* Memory allocation for framebuffer */
945 if (map_video_memory(info)) {
946 dev_err(info->dev, "unable to allocate fb memory 1\n");
947 return -ENOMEM;
948 }
949 }
950
951 ad->pix_fmt = diu_ops.get_pixel_format(machine_data->monitor_port,
952 var->bits_per_pixel);
953 ad->addr = cpu_to_le32(info->fix.smem_start);
954 ad->src_size_g_alpha = cpu_to_le32((var->yres_virtual << 12) |
955 var->xres_virtual) | mfbi->g_alpha;
956 /* AOI should not be greater than display size */
957 ad->aoi_size = cpu_to_le32((var->yres << 16) | var->xres);
958 ad->offset_xyi = cpu_to_le32((var->yoffset << 16) | var->xoffset);
959 ad->offset_xyd = cpu_to_le32((mfbi->y_aoi_d << 16) | mfbi->x_aoi_d);
960
961 /* Disable chroma keying function */
962 ad->ckmax_r = 0;
963 ad->ckmax_g = 0;
964 ad->ckmax_b = 0;
965
966 ad->ckmin_r = 255;
967 ad->ckmin_g = 255;
968 ad->ckmin_b = 255;
969
970 if (mfbi->index == PLANE0)
971 update_lcdc(info);
972 return 0;
973 }
974
975 static inline __u32 CNVT_TOHW(__u32 val, __u32 width)
976 {
977 return ((val << width) + 0x7FFF - val) >> 16;
978 }
979
980 /*
981 * Set a single color register. The values supplied have a 16 bit magnitude
982 * which needs to be scaled in this function for the hardware. Things to take
983 * into consideration are how many color registers, if any, are supported with
984 * the current color visual. With truecolor mode no color palettes are
985 * supported. Here a pseudo palette is created which we store the value in
986 * pseudo_palette in struct fb_info. For pseudocolor mode we have a limited
987 * color palette.
988 */
989 static int fsl_diu_setcolreg(unsigned int regno, unsigned int red,
990 unsigned int green, unsigned int blue,
991 unsigned int transp, struct fb_info *info)
992 {
993 int ret = 1;
994
995 /*
996 * If greyscale is true, then we convert the RGB value
997 * to greyscale no matter what visual we are using.
998 */
999 if (info->var.grayscale)
1000 red = green = blue = (19595 * red + 38470 * green +
1001 7471 * blue) >> 16;
1002 switch (info->fix.visual) {
1003 case FB_VISUAL_TRUECOLOR:
1004 /*
1005 * 16-bit True Colour. We encode the RGB value
1006 * according to the RGB bitfield information.
1007 */
1008 if (regno < 16) {
1009 u32 *pal = info->pseudo_palette;
1010 u32 v;
1011
1012 red = CNVT_TOHW(red, info->var.red.length);
1013 green = CNVT_TOHW(green, info->var.green.length);
1014 blue = CNVT_TOHW(blue, info->var.blue.length);
1015 transp = CNVT_TOHW(transp, info->var.transp.length);
1016
1017 v = (red << info->var.red.offset) |
1018 (green << info->var.green.offset) |
1019 (blue << info->var.blue.offset) |
1020 (transp << info->var.transp.offset);
1021
1022 pal[regno] = v;
1023 ret = 0;
1024 }
1025 break;
1026 }
1027
1028 return ret;
1029 }
1030
1031 /*
1032 * Pan (or wrap, depending on the `vmode' field) the display using the
1033 * 'xoffset' and 'yoffset' fields of the 'var' structure. If the values
1034 * don't fit, return -EINVAL.
1035 */
1036 static int fsl_diu_pan_display(struct fb_var_screeninfo *var,
1037 struct fb_info *info)
1038 {
1039 if ((info->var.xoffset == var->xoffset) &&
1040 (info->var.yoffset == var->yoffset))
1041 return 0; /* No change, do nothing */
1042
1043 if (var->xoffset < 0 || var->yoffset < 0
1044 || var->xoffset + info->var.xres > info->var.xres_virtual
1045 || var->yoffset + info->var.yres > info->var.yres_virtual)
1046 return -EINVAL;
1047
1048 info->var.xoffset = var->xoffset;
1049 info->var.yoffset = var->yoffset;
1050
1051 if (var->vmode & FB_VMODE_YWRAP)
1052 info->var.vmode |= FB_VMODE_YWRAP;
1053 else
1054 info->var.vmode &= ~FB_VMODE_YWRAP;
1055
1056 fsl_diu_set_aoi(info);
1057
1058 return 0;
1059 }
1060
1061 static int fsl_diu_ioctl(struct fb_info *info, unsigned int cmd,
1062 unsigned long arg)
1063 {
1064 struct mfb_info *mfbi = info->par;
1065 struct diu_ad *ad = mfbi->ad;
1066 struct mfb_chroma_key ck;
1067 unsigned char global_alpha;
1068 struct aoi_display_offset aoi_d;
1069 __u32 pix_fmt;
1070 void __user *buf = (void __user *)arg;
1071
1072 if (!arg)
1073 return -EINVAL;
1074 switch (cmd) {
1075 case MFB_SET_PIXFMT_OLD:
1076 dev_warn(info->dev,
1077 "MFB_SET_PIXFMT value of 0x%08x is deprecated.\n",
1078 MFB_SET_PIXFMT_OLD);
1079 case MFB_SET_PIXFMT:
1080 if (copy_from_user(&pix_fmt, buf, sizeof(pix_fmt)))
1081 return -EFAULT;
1082 ad->pix_fmt = pix_fmt;
1083 break;
1084 case MFB_GET_PIXFMT_OLD:
1085 dev_warn(info->dev,
1086 "MFB_GET_PIXFMT value of 0x%08x is deprecated.\n",
1087 MFB_GET_PIXFMT_OLD);
1088 case MFB_GET_PIXFMT:
1089 pix_fmt = ad->pix_fmt;
1090 if (copy_to_user(buf, &pix_fmt, sizeof(pix_fmt)))
1091 return -EFAULT;
1092 break;
1093 case MFB_SET_AOID:
1094 if (copy_from_user(&aoi_d, buf, sizeof(aoi_d)))
1095 return -EFAULT;
1096 mfbi->x_aoi_d = aoi_d.x_aoi_d;
1097 mfbi->y_aoi_d = aoi_d.y_aoi_d;
1098 fsl_diu_check_var(&info->var, info);
1099 fsl_diu_set_aoi(info);
1100 break;
1101 case MFB_GET_AOID:
1102 aoi_d.x_aoi_d = mfbi->x_aoi_d;
1103 aoi_d.y_aoi_d = mfbi->y_aoi_d;
1104 if (copy_to_user(buf, &aoi_d, sizeof(aoi_d)))
1105 return -EFAULT;
1106 break;
1107 case MFB_GET_ALPHA:
1108 global_alpha = mfbi->g_alpha;
1109 if (copy_to_user(buf, &global_alpha, sizeof(global_alpha)))
1110 return -EFAULT;
1111 break;
1112 case MFB_SET_ALPHA:
1113 /* set panel information */
1114 if (copy_from_user(&global_alpha, buf, sizeof(global_alpha)))
1115 return -EFAULT;
1116 ad->src_size_g_alpha = (ad->src_size_g_alpha & (~0xff)) |
1117 (global_alpha & 0xff);
1118 mfbi->g_alpha = global_alpha;
1119 break;
1120 case MFB_SET_CHROMA_KEY:
1121 /* set panel winformation */
1122 if (copy_from_user(&ck, buf, sizeof(ck)))
1123 return -EFAULT;
1124
1125 if (ck.enable &&
1126 (ck.red_max < ck.red_min ||
1127 ck.green_max < ck.green_min ||
1128 ck.blue_max < ck.blue_min))
1129 return -EINVAL;
1130
1131 if (!ck.enable) {
1132 ad->ckmax_r = 0;
1133 ad->ckmax_g = 0;
1134 ad->ckmax_b = 0;
1135 ad->ckmin_r = 255;
1136 ad->ckmin_g = 255;
1137 ad->ckmin_b = 255;
1138 } else {
1139 ad->ckmax_r = ck.red_max;
1140 ad->ckmax_g = ck.green_max;
1141 ad->ckmax_b = ck.blue_max;
1142 ad->ckmin_r = ck.red_min;
1143 ad->ckmin_g = ck.green_min;
1144 ad->ckmin_b = ck.blue_min;
1145 }
1146 break;
1147 default:
1148 dev_err(info->dev, "unknown ioctl command (0x%08X)\n", cmd);
1149 return -ENOIOCTLCMD;
1150 }
1151
1152 return 0;
1153 }
1154
1155 /* turn on fb if count == 1
1156 */
1157 static int fsl_diu_open(struct fb_info *info, int user)
1158 {
1159 struct mfb_info *mfbi = info->par;
1160 int res = 0;
1161
1162 /* free boot splash memory on first /dev/fb0 open */
1163 if ((mfbi->index == PLANE0) && diu_ops.release_bootmem)
1164 diu_ops.release_bootmem();
1165
1166 spin_lock(&diu_lock);
1167 mfbi->count++;
1168 if (mfbi->count == 1) {
1169 fsl_diu_check_var(&info->var, info);
1170 res = fsl_diu_set_par(info);
1171 if (res < 0)
1172 mfbi->count--;
1173 else
1174 fsl_diu_enable_panel(info);
1175 }
1176
1177 spin_unlock(&diu_lock);
1178 return res;
1179 }
1180
1181 /* turn off fb if count == 0
1182 */
1183 static int fsl_diu_release(struct fb_info *info, int user)
1184 {
1185 struct mfb_info *mfbi = info->par;
1186 int res = 0;
1187
1188 spin_lock(&diu_lock);
1189 mfbi->count--;
1190 if (mfbi->count == 0)
1191 fsl_diu_disable_panel(info);
1192
1193 spin_unlock(&diu_lock);
1194 return res;
1195 }
1196
1197 static struct fb_ops fsl_diu_ops = {
1198 .owner = THIS_MODULE,
1199 .fb_check_var = fsl_diu_check_var,
1200 .fb_set_par = fsl_diu_set_par,
1201 .fb_setcolreg = fsl_diu_setcolreg,
1202 .fb_pan_display = fsl_diu_pan_display,
1203 .fb_fillrect = cfb_fillrect,
1204 .fb_copyarea = cfb_copyarea,
1205 .fb_imageblit = cfb_imageblit,
1206 .fb_ioctl = fsl_diu_ioctl,
1207 .fb_open = fsl_diu_open,
1208 .fb_release = fsl_diu_release,
1209 };
1210
1211 static int init_fbinfo(struct fb_info *info)
1212 {
1213 struct mfb_info *mfbi = info->par;
1214
1215 info->device = NULL;
1216 info->var.activate = FB_ACTIVATE_NOW;
1217 info->fbops = &fsl_diu_ops;
1218 info->flags = FBINFO_FLAG_DEFAULT;
1219 info->pseudo_palette = &mfbi->pseudo_palette;
1220
1221 /* Allocate colormap */
1222 fb_alloc_cmap(&info->cmap, 16, 0);
1223 return 0;
1224 }
1225
1226 static int __devinit install_fb(struct fb_info *info)
1227 {
1228 int rc;
1229 struct mfb_info *mfbi = info->par;
1230 const char *aoi_mode, *init_aoi_mode = "320x240";
1231 struct fb_videomode *db = fsl_diu_mode_db;
1232 unsigned int dbsize = ARRAY_SIZE(fsl_diu_mode_db);
1233 int has_default_mode = 1;
1234
1235 if (init_fbinfo(info))
1236 return -EINVAL;
1237
1238 if (mfbi->index == PLANE0) {
1239 if (mfbi->edid_data) {
1240 /* Now build modedb from EDID */
1241 fb_edid_to_monspecs(mfbi->edid_data, &info->monspecs);
1242 fb_videomode_to_modelist(info->monspecs.modedb,
1243 info->monspecs.modedb_len,
1244 &info->modelist);
1245 db = info->monspecs.modedb;
1246 dbsize = info->monspecs.modedb_len;
1247 }
1248 aoi_mode = fb_mode;
1249 } else {
1250 aoi_mode = init_aoi_mode;
1251 }
1252 rc = fb_find_mode(&info->var, info, aoi_mode, db, dbsize, NULL,
1253 default_bpp);
1254 if (!rc) {
1255 /*
1256 * For plane 0 we continue and look into
1257 * driver's internal modedb.
1258 */
1259 if ((mfbi->index == PLANE0) && mfbi->edid_data)
1260 has_default_mode = 0;
1261 else
1262 return -EINVAL;
1263 }
1264
1265 if (!has_default_mode) {
1266 rc = fb_find_mode(&info->var, info, aoi_mode, fsl_diu_mode_db,
1267 ARRAY_SIZE(fsl_diu_mode_db), NULL, default_bpp);
1268 if (rc)
1269 has_default_mode = 1;
1270 }
1271
1272 /* Still not found, use preferred mode from database if any */
1273 if (!has_default_mode && info->monspecs.modedb) {
1274 struct fb_monspecs *specs = &info->monspecs;
1275 struct fb_videomode *modedb = &specs->modedb[0];
1276
1277 /*
1278 * Get preferred timing. If not found,
1279 * first mode in database will be used.
1280 */
1281 if (specs->misc & FB_MISC_1ST_DETAIL) {
1282 int i;
1283
1284 for (i = 0; i < specs->modedb_len; i++) {
1285 if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
1286 modedb = &specs->modedb[i];
1287 break;
1288 }
1289 }
1290 }
1291
1292 info->var.bits_per_pixel = default_bpp;
1293 fb_videomode_to_var(&info->var, modedb);
1294 }
1295
1296 if (fsl_diu_check_var(&info->var, info)) {
1297 dev_err(info->dev, "fsl_diu_check_var failed\n");
1298 unmap_video_memory(info);
1299 fb_dealloc_cmap(&info->cmap);
1300 return -EINVAL;
1301 }
1302
1303 if (register_framebuffer(info) < 0) {
1304 dev_err(info->dev, "register_framebuffer failed\n");
1305 unmap_video_memory(info);
1306 fb_dealloc_cmap(&info->cmap);
1307 return -EINVAL;
1308 }
1309
1310 mfbi->registered = 1;
1311 dev_info(info->dev, "%s registered successfully\n", mfbi->id);
1312
1313 return 0;
1314 }
1315
1316 static void uninstall_fb(struct fb_info *info)
1317 {
1318 struct mfb_info *mfbi = info->par;
1319
1320 if (!mfbi->registered)
1321 return;
1322
1323 if (mfbi->index == PLANE0)
1324 kfree(mfbi->edid_data);
1325
1326 unregister_framebuffer(info);
1327 unmap_video_memory(info);
1328 if (&info->cmap)
1329 fb_dealloc_cmap(&info->cmap);
1330
1331 mfbi->registered = 0;
1332 }
1333
1334 static irqreturn_t fsl_diu_isr(int irq, void *dev_id)
1335 {
1336 struct diu __iomem *hw = dev_id;
1337 unsigned int status = in_be32(&hw->int_status);
1338
1339 if (status) {
1340 /* This is the workaround for underrun */
1341 if (status & INT_UNDRUN) {
1342 out_be32(&hw->diu_mode, 0);
1343 udelay(1);
1344 out_be32(&hw->diu_mode, 1);
1345 }
1346 #if defined(CONFIG_NOT_COHERENT_CACHE)
1347 else if (status & INT_VSYNC) {
1348 unsigned int i;
1349
1350 for (i = 0; i < coherence_data_size;
1351 i += d_cache_line_size)
1352 __asm__ __volatile__ (
1353 "dcbz 0, %[input]"
1354 ::[input]"r"(&coherence_data[i]));
1355 }
1356 #endif
1357 return IRQ_HANDLED;
1358 }
1359 return IRQ_NONE;
1360 }
1361
1362 static int request_irq_local(struct fsl_diu_data *machine_data)
1363 {
1364 struct diu __iomem *hw = machine_data->diu_reg;
1365 u32 ints;
1366 int ret;
1367
1368 /* Read to clear the status */
1369 in_be32(&hw->int_status);
1370
1371 ret = request_irq(machine_data->irq, fsl_diu_isr, 0, "fsl-diu-fb", hw);
1372 if (!ret) {
1373 ints = INT_PARERR | INT_LS_BF_VS;
1374 #if !defined(CONFIG_NOT_COHERENT_CACHE)
1375 ints |= INT_VSYNC;
1376 #endif
1377
1378 /* Read to clear the status */
1379 in_be32(&hw->int_status);
1380 out_be32(&hw->int_mask, ints);
1381 }
1382
1383 return ret;
1384 }
1385
1386 static void free_irq_local(struct fsl_diu_data *machine_data)
1387 {
1388 struct diu __iomem *hw = machine_data->diu_reg;
1389
1390 /* Disable all LCDC interrupt */
1391 out_be32(&hw->int_mask, 0x1f);
1392
1393 free_irq(machine_data->irq, NULL);
1394 }
1395
1396 #ifdef CONFIG_PM
1397 /*
1398 * Power management hooks. Note that we won't be called from IRQ context,
1399 * unlike the blank functions above, so we may sleep.
1400 */
1401 static int fsl_diu_suspend(struct platform_device *ofdev, pm_message_t state)
1402 {
1403 struct fsl_diu_data *machine_data;
1404
1405 machine_data = dev_get_drvdata(&ofdev->dev);
1406 disable_lcdc(machine_data->fsl_diu_info[0]);
1407
1408 return 0;
1409 }
1410
1411 static int fsl_diu_resume(struct platform_device *ofdev)
1412 {
1413 struct fsl_diu_data *machine_data;
1414
1415 machine_data = dev_get_drvdata(&ofdev->dev);
1416 enable_lcdc(machine_data->fsl_diu_info[0]);
1417
1418 return 0;
1419 }
1420
1421 #else
1422 #define fsl_diu_suspend NULL
1423 #define fsl_diu_resume NULL
1424 #endif /* CONFIG_PM */
1425
1426 /* Align to 64-bit(8-byte), 32-byte, etc. */
1427 static int allocate_buf(struct device *dev, struct diu_addr *buf, u32 size,
1428 u32 bytes_align)
1429 {
1430 u32 offset;
1431 dma_addr_t mask;
1432
1433 buf->vaddr =
1434 dma_alloc_coherent(dev, size + bytes_align, &buf->paddr,
1435 GFP_DMA | __GFP_ZERO);
1436 if (!buf->vaddr)
1437 return -ENOMEM;
1438
1439 mask = bytes_align - 1;
1440 offset = buf->paddr & mask;
1441 if (offset) {
1442 buf->offset = bytes_align - offset;
1443 buf->paddr = buf->paddr + offset;
1444 } else
1445 buf->offset = 0;
1446
1447 return 0;
1448 }
1449
1450 static void free_buf(struct device *dev, struct diu_addr *buf, u32 size,
1451 u32 bytes_align)
1452 {
1453 dma_free_coherent(dev, size + bytes_align, buf->vaddr,
1454 buf->paddr - buf->offset);
1455 }
1456
1457 static ssize_t store_monitor(struct device *device,
1458 struct device_attribute *attr, const char *buf, size_t count)
1459 {
1460 enum fsl_diu_monitor_port old_monitor_port;
1461 struct fsl_diu_data *machine_data =
1462 container_of(attr, struct fsl_diu_data, dev_attr);
1463
1464 old_monitor_port = machine_data->monitor_port;
1465 machine_data->monitor_port = fsl_diu_name_to_port(buf);
1466
1467 if (old_monitor_port != machine_data->monitor_port) {
1468 /* All AOIs need adjust pixel format
1469 * fsl_diu_set_par only change the pixsel format here
1470 * unlikely to fail. */
1471 fsl_diu_set_par(machine_data->fsl_diu_info[0]);
1472 fsl_diu_set_par(machine_data->fsl_diu_info[1]);
1473 fsl_diu_set_par(machine_data->fsl_diu_info[2]);
1474 fsl_diu_set_par(machine_data->fsl_diu_info[3]);
1475 fsl_diu_set_par(machine_data->fsl_diu_info[4]);
1476 }
1477 return count;
1478 }
1479
1480 static ssize_t show_monitor(struct device *device,
1481 struct device_attribute *attr, char *buf)
1482 {
1483 struct fsl_diu_data *machine_data =
1484 container_of(attr, struct fsl_diu_data, dev_attr);
1485
1486 switch (machine_data->monitor_port) {
1487 case FSL_DIU_PORT_DVI:
1488 return sprintf(buf, "DVI\n");
1489 case FSL_DIU_PORT_LVDS:
1490 return sprintf(buf, "Single-link LVDS\n");
1491 case FSL_DIU_PORT_DLVDS:
1492 return sprintf(buf, "Dual-link LVDS\n");
1493 }
1494
1495 return 0;
1496 }
1497
1498 static int __devinit fsl_diu_probe(struct platform_device *pdev)
1499 {
1500 struct device_node *np = pdev->dev.of_node;
1501 struct mfb_info *mfbi;
1502 phys_addr_t dummy_ad_addr = 0;
1503 int ret, i, error = 0;
1504 struct fsl_diu_data *machine_data;
1505 int diu_mode;
1506
1507 machine_data = kzalloc(sizeof(struct fsl_diu_data), GFP_KERNEL);
1508 if (!machine_data)
1509 return -ENOMEM;
1510
1511 spin_lock_init(&machine_data->reg_lock);
1512
1513 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
1514 machine_data->fsl_diu_info[i] =
1515 framebuffer_alloc(sizeof(struct mfb_info), &pdev->dev);
1516 if (!machine_data->fsl_diu_info[i]) {
1517 dev_err(&pdev->dev, "cannot allocate memory\n");
1518 ret = -ENOMEM;
1519 goto error2;
1520 }
1521 mfbi = machine_data->fsl_diu_info[i]->par;
1522 memcpy(mfbi, &mfb_template[i], sizeof(struct mfb_info));
1523 mfbi->parent = machine_data;
1524
1525 if (mfbi->index == PLANE0) {
1526 const u8 *prop;
1527 int len;
1528
1529 /* Get EDID */
1530 prop = of_get_property(np, "edid", &len);
1531 if (prop && len == EDID_LENGTH)
1532 mfbi->edid_data = kmemdup(prop, EDID_LENGTH,
1533 GFP_KERNEL);
1534 }
1535 }
1536
1537 machine_data->diu_reg = of_iomap(np, 0);
1538 if (!machine_data->diu_reg) {
1539 dev_err(&pdev->dev, "cannot map DIU registers\n");
1540 ret = -EFAULT;
1541 goto error2;
1542 }
1543
1544 diu_mode = in_be32(&machine_data->diu_reg->diu_mode);
1545 if (diu_mode == MFB_MODE0)
1546 out_be32(&machine_data->diu_reg->diu_mode, 0); /* disable DIU */
1547
1548 /* Get the IRQ of the DIU */
1549 machine_data->irq = irq_of_parse_and_map(np, 0);
1550
1551 if (!machine_data->irq) {
1552 dev_err(&pdev->dev, "could not get DIU IRQ\n");
1553 ret = -EINVAL;
1554 goto error;
1555 }
1556 machine_data->monitor_port = monitor_port;
1557
1558 /* Area descriptor memory pool aligns to 64-bit boundary */
1559 if (allocate_buf(&pdev->dev, &machine_data->ad,
1560 sizeof(struct diu_ad) * FSL_AOI_NUM, 8))
1561 return -ENOMEM;
1562
1563 /* Get memory for Gamma Table - 32-byte aligned memory */
1564 if (allocate_buf(&pdev->dev, &machine_data->gamma, 768, 32)) {
1565 ret = -ENOMEM;
1566 goto error;
1567 }
1568
1569 /* For performance, cursor bitmap buffer aligns to 32-byte boundary */
1570 if (allocate_buf(&pdev->dev, &machine_data->cursor,
1571 MAX_CURS * MAX_CURS * 2, 32)) {
1572 ret = -ENOMEM;
1573 goto error;
1574 }
1575
1576 i = ARRAY_SIZE(machine_data->fsl_diu_info);
1577 machine_data->dummy_ad = (struct diu_ad *)((u32)machine_data->ad.vaddr +
1578 machine_data->ad.offset) + i;
1579 machine_data->dummy_ad->paddr = machine_data->ad.paddr +
1580 i * sizeof(struct diu_ad);
1581 machine_data->dummy_aoi_virt = fsl_diu_alloc(64, &dummy_ad_addr);
1582 if (!machine_data->dummy_aoi_virt) {
1583 ret = -ENOMEM;
1584 goto error;
1585 }
1586 machine_data->dummy_ad->addr = cpu_to_le32(dummy_ad_addr);
1587 machine_data->dummy_ad->pix_fmt = 0x88882317;
1588 machine_data->dummy_ad->src_size_g_alpha = cpu_to_le32((4 << 12) | 4);
1589 machine_data->dummy_ad->aoi_size = cpu_to_le32((4 << 16) | 2);
1590 machine_data->dummy_ad->offset_xyi = 0;
1591 machine_data->dummy_ad->offset_xyd = 0;
1592 machine_data->dummy_ad->next_ad = 0;
1593
1594 /*
1595 * Let DIU display splash screen if it was pre-initialized
1596 * by the bootloader, set dummy area descriptor otherwise.
1597 */
1598 if (diu_mode == MFB_MODE0)
1599 out_be32(&machine_data->diu_reg->desc[0],
1600 machine_data->dummy_ad->paddr);
1601
1602 out_be32(&machine_data->diu_reg->desc[1], machine_data->dummy_ad->paddr);
1603 out_be32(&machine_data->diu_reg->desc[2], machine_data->dummy_ad->paddr);
1604
1605 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++) {
1606 machine_data->fsl_diu_info[i]->fix.smem_start = 0;
1607 mfbi = machine_data->fsl_diu_info[i]->par;
1608 mfbi->ad = (struct diu_ad *)((u32)machine_data->ad.vaddr
1609 + machine_data->ad.offset) + i;
1610 mfbi->ad->paddr =
1611 machine_data->ad.paddr + i * sizeof(struct diu_ad);
1612 ret = install_fb(machine_data->fsl_diu_info[i]);
1613 if (ret) {
1614 dev_err(&pdev->dev, "could not register fb %d\n", i);
1615 goto error;
1616 }
1617 }
1618
1619 if (request_irq_local(machine_data)) {
1620 dev_err(&pdev->dev, "could not claim irq\n");
1621 goto error;
1622 }
1623
1624 sysfs_attr_init(&machine_data->dev_attr.attr);
1625 machine_data->dev_attr.attr.name = "monitor";
1626 machine_data->dev_attr.attr.mode = S_IRUGO|S_IWUSR;
1627 machine_data->dev_attr.show = show_monitor;
1628 machine_data->dev_attr.store = store_monitor;
1629 error = device_create_file(machine_data->fsl_diu_info[0]->dev,
1630 &machine_data->dev_attr);
1631 if (error) {
1632 dev_err(&pdev->dev, "could not create sysfs file %s\n",
1633 machine_data->dev_attr.attr.name);
1634 }
1635
1636 dev_set_drvdata(&pdev->dev, machine_data);
1637 return 0;
1638
1639 error:
1640 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
1641 uninstall_fb(machine_data->fsl_diu_info[i]);
1642
1643 if (machine_data->ad.vaddr)
1644 free_buf(&pdev->dev, &machine_data->ad,
1645 sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
1646 if (machine_data->gamma.vaddr)
1647 free_buf(&pdev->dev, &machine_data->gamma, 768, 32);
1648 if (machine_data->cursor.vaddr)
1649 free_buf(&pdev->dev, &machine_data->cursor,
1650 MAX_CURS * MAX_CURS * 2, 32);
1651 if (machine_data->dummy_aoi_virt)
1652 fsl_diu_free(machine_data->dummy_aoi_virt, 64);
1653 iounmap(machine_data->diu_reg);
1654
1655 error2:
1656 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
1657 if (machine_data->fsl_diu_info[i])
1658 framebuffer_release(machine_data->fsl_diu_info[i]);
1659 kfree(machine_data);
1660
1661 return ret;
1662 }
1663
1664 static int fsl_diu_remove(struct platform_device *pdev)
1665 {
1666 struct fsl_diu_data *machine_data;
1667 int i;
1668
1669 machine_data = dev_get_drvdata(&pdev->dev);
1670 disable_lcdc(machine_data->fsl_diu_info[0]);
1671 free_irq_local(machine_data);
1672 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
1673 uninstall_fb(machine_data->fsl_diu_info[i]);
1674 if (machine_data->ad.vaddr)
1675 free_buf(&pdev->dev, &machine_data->ad,
1676 sizeof(struct diu_ad) * FSL_AOI_NUM, 8);
1677 if (machine_data->gamma.vaddr)
1678 free_buf(&pdev->dev, &machine_data->gamma, 768, 32);
1679 if (machine_data->cursor.vaddr)
1680 free_buf(&pdev->dev, &machine_data->cursor,
1681 MAX_CURS * MAX_CURS * 2, 32);
1682 if (machine_data->dummy_aoi_virt)
1683 fsl_diu_free(machine_data->dummy_aoi_virt, 64);
1684 iounmap(machine_data->diu_reg);
1685 for (i = 0; i < ARRAY_SIZE(machine_data->fsl_diu_info); i++)
1686 if (machine_data->fsl_diu_info[i])
1687 framebuffer_release(machine_data->fsl_diu_info[i]);
1688 kfree(machine_data);
1689
1690 return 0;
1691 }
1692
1693 #ifndef MODULE
1694 static int __init fsl_diu_setup(char *options)
1695 {
1696 char *opt;
1697 unsigned long val;
1698
1699 if (!options || !*options)
1700 return 0;
1701
1702 while ((opt = strsep(&options, ",")) != NULL) {
1703 if (!*opt)
1704 continue;
1705 if (!strncmp(opt, "monitor=", 8)) {
1706 monitor_port = fsl_diu_name_to_port(opt + 8);
1707 } else if (!strncmp(opt, "bpp=", 4)) {
1708 if (!strict_strtoul(opt + 4, 10, &val))
1709 default_bpp = val;
1710 } else
1711 fb_mode = opt;
1712 }
1713
1714 return 0;
1715 }
1716 #endif
1717
1718 static struct of_device_id fsl_diu_match[] = {
1719 #ifdef CONFIG_PPC_MPC512x
1720 {
1721 .compatible = "fsl,mpc5121-diu",
1722 },
1723 #endif
1724 {
1725 .compatible = "fsl,diu",
1726 },
1727 {}
1728 };
1729 MODULE_DEVICE_TABLE(of, fsl_diu_match);
1730
1731 static struct platform_driver fsl_diu_driver = {
1732 .driver = {
1733 .name = "fsl-diu-fb",
1734 .owner = THIS_MODULE,
1735 .of_match_table = fsl_diu_match,
1736 },
1737 .probe = fsl_diu_probe,
1738 .remove = fsl_diu_remove,
1739 .suspend = fsl_diu_suspend,
1740 .resume = fsl_diu_resume,
1741 };
1742
1743 static int __init fsl_diu_init(void)
1744 {
1745 #ifdef CONFIG_NOT_COHERENT_CACHE
1746 struct device_node *np;
1747 const u32 *prop;
1748 #endif
1749 int ret;
1750 #ifndef MODULE
1751 char *option;
1752
1753 /*
1754 * For kernel boot options (in 'video=xxxfb:<options>' format)
1755 */
1756 if (fb_get_options("fslfb", &option))
1757 return -ENODEV;
1758 fsl_diu_setup(option);
1759 #else
1760 monitor_port = fsl_diu_name_to_port(monitor_string);
1761 #endif
1762 pr_info("Freescale Display Interface Unit (DIU) framebuffer driver\n");
1763
1764 #ifdef CONFIG_NOT_COHERENT_CACHE
1765 np = of_find_node_by_type(NULL, "cpu");
1766 if (!np) {
1767 pr_err("fsl-diu-fb: can't find 'cpu' device node\n");
1768 return -ENODEV;
1769 }
1770
1771 prop = of_get_property(np, "d-cache-size", NULL);
1772 if (prop == NULL) {
1773 pr_err("fsl-diu-fb: missing 'd-cache-size' property' "
1774 "in 'cpu' node\n");
1775 of_node_put(np);
1776 return -ENODEV;
1777 }
1778
1779 /*
1780 * Freescale PLRU requires 13/8 times the cache size to do a proper
1781 * displacement flush
1782 */
1783 coherence_data_size = be32_to_cpup(prop) * 13;
1784 coherence_data_size /= 8;
1785
1786 prop = of_get_property(np, "d-cache-line-size", NULL);
1787 if (prop == NULL) {
1788 pr_err("fsl-diu-fb: missing 'd-cache-line-size' property' "
1789 "in 'cpu' node\n");
1790 of_node_put(np);
1791 return -ENODEV;
1792 }
1793 d_cache_line_size = be32_to_cpup(prop);
1794
1795 of_node_put(np);
1796 coherence_data = vmalloc(coherence_data_size);
1797 if (!coherence_data)
1798 return -ENOMEM;
1799 #endif
1800
1801 ret = platform_driver_register(&fsl_diu_driver);
1802 if (ret) {
1803 pr_err("fsl-diu-fb: failed to register platform driver\n");
1804 #if defined(CONFIG_NOT_COHERENT_CACHE)
1805 vfree(coherence_data);
1806 #endif
1807 }
1808 return ret;
1809 }
1810
1811 static void __exit fsl_diu_exit(void)
1812 {
1813 platform_driver_unregister(&fsl_diu_driver);
1814 #if defined(CONFIG_NOT_COHERENT_CACHE)
1815 vfree(coherence_data);
1816 #endif
1817 }
1818
1819 module_init(fsl_diu_init);
1820 module_exit(fsl_diu_exit);
1821
1822 MODULE_AUTHOR("York Sun <yorksun@freescale.com>");
1823 MODULE_DESCRIPTION("Freescale DIU framebuffer driver");
1824 MODULE_LICENSE("GPL");
1825
1826 module_param_named(mode, fb_mode, charp, 0);
1827 MODULE_PARM_DESC(mode,
1828 "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
1829 module_param_named(bpp, default_bpp, ulong, 0);
1830 MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified in 'mode'");
1831 module_param_named(monitor, monitor_string, charp, 0);
1832 MODULE_PARM_DESC(monitor, "Specify the monitor port "
1833 "(\"dvi\", \"lvds\", or \"dlvds\") if supported by the platform");
1834
Linux with added FPC-III support