2 * CS4270 ALSA SoC (ASoC) codec driver
4 * Author: Timur Tabi <timur@freescale.com>
6 * Copyright 2007-2009 Freescale Semiconductor, Inc. This file is licensed
7 * under the terms of the GNU General Public License version 2. This
8 * program is licensed "as is" without any warranty of any kind, whether
11 * This is an ASoC device driver for the Cirrus Logic CS4270 codec.
13 * Current features/limitations:
15 * - Software mode is supported. Stand-alone mode is not supported.
16 * - Only I2C is supported, not SPI
17 * - Support for master and slave mode
18 * - The machine driver's 'startup' function must call
19 * cs4270_set_dai_sysclk() with the value of MCLK.
20 * - Only I2S and left-justified modes are supported
21 * - Power management is supported
24 #include <linux/module.h>
25 #include <linux/platform_device.h>
26 #include <linux/slab.h>
27 #include <sound/core.h>
28 #include <sound/soc.h>
29 #include <sound/initval.h>
30 #include <linux/i2c.h>
31 #include <linux/delay.h>
32 #include <linux/regulator/consumer.h>
35 * The codec isn't really big-endian or little-endian, since the I2S
36 * interface requires data to be sent serially with the MSbit first.
37 * However, to support BE and LE I2S devices, we specify both here. That
38 * way, ALSA will always match the bit patterns.
40 #define CS4270_FORMATS (SNDRV_PCM_FMTBIT_S8 | \
41 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
42 SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S18_3BE | \
43 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S20_3BE | \
44 SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S24_3BE | \
45 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S24_BE)
47 /* CS4270 registers addresses */
48 #define CS4270_CHIPID 0x01 /* Chip ID */
49 #define CS4270_PWRCTL 0x02 /* Power Control */
50 #define CS4270_MODE 0x03 /* Mode Control */
51 #define CS4270_FORMAT 0x04 /* Serial Format, ADC/DAC Control */
52 #define CS4270_TRANS 0x05 /* Transition Control */
53 #define CS4270_MUTE 0x06 /* Mute Control */
54 #define CS4270_VOLA 0x07 /* DAC Channel A Volume Control */
55 #define CS4270_VOLB 0x08 /* DAC Channel B Volume Control */
57 #define CS4270_FIRSTREG 0x01
58 #define CS4270_LASTREG 0x08
59 #define CS4270_NUMREGS (CS4270_LASTREG - CS4270_FIRSTREG + 1)
60 #define CS4270_I2C_INCR 0x80
62 /* Bit masks for the CS4270 registers */
63 #define CS4270_CHIPID_ID 0xF0
64 #define CS4270_CHIPID_REV 0x0F
65 #define CS4270_PWRCTL_FREEZE 0x80
66 #define CS4270_PWRCTL_PDN_ADC 0x20
67 #define CS4270_PWRCTL_PDN_DAC 0x02
68 #define CS4270_PWRCTL_PDN 0x01
69 #define CS4270_PWRCTL_PDN_ALL \
70 (CS4270_PWRCTL_PDN_ADC | CS4270_PWRCTL_PDN_DAC | CS4270_PWRCTL_PDN)
71 #define CS4270_MODE_SPEED_MASK 0x30
72 #define CS4270_MODE_1X 0x00
73 #define CS4270_MODE_2X 0x10
74 #define CS4270_MODE_4X 0x20
75 #define CS4270_MODE_SLAVE 0x30
76 #define CS4270_MODE_DIV_MASK 0x0E
77 #define CS4270_MODE_DIV1 0x00
78 #define CS4270_MODE_DIV15 0x02
79 #define CS4270_MODE_DIV2 0x04
80 #define CS4270_MODE_DIV3 0x06
81 #define CS4270_MODE_DIV4 0x08
82 #define CS4270_MODE_POPGUARD 0x01
83 #define CS4270_FORMAT_FREEZE_A 0x80
84 #define CS4270_FORMAT_FREEZE_B 0x40
85 #define CS4270_FORMAT_LOOPBACK 0x20
86 #define CS4270_FORMAT_DAC_MASK 0x18
87 #define CS4270_FORMAT_DAC_LJ 0x00
88 #define CS4270_FORMAT_DAC_I2S 0x08
89 #define CS4270_FORMAT_DAC_RJ16 0x18
90 #define CS4270_FORMAT_DAC_RJ24 0x10
91 #define CS4270_FORMAT_ADC_MASK 0x01
92 #define CS4270_FORMAT_ADC_LJ 0x00
93 #define CS4270_FORMAT_ADC_I2S 0x01
94 #define CS4270_TRANS_ONE_VOL 0x80
95 #define CS4270_TRANS_SOFT 0x40
96 #define CS4270_TRANS_ZERO 0x20
97 #define CS4270_TRANS_INV_ADC_A 0x08
98 #define CS4270_TRANS_INV_ADC_B 0x10
99 #define CS4270_TRANS_INV_DAC_A 0x02
100 #define CS4270_TRANS_INV_DAC_B 0x04
101 #define CS4270_TRANS_DEEMPH 0x01
102 #define CS4270_MUTE_AUTO 0x20
103 #define CS4270_MUTE_ADC_A 0x08
104 #define CS4270_MUTE_ADC_B 0x10
105 #define CS4270_MUTE_POLARITY 0x04
106 #define CS4270_MUTE_DAC_A 0x01
107 #define CS4270_MUTE_DAC_B 0x02
109 /* Power-on default values for the registers
111 * This array contains the power-on default values of the registers, with the
112 * exception of the "CHIPID" register (01h). The lower four bits of that
113 * register contain the hardware revision, so it is treated as volatile.
115 * Also note that on the CS4270, the first readable register is 1, but ASoC
116 * assumes the first register is 0. Therfore, the array must have an entry for
117 * register 0, but we use cs4270_reg_is_readable() to tell ASoC that it can't
120 static const u8 cs4270_default_reg_cache
[CS4270_LASTREG
+ 1] = {
121 0x00, 0x00, 0x00, 0x30, 0x00, 0x60, 0x20, 0x00, 0x00
124 static const char *supply_names
[] = {
128 /* Private data for the CS4270 */
129 struct cs4270_private
{
130 enum snd_soc_control_type control_type
;
132 unsigned int mclk
; /* Input frequency of the MCLK pin */
133 unsigned int mode
; /* The mode (I2S or left-justified) */
134 unsigned int slave_mode
;
135 unsigned int manual_mute
;
137 /* power domain regulators */
138 struct regulator_bulk_data supplies
[ARRAY_SIZE(supply_names
)];
142 * struct cs4270_mode_ratios - clock ratio tables
143 * @ratio: the ratio of MCLK to the sample rate
144 * @speed_mode: the Speed Mode bits to set in the Mode Control register for
146 * @mclk: the Ratio Select bits to set in the Mode Control register for this
149 * The data for this chart is taken from Table 5 of the CS4270 reference
152 * This table is used to determine how to program the Mode Control register.
153 * It is also used by cs4270_set_dai_sysclk() to tell ALSA which sampling
154 * rates the CS4270 currently supports.
156 * @speed_mode is the corresponding bit pattern to be written to the
157 * MODE bits of the Mode Control Register
159 * @mclk is the corresponding bit pattern to be wirten to the MCLK bits of
160 * the Mode Control Register.
162 * In situations where a single ratio is represented by multiple speed
163 * modes, we favor the slowest speed. E.g, for a ratio of 128, we pick
164 * double-speed instead of quad-speed. However, the CS4270 errata states
165 * that divide-By-1.5 can cause failures, so we avoid that mode where
168 * Errata: There is an errata for the CS4270 where divide-by-1.5 does not
169 * work if Vd is 3.3V. If this effects you, select the
170 * CONFIG_SND_SOC_CS4270_VD33_ERRATA Kconfig option, and the driver will
171 * never select any sample rates that require divide-by-1.5.
173 struct cs4270_mode_ratios
{
179 static struct cs4270_mode_ratios cs4270_mode_ratios
[] = {
180 {64, CS4270_MODE_4X
, CS4270_MODE_DIV1
},
181 #ifndef CONFIG_SND_SOC_CS4270_VD33_ERRATA
182 {96, CS4270_MODE_4X
, CS4270_MODE_DIV15
},
184 {128, CS4270_MODE_2X
, CS4270_MODE_DIV1
},
185 {192, CS4270_MODE_4X
, CS4270_MODE_DIV3
},
186 {256, CS4270_MODE_1X
, CS4270_MODE_DIV1
},
187 {384, CS4270_MODE_2X
, CS4270_MODE_DIV3
},
188 {512, CS4270_MODE_1X
, CS4270_MODE_DIV2
},
189 {768, CS4270_MODE_1X
, CS4270_MODE_DIV3
},
190 {1024, CS4270_MODE_1X
, CS4270_MODE_DIV4
}
193 /* The number of MCLK/LRCK ratios supported by the CS4270 */
194 #define NUM_MCLK_RATIOS ARRAY_SIZE(cs4270_mode_ratios)
196 static int cs4270_reg_is_readable(unsigned int reg
)
198 return (reg
>= CS4270_FIRSTREG
) && (reg
<= CS4270_LASTREG
);
201 static int cs4270_reg_is_volatile(unsigned int reg
)
203 /* Unreadable registers are considered volatile */
204 if ((reg
< CS4270_FIRSTREG
) || (reg
> CS4270_LASTREG
))
207 return reg
== CS4270_CHIPID
;
211 * cs4270_set_dai_sysclk - determine the CS4270 samples rates.
212 * @codec_dai: the codec DAI
213 * @clk_id: the clock ID (ignored)
214 * @freq: the MCLK input frequency
215 * @dir: the clock direction (ignored)
217 * This function is used to tell the codec driver what the input MCLK
220 * The value of MCLK is used to determine which sample rates are supported
221 * by the CS4270. The ratio of MCLK / Fs must be equal to one of nine
222 * supported values - 64, 96, 128, 192, 256, 384, 512, 768, and 1024.
224 * This function calculates the nine ratios and determines which ones match
225 * a standard sample rate. If there's a match, then it is added to the list
226 * of supported sample rates.
228 * This function must be called by the machine driver's 'startup' function,
229 * otherwise the list of supported sample rates will not be available in
232 * For setups with variable MCLKs, pass 0 as 'freq' argument. This will cause
233 * theoretically possible sample rates to be enabled. Call it again with a
234 * proper value set one the external clock is set (most probably you would do
235 * that from a machine's driver 'hw_param' hook.
237 static int cs4270_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
238 int clk_id
, unsigned int freq
, int dir
)
240 struct snd_soc_codec
*codec
= codec_dai
->codec
;
241 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
248 * cs4270_set_dai_fmt - configure the codec for the selected audio format
249 * @codec_dai: the codec DAI
250 * @format: a SND_SOC_DAIFMT_x value indicating the data format
252 * This function takes a bitmask of SND_SOC_DAIFMT_x bits and programs the
255 * Currently, this function only supports SND_SOC_DAIFMT_I2S and
256 * SND_SOC_DAIFMT_LEFT_J. The CS4270 codec also supports right-justified
257 * data for playback only, but ASoC currently does not support different
258 * formats for playback vs. record.
260 static int cs4270_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
263 struct snd_soc_codec
*codec
= codec_dai
->codec
;
264 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
268 switch (format
& SND_SOC_DAIFMT_FORMAT_MASK
) {
269 case SND_SOC_DAIFMT_I2S
:
270 case SND_SOC_DAIFMT_LEFT_J
:
271 cs4270
->mode
= format
& SND_SOC_DAIFMT_FORMAT_MASK
;
274 dev_err(codec
->dev
, "invalid dai format\n");
278 /* set master/slave audio interface */
279 switch (format
& SND_SOC_DAIFMT_MASTER_MASK
) {
280 case SND_SOC_DAIFMT_CBS_CFS
:
281 cs4270
->slave_mode
= 1;
283 case SND_SOC_DAIFMT_CBM_CFM
:
284 cs4270
->slave_mode
= 0;
287 /* all other modes are unsupported by the hardware */
295 * cs4270_hw_params - program the CS4270 with the given hardware parameters.
296 * @substream: the audio stream
297 * @params: the hardware parameters to set
298 * @dai: the SOC DAI (ignored)
300 * This function programs the hardware with the values provided.
301 * Specifically, the sample rate and the data format.
303 * The .ops functions are used to provide board-specific data, like input
304 * frequencies, to this driver. This function takes that information,
305 * combines it with the hardware parameters provided, and programs the
306 * hardware accordingly.
308 static int cs4270_hw_params(struct snd_pcm_substream
*substream
,
309 struct snd_pcm_hw_params
*params
,
310 struct snd_soc_dai
*dai
)
312 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
313 struct snd_soc_codec
*codec
= rtd
->codec
;
314 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
321 /* Figure out which MCLK/LRCK ratio to use */
323 rate
= params_rate(params
); /* Sampling rate, in Hz */
324 ratio
= cs4270
->mclk
/ rate
; /* MCLK/LRCK ratio */
326 for (i
= 0; i
< NUM_MCLK_RATIOS
; i
++) {
327 if (cs4270_mode_ratios
[i
].ratio
== ratio
)
331 if (i
== NUM_MCLK_RATIOS
) {
332 /* We did not find a matching ratio */
333 dev_err(codec
->dev
, "could not find matching ratio\n");
337 /* Set the sample rate */
339 reg
= snd_soc_read(codec
, CS4270_MODE
);
340 reg
&= ~(CS4270_MODE_SPEED_MASK
| CS4270_MODE_DIV_MASK
);
341 reg
|= cs4270_mode_ratios
[i
].mclk
;
343 if (cs4270
->slave_mode
)
344 reg
|= CS4270_MODE_SLAVE
;
346 reg
|= cs4270_mode_ratios
[i
].speed_mode
;
348 ret
= snd_soc_write(codec
, CS4270_MODE
, reg
);
350 dev_err(codec
->dev
, "i2c write failed\n");
354 /* Set the DAI format */
356 reg
= snd_soc_read(codec
, CS4270_FORMAT
);
357 reg
&= ~(CS4270_FORMAT_DAC_MASK
| CS4270_FORMAT_ADC_MASK
);
359 switch (cs4270
->mode
) {
360 case SND_SOC_DAIFMT_I2S
:
361 reg
|= CS4270_FORMAT_DAC_I2S
| CS4270_FORMAT_ADC_I2S
;
363 case SND_SOC_DAIFMT_LEFT_J
:
364 reg
|= CS4270_FORMAT_DAC_LJ
| CS4270_FORMAT_ADC_LJ
;
367 dev_err(codec
->dev
, "unknown dai format\n");
371 ret
= snd_soc_write(codec
, CS4270_FORMAT
, reg
);
373 dev_err(codec
->dev
, "i2c write failed\n");
381 * cs4270_dai_mute - enable/disable the CS4270 external mute
383 * @mute: 0 = disable mute, 1 = enable mute
385 * This function toggles the mute bits in the MUTE register. The CS4270's
386 * mute capability is intended for external muting circuitry, so if the
387 * board does not have the MUTEA or MUTEB pins connected to such circuitry,
388 * then this function will do nothing.
390 static int cs4270_dai_mute(struct snd_soc_dai
*dai
, int mute
)
392 struct snd_soc_codec
*codec
= dai
->codec
;
393 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
396 reg6
= snd_soc_read(codec
, CS4270_MUTE
);
399 reg6
|= CS4270_MUTE_DAC_A
| CS4270_MUTE_DAC_B
;
401 reg6
&= ~(CS4270_MUTE_DAC_A
| CS4270_MUTE_DAC_B
);
402 reg6
|= cs4270
->manual_mute
;
405 return snd_soc_write(codec
, CS4270_MUTE
, reg6
);
409 * cs4270_soc_put_mute - put callback for the 'Master Playback switch'
411 * @kcontrol: mixer control
412 * @ucontrol: control element information
414 * This function basically passes the arguments on to the generic
415 * snd_soc_put_volsw() function and saves the mute information in
416 * our private data structure. This is because we want to prevent
417 * cs4270_dai_mute() neglecting the user's decision to manually
418 * mute the codec's output.
420 * Returns 0 for success.
422 static int cs4270_soc_put_mute(struct snd_kcontrol
*kcontrol
,
423 struct snd_ctl_elem_value
*ucontrol
)
425 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
426 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
427 int left
= !ucontrol
->value
.integer
.value
[0];
428 int right
= !ucontrol
->value
.integer
.value
[1];
430 cs4270
->manual_mute
= (left
? CS4270_MUTE_DAC_A
: 0) |
431 (right
? CS4270_MUTE_DAC_B
: 0);
433 return snd_soc_put_volsw(kcontrol
, ucontrol
);
436 /* A list of non-DAPM controls that the CS4270 supports */
437 static const struct snd_kcontrol_new cs4270_snd_controls
[] = {
438 SOC_DOUBLE_R("Master Playback Volume",
439 CS4270_VOLA
, CS4270_VOLB
, 0, 0xFF, 1),
440 SOC_SINGLE("Digital Sidetone Switch", CS4270_FORMAT
, 5, 1, 0),
441 SOC_SINGLE("Soft Ramp Switch", CS4270_TRANS
, 6, 1, 0),
442 SOC_SINGLE("Zero Cross Switch", CS4270_TRANS
, 5, 1, 0),
443 SOC_SINGLE("De-emphasis filter", CS4270_TRANS
, 0, 1, 0),
444 SOC_SINGLE("Popguard Switch", CS4270_MODE
, 0, 1, 1),
445 SOC_SINGLE("Auto-Mute Switch", CS4270_MUTE
, 5, 1, 0),
446 SOC_DOUBLE("Master Capture Switch", CS4270_MUTE
, 3, 4, 1, 1),
447 SOC_DOUBLE_EXT("Master Playback Switch", CS4270_MUTE
, 0, 1, 1, 1,
448 snd_soc_get_volsw
, cs4270_soc_put_mute
),
451 static struct snd_soc_dai_ops cs4270_dai_ops
= {
452 .hw_params
= cs4270_hw_params
,
453 .set_sysclk
= cs4270_set_dai_sysclk
,
454 .set_fmt
= cs4270_set_dai_fmt
,
455 .digital_mute
= cs4270_dai_mute
,
458 static struct snd_soc_dai_driver cs4270_dai
= {
459 .name
= "cs4270-hifi",
461 .stream_name
= "Playback",
464 .rates
= SNDRV_PCM_RATE_CONTINUOUS
,
467 .formats
= CS4270_FORMATS
,
470 .stream_name
= "Capture",
473 .rates
= SNDRV_PCM_RATE_CONTINUOUS
,
476 .formats
= CS4270_FORMATS
,
478 .ops
= &cs4270_dai_ops
,
482 * cs4270_probe - ASoC probe function
483 * @pdev: platform device
485 * This function is called when ASoC has all the pieces it needs to
486 * instantiate a sound driver.
488 static int cs4270_probe(struct snd_soc_codec
*codec
)
490 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
493 codec
->control_data
= cs4270
->control_data
;
495 /* Tell ASoC what kind of I/O to use to read the registers. ASoC will
496 * then do the I2C transactions itself.
498 ret
= snd_soc_codec_set_cache_io(codec
, 8, 8, cs4270
->control_type
);
500 dev_err(codec
->dev
, "failed to set cache I/O (ret=%i)\n", ret
);
504 /* Disable auto-mute. This feature appears to be buggy. In some
505 * situations, auto-mute will not deactivate when it should, so we want
506 * this feature disabled by default. An application (e.g. alsactl) can
507 * re-enabled it by using the controls.
509 ret
= snd_soc_update_bits(codec
, CS4270_MUTE
, CS4270_MUTE_AUTO
, 0);
511 dev_err(codec
->dev
, "i2c write failed\n");
515 /* Disable automatic volume control. The hardware enables, and it
516 * causes volume change commands to be delayed, sometimes until after
517 * playback has started. An application (e.g. alsactl) can
518 * re-enabled it by using the controls.
520 ret
= snd_soc_update_bits(codec
, CS4270_TRANS
,
521 CS4270_TRANS_SOFT
| CS4270_TRANS_ZERO
, 0);
523 dev_err(codec
->dev
, "i2c write failed\n");
527 /* Add the non-DAPM controls */
528 ret
= snd_soc_add_controls(codec
, cs4270_snd_controls
,
529 ARRAY_SIZE(cs4270_snd_controls
));
531 dev_err(codec
->dev
, "failed to add controls\n");
535 /* get the power supply regulators */
536 for (i
= 0; i
< ARRAY_SIZE(supply_names
); i
++)
537 cs4270
->supplies
[i
].supply
= supply_names
[i
];
539 ret
= regulator_bulk_get(codec
->dev
, ARRAY_SIZE(cs4270
->supplies
),
544 ret
= regulator_bulk_enable(ARRAY_SIZE(cs4270
->supplies
),
547 goto error_free_regulators
;
551 error_free_regulators
:
552 regulator_bulk_free(ARRAY_SIZE(cs4270
->supplies
),
559 * cs4270_remove - ASoC remove function
560 * @pdev: platform device
562 * This function is the counterpart to cs4270_probe().
564 static int cs4270_remove(struct snd_soc_codec
*codec
)
566 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
568 regulator_bulk_disable(ARRAY_SIZE(cs4270
->supplies
), cs4270
->supplies
);
569 regulator_bulk_free(ARRAY_SIZE(cs4270
->supplies
), cs4270
->supplies
);
576 /* This suspend/resume implementation can handle both - a simple standby
577 * where the codec remains powered, and a full suspend, where the voltage
578 * domain the codec is connected to is teared down and/or any other hardware
579 * reset condition is asserted.
581 * The codec's own power saving features are enabled in the suspend callback,
582 * and all registers are written back to the hardware when resuming.
585 static int cs4270_soc_suspend(struct snd_soc_codec
*codec
, pm_message_t mesg
)
587 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
590 reg
= snd_soc_read(codec
, CS4270_PWRCTL
) | CS4270_PWRCTL_PDN_ALL
;
594 ret
= snd_soc_write(codec
, CS4270_PWRCTL
, reg
);
598 regulator_bulk_disable(ARRAY_SIZE(cs4270
->supplies
),
604 static int cs4270_soc_resume(struct snd_soc_codec
*codec
)
606 struct cs4270_private
*cs4270
= snd_soc_codec_get_drvdata(codec
);
607 struct i2c_client
*i2c_client
= codec
->control_data
;
610 regulator_bulk_enable(ARRAY_SIZE(cs4270
->supplies
),
613 /* In case the device was put to hard reset during sleep, we need to
614 * wait 500ns here before any I2C communication. */
617 /* first restore the entire register cache ... */
618 for (reg
= CS4270_FIRSTREG
; reg
<= CS4270_LASTREG
; reg
++) {
619 u8 val
= snd_soc_read(codec
, reg
);
621 if (i2c_smbus_write_byte_data(i2c_client
, reg
, val
)) {
622 dev_err(codec
->dev
, "i2c write failed\n");
627 /* ... then disable the power-down bits */
628 reg
= snd_soc_read(codec
, CS4270_PWRCTL
);
629 reg
&= ~CS4270_PWRCTL_PDN_ALL
;
631 return snd_soc_write(codec
, CS4270_PWRCTL
, reg
);
634 #define cs4270_soc_suspend NULL
635 #define cs4270_soc_resume NULL
636 #endif /* CONFIG_PM */
639 * ASoC codec device structure
641 * Assign this variable to the codec_dev field of the machine driver's
642 * snd_soc_device structure.
644 static const struct snd_soc_codec_driver soc_codec_device_cs4270
= {
645 .probe
= cs4270_probe
,
646 .remove
= cs4270_remove
,
647 .suspend
= cs4270_soc_suspend
,
648 .resume
= cs4270_soc_resume
,
649 .volatile_register
= cs4270_reg_is_volatile
,
650 .readable_register
= cs4270_reg_is_readable
,
651 .reg_cache_size
= CS4270_LASTREG
+ 1,
652 .reg_word_size
= sizeof(u8
),
653 .reg_cache_default
= cs4270_default_reg_cache
,
657 * cs4270_i2c_probe - initialize the I2C interface of the CS4270
658 * @i2c_client: the I2C client object
659 * @id: the I2C device ID (ignored)
661 * This function is called whenever the I2C subsystem finds a device that
662 * matches the device ID given via a prior call to i2c_add_driver().
664 static int cs4270_i2c_probe(struct i2c_client
*i2c_client
,
665 const struct i2c_device_id
*id
)
667 struct cs4270_private
*cs4270
;
670 /* Verify that we have a CS4270 */
672 ret
= i2c_smbus_read_byte_data(i2c_client
, CS4270_CHIPID
);
674 dev_err(&i2c_client
->dev
, "failed to read i2c at addr %X\n",
678 /* The top four bits of the chip ID should be 1100. */
679 if ((ret
& 0xF0) != 0xC0) {
680 dev_err(&i2c_client
->dev
, "device at addr %X is not a CS4270\n",
685 dev_info(&i2c_client
->dev
, "found device at i2c address %X\n",
687 dev_info(&i2c_client
->dev
, "hardware revision %X\n", ret
& 0xF);
689 cs4270
= kzalloc(sizeof(struct cs4270_private
), GFP_KERNEL
);
691 dev_err(&i2c_client
->dev
, "could not allocate codec\n");
695 i2c_set_clientdata(i2c_client
, cs4270
);
696 cs4270
->control_data
= i2c_client
;
697 cs4270
->control_type
= SND_SOC_I2C
;
699 ret
= snd_soc_register_codec(&i2c_client
->dev
,
700 &soc_codec_device_cs4270
, &cs4270_dai
, 1);
707 * cs4270_i2c_remove - remove an I2C device
708 * @i2c_client: the I2C client object
710 * This function is the counterpart to cs4270_i2c_probe().
712 static int cs4270_i2c_remove(struct i2c_client
*i2c_client
)
714 snd_soc_unregister_codec(&i2c_client
->dev
);
715 kfree(i2c_get_clientdata(i2c_client
));
720 * cs4270_id - I2C device IDs supported by this driver
722 static struct i2c_device_id cs4270_id
[] = {
726 MODULE_DEVICE_TABLE(i2c
, cs4270_id
);
729 * cs4270_i2c_driver - I2C device identification
731 * This structure tells the I2C subsystem how to identify and support a
732 * given I2C device type.
734 static struct i2c_driver cs4270_i2c_driver
= {
736 .name
= "cs4270-codec",
737 .owner
= THIS_MODULE
,
739 .id_table
= cs4270_id
,
740 .probe
= cs4270_i2c_probe
,
741 .remove
= cs4270_i2c_remove
,
744 static int __init
cs4270_init(void)
746 pr_info("Cirrus Logic CS4270 ALSA SoC Codec Driver\n");
748 return i2c_add_driver(&cs4270_i2c_driver
);
750 module_init(cs4270_init
);
752 static void __exit
cs4270_exit(void)
754 i2c_del_driver(&cs4270_i2c_driver
);
756 module_exit(cs4270_exit
);
758 MODULE_AUTHOR("Timur Tabi <timur@freescale.com>");
759 MODULE_DESCRIPTION("Cirrus Logic CS4270 ALSA SoC Codec Driver");
760 MODULE_LICENSE("GPL");