drivers/clk/clk-fixed-rate.c

   1 /*
   2  * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
   3  * Copyright (C) 2011-2012 Mike Turquette, Linaro Ltd <mturquette@linaro.org>
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  *
   9  * Fixed rate clock implementation
  10  */
  11
  12 #include <linux/clk-provider.h>
  13 #include <linux/module.h>
  14 #include <linux/slab.h>
  15 #include <linux/io.h>
  16 #include <linux/err.h>
  17 #include <linux/of.h>
  18 #include <linux/platform_device.h>
  19
  20 /*
  21  * DOC: basic fixed-rate clock that cannot gate
  22  *
  23  * Traits of this clock:
  24  * prepare - clk_(un)prepare only ensures parents are prepared
  25  * enable - clk_enable only ensures parents are enabled
  26  * rate - rate is always a fixed value.  No clk_set_rate support
  27  * parent - fixed parent.  No clk_set_parent support
  28  */
  29
  30 static unsigned long clk_fixed_rate_recalc_rate(struct clk_hw *hw,
  31                 unsigned long parent_rate)
  32 {
  33         return to_clk_fixed_rate(hw)->fixed_rate;
  34 }
  35
  36 static unsigned long clk_fixed_rate_recalc_accuracy(struct clk_hw *hw,
  37                 unsigned long parent_accuracy)
  38 {
  39         return to_clk_fixed_rate(hw)->fixed_accuracy;
  40 }
  41
  42 const struct clk_ops clk_fixed_rate_ops = {
  43         .recalc_rate = clk_fixed_rate_recalc_rate,
  44         .recalc_accuracy = clk_fixed_rate_recalc_accuracy,
  45 };
  46 EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
  47
  48 /**
  49  * clk_hw_register_fixed_rate_with_accuracy - register fixed-rate clock with
  50  * the clock framework
  51  * @dev: device that is registering this clock
  52  * @name: name of this clock
  53  * @parent_name: name of clock's parent
  54  * @flags: framework-specific flags
  55  * @fixed_rate: non-adjustable clock rate
  56  * @fixed_accuracy: non-adjustable clock rate
  57  */
  58 struct clk_hw *clk_hw_register_fixed_rate_with_accuracy(struct device *dev,
  59                 const char *name, const char *parent_name, unsigned long flags,
  60                 unsigned long fixed_rate, unsigned long fixed_accuracy)
  61 {
  62         struct clk_fixed_rate *fixed;
  63         struct clk_hw *hw;
  64         struct clk_init_data init;
  65         int ret;
  66
  67         /* allocate fixed-rate clock */
  68         fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
  69         if (!fixed)
  70                 return ERR_PTR(-ENOMEM);
  71
  72         init.name = name;
  73         init.ops = &clk_fixed_rate_ops;
  74         init.flags = flags | CLK_IS_BASIC;
  75         init.parent_names = (parent_name ? &parent_name: NULL);
  76         init.num_parents = (parent_name ? 1 : 0);
  77
  78         /* struct clk_fixed_rate assignments */
  79         fixed->fixed_rate = fixed_rate;
  80         fixed->fixed_accuracy = fixed_accuracy;
  81         fixed->hw.init = &init;
  82
  83         /* register the clock */
  84         hw = &fixed->hw;
  85         ret = clk_hw_register(dev, hw);
  86         if (ret) {
  87                 kfree(fixed);
  88                 hw = ERR_PTR(ret);
  89         }
  90
  91         return hw;
  92 }
  93 EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate_with_accuracy);
  94
  95 struct clk *clk_register_fixed_rate_with_accuracy(struct device *dev,
  96                 const char *name, const char *parent_name, unsigned long flags,
  97                 unsigned long fixed_rate, unsigned long fixed_accuracy)
  98 {
  99         struct clk_hw *hw;
 100
 101         hw = clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,
 102                         flags, fixed_rate, fixed_accuracy);
 103         if (IS_ERR(hw))
 104                 return ERR_CAST(hw);
 105         return hw->clk;
 106 }
 107 EXPORT_SYMBOL_GPL(clk_register_fixed_rate_with_accuracy);
 108
 109 /**
 110  * clk_hw_register_fixed_rate - register fixed-rate clock with the clock
 111  * framework
 112  * @dev: device that is registering this clock
 113  * @name: name of this clock
 114  * @parent_name: name of clock's parent
 115  * @flags: framework-specific flags
 116  * @fixed_rate: non-adjustable clock rate
 117  */
 118 struct clk_hw *clk_hw_register_fixed_rate(struct device *dev, const char *name,
 119                 const char *parent_name, unsigned long flags,
 120                 unsigned long fixed_rate)
 121 {
 122         return clk_hw_register_fixed_rate_with_accuracy(dev, name, parent_name,
 123                                                      flags, fixed_rate, 0);
 124 }
 125 EXPORT_SYMBOL_GPL(clk_hw_register_fixed_rate);
 126
 127 struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
 128                 const char *parent_name, unsigned long flags,
 129                 unsigned long fixed_rate)
 130 {
 131         return clk_register_fixed_rate_with_accuracy(dev, name, parent_name,
 132                                                      flags, fixed_rate, 0);
 133 }
 134 EXPORT_SYMBOL_GPL(clk_register_fixed_rate);
 135
 136 void clk_unregister_fixed_rate(struct clk *clk)
 137 {
 138         struct clk_hw *hw;
 139
 140         hw = __clk_get_hw(clk);
 141         if (!hw)
 142                 return;
 143
 144         clk_unregister(clk);
 145         kfree(to_clk_fixed_rate(hw));
 146 }
 147 EXPORT_SYMBOL_GPL(clk_unregister_fixed_rate);
 148
 149 void clk_hw_unregister_fixed_rate(struct clk_hw *hw)
 150 {
 151         struct clk_fixed_rate *fixed;
 152
 153         fixed = to_clk_fixed_rate(hw);
 154
 155         clk_hw_unregister(hw);
 156         kfree(fixed);
 157 }
 158 EXPORT_SYMBOL_GPL(clk_hw_unregister_fixed_rate);
 159
 160 #ifdef CONFIG_OF
 161 static struct clk *_of_fixed_clk_setup(struct device_node *node)
 162 {
 163         struct clk *clk;
 164         const char *clk_name = node->name;
 165         u32 rate;
 166         u32 accuracy = 0;
 167         int ret;
 168
 169         if (of_property_read_u32(node, "clock-frequency", &rate))
 170                 return ERR_PTR(-EIO);
 171
 172         of_property_read_u32(node, "clock-accuracy", &accuracy);
 173
 174         of_property_read_string(node, "clock-output-names", &clk_name);
 175
 176         clk = clk_register_fixed_rate_with_accuracy(NULL, clk_name, NULL,
 177                                                     0, rate, accuracy);
 178         if (IS_ERR(clk))
 179                 return clk;
 180
 181         ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
 182         if (ret) {
 183                 clk_unregister(clk);
 184                 return ERR_PTR(ret);
 185         }
 186
 187         return clk;
 188 }
 189
 190 /**
 191  * of_fixed_clk_setup() - Setup function for simple fixed rate clock
 192  */
 193 void __init of_fixed_clk_setup(struct device_node *node)
 194 {
 195         _of_fixed_clk_setup(node);
 196 }
 197 CLK_OF_DECLARE(fixed_clk, "fixed-clock", of_fixed_clk_setup);
 198
 199 static int of_fixed_clk_remove(struct platform_device *pdev)
 200 {
 201         struct clk *clk = platform_get_drvdata(pdev);
 202
 203         clk_unregister_fixed_rate(clk);
 204
 205         return 0;
 206 }
 207
 208 static int of_fixed_clk_probe(struct platform_device *pdev)
 209 {
 210         struct clk *clk;
 211
 212         /*
 213          * This function is not executed when of_fixed_clk_setup
 214          * succeeded.
 215          */
 216         clk = _of_fixed_clk_setup(pdev->dev.of_node);
 217         if (IS_ERR(clk))
 218                 return PTR_ERR(clk);
 219
 220         platform_set_drvdata(pdev, clk);
 221
 222         return 0;
 223 }
 224
 225 static const struct of_device_id of_fixed_clk_ids[] = {
 226         { .compatible = "fixed-clock" },
 227         { }
 228 };
 229 MODULE_DEVICE_TABLE(of, of_fixed_clk_ids);
 230
 231 static struct platform_driver of_fixed_clk_driver = {
 232         .driver = {
 233                 .name = "of_fixed_clk",
 234                 .of_match_table = of_fixed_clk_ids,
 235         },
 236         .probe = of_fixed_clk_probe,
 237         .remove = of_fixed_clk_remove,
 238 };
 239 builtin_platform_driver(of_fixed_clk_driver);
 240 #endif