perf bench futex: Cache align the worker struct
[linux/fpc-iii.git] / drivers / clk / rockchip / clk-rockchip.c
blob2c9bb81144c91cc51907b0cf8456c3184c1ce863
1 /*
2 * Copyright (c) 2013 MundoReader S.L.
3 * Author: Heiko Stuebner <heiko@sntech.de>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/clk-provider.h>
17 #include <linux/clkdev.h>
18 #include <linux/of.h>
19 #include <linux/of_address.h>
21 static DEFINE_SPINLOCK(clk_lock);
24 * Gate clocks
27 static void __init rk2928_gate_clk_init(struct device_node *node)
29 struct clk_onecell_data *clk_data;
30 const char *clk_parent;
31 const char *clk_name;
32 void __iomem *reg;
33 void __iomem *reg_idx;
34 int flags;
35 int qty;
36 int reg_bit;
37 int clkflags = CLK_SET_RATE_PARENT;
38 int i;
40 qty = of_property_count_strings(node, "clock-output-names");
41 if (qty < 0) {
42 pr_err("%s: error in clock-output-names %d\n", __func__, qty);
43 return;
46 if (qty == 0) {
47 pr_info("%s: nothing to do\n", __func__);
48 return;
51 reg = of_iomap(node, 0);
52 if (!reg)
53 return;
55 clk_data = kzalloc(sizeof(struct clk_onecell_data), GFP_KERNEL);
56 if (!clk_data) {
57 iounmap(reg);
58 return;
61 clk_data->clks = kzalloc(qty * sizeof(struct clk *), GFP_KERNEL);
62 if (!clk_data->clks) {
63 kfree(clk_data);
64 iounmap(reg);
65 return;
68 flags = CLK_GATE_HIWORD_MASK | CLK_GATE_SET_TO_DISABLE;
70 for (i = 0; i < qty; i++) {
71 of_property_read_string_index(node, "clock-output-names",
72 i, &clk_name);
74 /* ignore empty slots */
75 if (!strcmp("reserved", clk_name))
76 continue;
78 clk_parent = of_clk_get_parent_name(node, i);
80 /* keep all gates untouched for now */
81 clkflags |= CLK_IGNORE_UNUSED;
83 reg_idx = reg + (4 * (i / 16));
84 reg_bit = (i % 16);
86 clk_data->clks[i] = clk_register_gate(NULL, clk_name,
87 clk_parent, clkflags,
88 reg_idx, reg_bit,
89 flags,
90 &clk_lock);
91 WARN_ON(IS_ERR(clk_data->clks[i]));
94 clk_data->clk_num = qty;
96 of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
98 CLK_OF_DECLARE(rk2928_gate, "rockchip,rk2928-gate-clk", rk2928_gate_clk_init);