2 * opt3001.c - Texas Instruments OPT3001 Light Sensor
4 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
6 * Author: Andreas Dannenberg <dannenberg@ti.com>
7 * Based on previous work from: Felipe Balbi <balbi@ti.com>
9 * This program is free software: you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 of the License
11 * as published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but WITHOUT
14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
19 #include <linux/bitops.h>
20 #include <linux/delay.h>
21 #include <linux/device.h>
22 #include <linux/i2c.h>
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25 #include <linux/kernel.h>
26 #include <linux/module.h>
27 #include <linux/mutex.h>
28 #include <linux/slab.h>
29 #include <linux/types.h>
31 #include <linux/iio/events.h>
32 #include <linux/iio/iio.h>
33 #include <linux/iio/sysfs.h>
35 #define OPT3001_RESULT 0x00
36 #define OPT3001_CONFIGURATION 0x01
37 #define OPT3001_LOW_LIMIT 0x02
38 #define OPT3001_HIGH_LIMIT 0x03
39 #define OPT3001_MANUFACTURER_ID 0x7e
40 #define OPT3001_DEVICE_ID 0x7f
42 #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12)
43 #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12)
45 #define OPT3001_CONFIGURATION_CT BIT(11)
47 #define OPT3001_CONFIGURATION_M_MASK (3 << 9)
48 #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)
49 #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9)
50 #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */
52 #define OPT3001_CONFIGURATION_OVF BIT(8)
53 #define OPT3001_CONFIGURATION_CRF BIT(7)
54 #define OPT3001_CONFIGURATION_FH BIT(6)
55 #define OPT3001_CONFIGURATION_FL BIT(5)
56 #define OPT3001_CONFIGURATION_L BIT(4)
57 #define OPT3001_CONFIGURATION_POL BIT(3)
58 #define OPT3001_CONFIGURATION_ME BIT(2)
60 #define OPT3001_CONFIGURATION_FC_MASK (3 << 0)
62 /* The end-of-conversion enable is located in the low-limit register */
63 #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000
65 #define OPT3001_REG_EXPONENT(n) ((n) >> 12)
66 #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff)
68 #define OPT3001_INT_TIME_LONG 800000
69 #define OPT3001_INT_TIME_SHORT 100000
72 * Time to wait for conversion result to be ready. The device datasheet
73 * sect. 6.5 states results are ready after total integration time plus 3ms.
74 * This results in worst-case max values of 113ms or 883ms, respectively.
75 * Add some slack to be on the safe side.
77 #define OPT3001_RESULT_READY_SHORT 150
78 #define OPT3001_RESULT_READY_LONG 1000
81 struct i2c_client
*client
;
85 bool ok_to_ignore_lock
;
87 wait_queue_head_t result_ready_queue
;
93 u16 high_thresh_mantissa
;
94 u16 low_thresh_mantissa
;
102 struct opt3001_scale
{
107 static const struct opt3001_scale opt3001_scales
[] = {
154 static int opt3001_find_scale(const struct opt3001
*opt
, int val
,
155 int val2
, u8
*exponent
)
159 for (i
= 0; i
< ARRAY_SIZE(opt3001_scales
); i
++) {
160 const struct opt3001_scale
*scale
= &opt3001_scales
[i
];
163 * Combine the integer and micro parts for comparison
164 * purposes. Use milli lux precision to avoid 32-bit integer
167 if ((val
* 1000 + val2
/ 1000) <=
168 (scale
->val
* 1000 + scale
->val2
/ 1000)) {
177 static void opt3001_to_iio_ret(struct opt3001
*opt
, u8 exponent
,
178 u16 mantissa
, int *val
, int *val2
)
182 lux
= 10 * (mantissa
<< exponent
);
184 *val2
= (lux
- (*val
* 1000)) * 1000;
187 static void opt3001_set_mode(struct opt3001
*opt
, u16
*reg
, u16 mode
)
189 *reg
&= ~OPT3001_CONFIGURATION_M_MASK
;
194 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");
196 static struct attribute
*opt3001_attributes
[] = {
197 &iio_const_attr_integration_time_available
.dev_attr
.attr
,
201 static const struct attribute_group opt3001_attribute_group
= {
202 .attrs
= opt3001_attributes
,
205 static const struct iio_event_spec opt3001_event_spec
[] = {
207 .type
= IIO_EV_TYPE_THRESH
,
208 .dir
= IIO_EV_DIR_RISING
,
209 .mask_separate
= BIT(IIO_EV_INFO_VALUE
) |
210 BIT(IIO_EV_INFO_ENABLE
),
213 .type
= IIO_EV_TYPE_THRESH
,
214 .dir
= IIO_EV_DIR_FALLING
,
215 .mask_separate
= BIT(IIO_EV_INFO_VALUE
) |
216 BIT(IIO_EV_INFO_ENABLE
),
220 static const struct iio_chan_spec opt3001_channels
[] = {
223 .info_mask_separate
= BIT(IIO_CHAN_INFO_PROCESSED
) |
224 BIT(IIO_CHAN_INFO_INT_TIME
),
225 .event_spec
= opt3001_event_spec
,
226 .num_event_specs
= ARRAY_SIZE(opt3001_event_spec
),
228 IIO_CHAN_SOFT_TIMESTAMP(1),
231 static int opt3001_get_lux(struct opt3001
*opt
, int *val
, int *val2
)
242 * Enable the end-of-conversion interrupt mechanism. Note that
243 * doing so will overwrite the low-level limit value however we
244 * will restore this value later on.
246 ret
= i2c_smbus_write_word_swapped(opt
->client
,
248 OPT3001_LOW_LIMIT_EOC_ENABLE
);
250 dev_err(opt
->dev
, "failed to write register %02x\n",
255 /* Allow IRQ to access the device despite lock being set */
256 opt
->ok_to_ignore_lock
= true;
259 /* Reset data-ready indicator flag */
260 opt
->result_ready
= false;
262 /* Configure for single-conversion mode and start a new conversion */
263 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_CONFIGURATION
);
265 dev_err(opt
->dev
, "failed to read register %02x\n",
266 OPT3001_CONFIGURATION
);
271 opt3001_set_mode(opt
, ®
, OPT3001_CONFIGURATION_M_SINGLE
);
273 ret
= i2c_smbus_write_word_swapped(opt
->client
, OPT3001_CONFIGURATION
,
276 dev_err(opt
->dev
, "failed to write register %02x\n",
277 OPT3001_CONFIGURATION
);
282 /* Wait for the IRQ to indicate the conversion is complete */
283 ret
= wait_event_timeout(opt
->result_ready_queue
,
285 msecs_to_jiffies(OPT3001_RESULT_READY_LONG
));
287 /* Sleep for result ready time */
288 timeout
= (opt
->int_time
== OPT3001_INT_TIME_SHORT
) ?
289 OPT3001_RESULT_READY_SHORT
: OPT3001_RESULT_READY_LONG
;
292 /* Check result ready flag */
293 ret
= i2c_smbus_read_word_swapped(opt
->client
,
294 OPT3001_CONFIGURATION
);
296 dev_err(opt
->dev
, "failed to read register %02x\n",
297 OPT3001_CONFIGURATION
);
301 if (!(ret
& OPT3001_CONFIGURATION_CRF
)) {
307 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_RESULT
);
309 dev_err(opt
->dev
, "failed to read register %02x\n",
314 opt
->result_ready
= true;
319 /* Disallow IRQ to access the device while lock is active */
320 opt
->ok_to_ignore_lock
= false;
329 * Disable the end-of-conversion interrupt mechanism by
330 * restoring the low-level limit value (clearing
331 * OPT3001_LOW_LIMIT_EOC_ENABLE). Note that selectively clearing
332 * those enable bits would affect the actual limit value due to
333 * bit-overlap and therefore can't be done.
335 value
= (opt
->low_thresh_exp
<< 12) | opt
->low_thresh_mantissa
;
336 ret
= i2c_smbus_write_word_swapped(opt
->client
,
340 dev_err(opt
->dev
, "failed to write register %02x\n",
346 exponent
= OPT3001_REG_EXPONENT(opt
->result
);
347 mantissa
= OPT3001_REG_MANTISSA(opt
->result
);
349 opt3001_to_iio_ret(opt
, exponent
, mantissa
, val
, val2
);
351 return IIO_VAL_INT_PLUS_MICRO
;
354 static int opt3001_get_int_time(struct opt3001
*opt
, int *val
, int *val2
)
357 *val2
= opt
->int_time
;
359 return IIO_VAL_INT_PLUS_MICRO
;
362 static int opt3001_set_int_time(struct opt3001
*opt
, int time
)
367 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_CONFIGURATION
);
369 dev_err(opt
->dev
, "failed to read register %02x\n",
370 OPT3001_CONFIGURATION
);
377 case OPT3001_INT_TIME_SHORT
:
378 reg
&= ~OPT3001_CONFIGURATION_CT
;
379 opt
->int_time
= OPT3001_INT_TIME_SHORT
;
381 case OPT3001_INT_TIME_LONG
:
382 reg
|= OPT3001_CONFIGURATION_CT
;
383 opt
->int_time
= OPT3001_INT_TIME_LONG
;
389 return i2c_smbus_write_word_swapped(opt
->client
, OPT3001_CONFIGURATION
,
393 static int opt3001_read_raw(struct iio_dev
*iio
,
394 struct iio_chan_spec
const *chan
, int *val
, int *val2
,
397 struct opt3001
*opt
= iio_priv(iio
);
400 if (opt
->mode
== OPT3001_CONFIGURATION_M_CONTINUOUS
)
403 if (chan
->type
!= IIO_LIGHT
)
406 mutex_lock(&opt
->lock
);
409 case IIO_CHAN_INFO_PROCESSED
:
410 ret
= opt3001_get_lux(opt
, val
, val2
);
412 case IIO_CHAN_INFO_INT_TIME
:
413 ret
= opt3001_get_int_time(opt
, val
, val2
);
419 mutex_unlock(&opt
->lock
);
424 static int opt3001_write_raw(struct iio_dev
*iio
,
425 struct iio_chan_spec
const *chan
, int val
, int val2
,
428 struct opt3001
*opt
= iio_priv(iio
);
431 if (opt
->mode
== OPT3001_CONFIGURATION_M_CONTINUOUS
)
434 if (chan
->type
!= IIO_LIGHT
)
437 if (mask
!= IIO_CHAN_INFO_INT_TIME
)
443 mutex_lock(&opt
->lock
);
444 ret
= opt3001_set_int_time(opt
, val2
);
445 mutex_unlock(&opt
->lock
);
450 static int opt3001_read_event_value(struct iio_dev
*iio
,
451 const struct iio_chan_spec
*chan
, enum iio_event_type type
,
452 enum iio_event_direction dir
, enum iio_event_info info
,
455 struct opt3001
*opt
= iio_priv(iio
);
456 int ret
= IIO_VAL_INT_PLUS_MICRO
;
458 mutex_lock(&opt
->lock
);
461 case IIO_EV_DIR_RISING
:
462 opt3001_to_iio_ret(opt
, opt
->high_thresh_exp
,
463 opt
->high_thresh_mantissa
, val
, val2
);
465 case IIO_EV_DIR_FALLING
:
466 opt3001_to_iio_ret(opt
, opt
->low_thresh_exp
,
467 opt
->low_thresh_mantissa
, val
, val2
);
473 mutex_unlock(&opt
->lock
);
478 static int opt3001_write_event_value(struct iio_dev
*iio
,
479 const struct iio_chan_spec
*chan
, enum iio_event_type type
,
480 enum iio_event_direction dir
, enum iio_event_info info
,
483 struct opt3001
*opt
= iio_priv(iio
);
495 mutex_lock(&opt
->lock
);
497 ret
= opt3001_find_scale(opt
, val
, val2
, &exponent
);
499 dev_err(opt
->dev
, "can't find scale for %d.%06u\n", val
, val2
);
503 mantissa
= (((val
* 1000) + (val2
/ 1000)) / 10) >> exponent
;
504 value
= (exponent
<< 12) | mantissa
;
507 case IIO_EV_DIR_RISING
:
508 reg
= OPT3001_HIGH_LIMIT
;
509 opt
->high_thresh_mantissa
= mantissa
;
510 opt
->high_thresh_exp
= exponent
;
512 case IIO_EV_DIR_FALLING
:
513 reg
= OPT3001_LOW_LIMIT
;
514 opt
->low_thresh_mantissa
= mantissa
;
515 opt
->low_thresh_exp
= exponent
;
522 ret
= i2c_smbus_write_word_swapped(opt
->client
, reg
, value
);
524 dev_err(opt
->dev
, "failed to write register %02x\n", reg
);
529 mutex_unlock(&opt
->lock
);
534 static int opt3001_read_event_config(struct iio_dev
*iio
,
535 const struct iio_chan_spec
*chan
, enum iio_event_type type
,
536 enum iio_event_direction dir
)
538 struct opt3001
*opt
= iio_priv(iio
);
540 return opt
->mode
== OPT3001_CONFIGURATION_M_CONTINUOUS
;
543 static int opt3001_write_event_config(struct iio_dev
*iio
,
544 const struct iio_chan_spec
*chan
, enum iio_event_type type
,
545 enum iio_event_direction dir
, int state
)
547 struct opt3001
*opt
= iio_priv(iio
);
552 if (state
&& opt
->mode
== OPT3001_CONFIGURATION_M_CONTINUOUS
)
555 if (!state
&& opt
->mode
== OPT3001_CONFIGURATION_M_SHUTDOWN
)
558 mutex_lock(&opt
->lock
);
560 mode
= state
? OPT3001_CONFIGURATION_M_CONTINUOUS
561 : OPT3001_CONFIGURATION_M_SHUTDOWN
;
563 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_CONFIGURATION
);
565 dev_err(opt
->dev
, "failed to read register %02x\n",
566 OPT3001_CONFIGURATION
);
571 opt3001_set_mode(opt
, ®
, mode
);
573 ret
= i2c_smbus_write_word_swapped(opt
->client
, OPT3001_CONFIGURATION
,
576 dev_err(opt
->dev
, "failed to write register %02x\n",
577 OPT3001_CONFIGURATION
);
582 mutex_unlock(&opt
->lock
);
587 static const struct iio_info opt3001_info
= {
588 .driver_module
= THIS_MODULE
,
589 .attrs
= &opt3001_attribute_group
,
590 .read_raw
= opt3001_read_raw
,
591 .write_raw
= opt3001_write_raw
,
592 .read_event_value
= opt3001_read_event_value
,
593 .write_event_value
= opt3001_write_event_value
,
594 .read_event_config
= opt3001_read_event_config
,
595 .write_event_config
= opt3001_write_event_config
,
598 static int opt3001_read_id(struct opt3001
*opt
)
600 char manufacturer
[2];
604 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_MANUFACTURER_ID
);
606 dev_err(opt
->dev
, "failed to read register %02x\n",
607 OPT3001_MANUFACTURER_ID
);
611 manufacturer
[0] = ret
>> 8;
612 manufacturer
[1] = ret
& 0xff;
614 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_DEVICE_ID
);
616 dev_err(opt
->dev
, "failed to read register %02x\n",
623 dev_info(opt
->dev
, "Found %c%c OPT%04x\n", manufacturer
[0],
624 manufacturer
[1], device_id
);
629 static int opt3001_configure(struct opt3001
*opt
)
634 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_CONFIGURATION
);
636 dev_err(opt
->dev
, "failed to read register %02x\n",
637 OPT3001_CONFIGURATION
);
643 /* Enable automatic full-scale setting mode */
644 reg
&= ~OPT3001_CONFIGURATION_RN_MASK
;
645 reg
|= OPT3001_CONFIGURATION_RN_AUTO
;
647 /* Reflect status of the device's integration time setting */
648 if (reg
& OPT3001_CONFIGURATION_CT
)
649 opt
->int_time
= OPT3001_INT_TIME_LONG
;
651 opt
->int_time
= OPT3001_INT_TIME_SHORT
;
653 /* Ensure device is in shutdown initially */
654 opt3001_set_mode(opt
, ®
, OPT3001_CONFIGURATION_M_SHUTDOWN
);
656 /* Configure for latched window-style comparison operation */
657 reg
|= OPT3001_CONFIGURATION_L
;
658 reg
&= ~OPT3001_CONFIGURATION_POL
;
659 reg
&= ~OPT3001_CONFIGURATION_ME
;
660 reg
&= ~OPT3001_CONFIGURATION_FC_MASK
;
662 ret
= i2c_smbus_write_word_swapped(opt
->client
, OPT3001_CONFIGURATION
,
665 dev_err(opt
->dev
, "failed to write register %02x\n",
666 OPT3001_CONFIGURATION
);
670 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_LOW_LIMIT
);
672 dev_err(opt
->dev
, "failed to read register %02x\n",
677 opt
->low_thresh_mantissa
= OPT3001_REG_MANTISSA(ret
);
678 opt
->low_thresh_exp
= OPT3001_REG_EXPONENT(ret
);
680 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_HIGH_LIMIT
);
682 dev_err(opt
->dev
, "failed to read register %02x\n",
687 opt
->high_thresh_mantissa
= OPT3001_REG_MANTISSA(ret
);
688 opt
->high_thresh_exp
= OPT3001_REG_EXPONENT(ret
);
693 static irqreturn_t
opt3001_irq(int irq
, void *_iio
)
695 struct iio_dev
*iio
= _iio
;
696 struct opt3001
*opt
= iio_priv(iio
);
699 if (!opt
->ok_to_ignore_lock
)
700 mutex_lock(&opt
->lock
);
702 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_CONFIGURATION
);
704 dev_err(opt
->dev
, "failed to read register %02x\n",
705 OPT3001_CONFIGURATION
);
709 if ((ret
& OPT3001_CONFIGURATION_M_MASK
) ==
710 OPT3001_CONFIGURATION_M_CONTINUOUS
) {
711 if (ret
& OPT3001_CONFIGURATION_FH
)
713 IIO_UNMOD_EVENT_CODE(IIO_LIGHT
, 0,
716 iio_get_time_ns(iio
));
717 if (ret
& OPT3001_CONFIGURATION_FL
)
719 IIO_UNMOD_EVENT_CODE(IIO_LIGHT
, 0,
722 iio_get_time_ns(iio
));
723 } else if (ret
& OPT3001_CONFIGURATION_CRF
) {
724 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_RESULT
);
726 dev_err(opt
->dev
, "failed to read register %02x\n",
731 opt
->result_ready
= true;
732 wake_up(&opt
->result_ready_queue
);
736 if (!opt
->ok_to_ignore_lock
)
737 mutex_unlock(&opt
->lock
);
742 static int opt3001_probe(struct i2c_client
*client
,
743 const struct i2c_device_id
*id
)
745 struct device
*dev
= &client
->dev
;
749 int irq
= client
->irq
;
752 iio
= devm_iio_device_alloc(dev
, sizeof(*opt
));
757 opt
->client
= client
;
760 mutex_init(&opt
->lock
);
761 init_waitqueue_head(&opt
->result_ready_queue
);
762 i2c_set_clientdata(client
, iio
);
764 ret
= opt3001_read_id(opt
);
768 ret
= opt3001_configure(opt
);
772 iio
->name
= client
->name
;
773 iio
->channels
= opt3001_channels
;
774 iio
->num_channels
= ARRAY_SIZE(opt3001_channels
);
775 iio
->dev
.parent
= dev
;
776 iio
->modes
= INDIO_DIRECT_MODE
;
777 iio
->info
= &opt3001_info
;
779 ret
= devm_iio_device_register(dev
, iio
);
781 dev_err(dev
, "failed to register IIO device\n");
785 /* Make use of INT pin only if valid IRQ no. is given */
787 ret
= request_threaded_irq(irq
, NULL
, opt3001_irq
,
788 IRQF_TRIGGER_FALLING
| IRQF_ONESHOT
,
791 dev_err(dev
, "failed to request IRQ #%d\n", irq
);
796 dev_dbg(opt
->dev
, "enabling interrupt-less operation\n");
802 static int opt3001_remove(struct i2c_client
*client
)
804 struct iio_dev
*iio
= i2c_get_clientdata(client
);
805 struct opt3001
*opt
= iio_priv(iio
);
810 free_irq(client
->irq
, iio
);
812 ret
= i2c_smbus_read_word_swapped(opt
->client
, OPT3001_CONFIGURATION
);
814 dev_err(opt
->dev
, "failed to read register %02x\n",
815 OPT3001_CONFIGURATION
);
820 opt3001_set_mode(opt
, ®
, OPT3001_CONFIGURATION_M_SHUTDOWN
);
822 ret
= i2c_smbus_write_word_swapped(opt
->client
, OPT3001_CONFIGURATION
,
825 dev_err(opt
->dev
, "failed to write register %02x\n",
826 OPT3001_CONFIGURATION
);
833 static const struct i2c_device_id opt3001_id
[] = {
835 { } /* Terminating Entry */
837 MODULE_DEVICE_TABLE(i2c
, opt3001_id
);
839 static const struct of_device_id opt3001_of_match
[] = {
840 { .compatible
= "ti,opt3001" },
844 static struct i2c_driver opt3001_driver
= {
845 .probe
= opt3001_probe
,
846 .remove
= opt3001_remove
,
847 .id_table
= opt3001_id
,
851 .of_match_table
= of_match_ptr(opt3001_of_match
),
855 module_i2c_driver(opt3001_driver
);
857 MODULE_LICENSE("GPL v2");
858 MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
859 MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");