perf bench futex: Cache align the worker struct
[linux/fpc-iii.git] / drivers / reset / sti / reset-syscfg.c
blob9bd57a5eee7288cf126192f83d2e23870ab5bce5
1 /*
2 * Copyright (C) 2013 STMicroelectronics Limited
3 * Author: Stephen Gallimore <stephen.gallimore@st.com>
5 * Inspired by mach-imx/src.c
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/platform_device.h>
14 #include <linux/module.h>
15 #include <linux/err.h>
16 #include <linux/types.h>
17 #include <linux/of_device.h>
18 #include <linux/regmap.h>
19 #include <linux/mfd/syscon.h>
21 #include "reset-syscfg.h"
23 /**
24 * Reset channel regmap configuration
26 * @reset: regmap field for the channel's reset bit.
27 * @ack: regmap field for the channel's ack bit (optional).
29 struct syscfg_reset_channel {
30 struct regmap_field *reset;
31 struct regmap_field *ack;
34 /**
35 * A reset controller which groups together a set of related reset bits, which
36 * may be located in different system configuration registers.
38 * @rst: base reset controller structure.
39 * @active_low: are the resets in this controller active low, i.e. clearing
40 * the reset bit puts the hardware into reset.
41 * @channels: An array of reset channels for this controller.
43 struct syscfg_reset_controller {
44 struct reset_controller_dev rst;
45 bool active_low;
46 struct syscfg_reset_channel *channels;
49 #define to_syscfg_reset_controller(_rst) \
50 container_of(_rst, struct syscfg_reset_controller, rst)
52 static int syscfg_reset_program_hw(struct reset_controller_dev *rcdev,
53 unsigned long idx, int assert)
55 struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
56 const struct syscfg_reset_channel *ch;
57 u32 ctrl_val = rst->active_low ? !assert : !!assert;
58 int err;
60 if (idx >= rcdev->nr_resets)
61 return -EINVAL;
63 ch = &rst->channels[idx];
65 err = regmap_field_write(ch->reset, ctrl_val);
66 if (err)
67 return err;
69 if (ch->ack) {
70 unsigned long timeout = jiffies + msecs_to_jiffies(1000);
71 u32 ack_val;
73 while (true) {
74 err = regmap_field_read(ch->ack, &ack_val);
75 if (err)
76 return err;
78 if (ack_val == ctrl_val)
79 break;
81 if (time_after(jiffies, timeout))
82 return -ETIME;
84 cpu_relax();
88 return 0;
91 static int syscfg_reset_assert(struct reset_controller_dev *rcdev,
92 unsigned long idx)
94 return syscfg_reset_program_hw(rcdev, idx, true);
97 static int syscfg_reset_deassert(struct reset_controller_dev *rcdev,
98 unsigned long idx)
100 return syscfg_reset_program_hw(rcdev, idx, false);
103 static int syscfg_reset_dev(struct reset_controller_dev *rcdev,
104 unsigned long idx)
106 int err;
108 err = syscfg_reset_assert(rcdev, idx);
109 if (err)
110 return err;
112 return syscfg_reset_deassert(rcdev, idx);
115 static int syscfg_reset_status(struct reset_controller_dev *rcdev,
116 unsigned long idx)
118 struct syscfg_reset_controller *rst = to_syscfg_reset_controller(rcdev);
119 const struct syscfg_reset_channel *ch;
120 u32 ret_val = 0;
121 int err;
123 if (idx >= rcdev->nr_resets)
124 return -EINVAL;
126 ch = &rst->channels[idx];
127 if (ch->ack)
128 err = regmap_field_read(ch->ack, &ret_val);
129 else
130 err = regmap_field_read(ch->reset, &ret_val);
131 if (err)
132 return err;
134 return rst->active_low ? !ret_val : !!ret_val;
137 static const struct reset_control_ops syscfg_reset_ops = {
138 .reset = syscfg_reset_dev,
139 .assert = syscfg_reset_assert,
140 .deassert = syscfg_reset_deassert,
141 .status = syscfg_reset_status,
144 static int syscfg_reset_controller_register(struct device *dev,
145 const struct syscfg_reset_controller_data *data)
147 struct syscfg_reset_controller *rc;
148 size_t size;
149 int i, err;
151 rc = devm_kzalloc(dev, sizeof(*rc), GFP_KERNEL);
152 if (!rc)
153 return -ENOMEM;
155 size = sizeof(struct syscfg_reset_channel) * data->nr_channels;
157 rc->channels = devm_kzalloc(dev, size, GFP_KERNEL);
158 if (!rc->channels)
159 return -ENOMEM;
161 rc->rst.ops = &syscfg_reset_ops,
162 rc->rst.of_node = dev->of_node;
163 rc->rst.nr_resets = data->nr_channels;
164 rc->active_low = data->active_low;
166 for (i = 0; i < data->nr_channels; i++) {
167 struct regmap *map;
168 struct regmap_field *f;
169 const char *compatible = data->channels[i].compatible;
171 map = syscon_regmap_lookup_by_compatible(compatible);
172 if (IS_ERR(map))
173 return PTR_ERR(map);
175 f = devm_regmap_field_alloc(dev, map, data->channels[i].reset);
176 if (IS_ERR(f))
177 return PTR_ERR(f);
179 rc->channels[i].reset = f;
181 if (!data->wait_for_ack)
182 continue;
184 f = devm_regmap_field_alloc(dev, map, data->channels[i].ack);
185 if (IS_ERR(f))
186 return PTR_ERR(f);
188 rc->channels[i].ack = f;
191 err = reset_controller_register(&rc->rst);
192 if (!err)
193 dev_info(dev, "registered\n");
195 return err;
198 int syscfg_reset_probe(struct platform_device *pdev)
200 struct device *dev = pdev ? &pdev->dev : NULL;
201 const struct of_device_id *match;
203 if (!dev || !dev->driver)
204 return -ENODEV;
206 match = of_match_device(dev->driver->of_match_table, dev);
207 if (!match || !match->data)
208 return -EINVAL;
210 return syscfg_reset_controller_register(dev, match->data);