2 * Freescale SPI/eSPI controller driver library.
4 * Maintainer: Kumar Gala
6 * Copyright 2010 Freescale Semiconductor, Inc.
7 * Copyright (C) 2006 Polycom, Inc.
9 * CPM SPI and QE buffer descriptors mode support:
10 * Copyright (c) 2009 MontaVista Software, Inc.
11 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
18 #ifndef __SPI_FSL_LIB_H__
19 #define __SPI_FSL_LIB_H__
23 /* SPI/eSPI Controller driver's private data. */
26 void __iomem
*reg_base
;
28 /* rx & tx bufs from the spi_transfer */
31 #if IS_ENABLED(CONFIG_SPI_FSL_ESPI)
37 struct spi_pram __iomem
*pram
;
39 struct cpm_buf_desc __iomem
*tx_bd
;
40 struct cpm_buf_desc __iomem
*rx_bd
;
43 struct spi_transfer
*xfer_in_progress
;
45 /* dma addresses for CPM transfers */
51 dma_addr_t dma_dummy_tx
;
52 dma_addr_t dma_dummy_rx
;
54 /* functions to deal with different sized buffers */
55 void (*get_rx
) (u32 rx_data
, struct mpc8xxx_spi
*);
56 u32(*get_tx
) (struct mpc8xxx_spi
*);
61 unsigned nsecs
; /* (clock cycle time)/2 */
63 u32 spibrg
; /* SPIBRG input clock */
64 u32 rx_shift
; /* RX data reg shift when in qe mode */
65 u32 tx_shift
; /* TX data reg shift when in qe mode */
69 #if IS_ENABLED(CONFIG_SPI_FSL_SPI)
71 int native_chipselects
;
74 void (*set_shifts
)(u32
*rx_shift
, u32
*tx_shift
,
75 int bits_per_word
, int msb_first
);
78 struct completion done
;
81 struct spi_mpc8xxx_cs
{
82 /* functions to deal with different sized buffers */
83 void (*get_rx
) (u32 rx_data
, struct mpc8xxx_spi
*);
84 u32 (*get_tx
) (struct mpc8xxx_spi
*);
85 u32 rx_shift
; /* RX data reg shift when in qe mode */
86 u32 tx_shift
; /* TX data reg shift when in qe mode */
87 u32 hw_mode
; /* Holds HW mode register settings */
90 static inline void mpc8xxx_spi_write_reg(__be32 __iomem
*reg
, u32 val
)
92 iowrite32be(val
, reg
);
95 static inline u32
mpc8xxx_spi_read_reg(__be32 __iomem
*reg
)
97 return ioread32be(reg
);
100 struct mpc8xxx_spi_probe_info
{
101 struct fsl_spi_platform_data pdata
;
106 extern u32
mpc8xxx_spi_tx_buf_u8(struct mpc8xxx_spi
*mpc8xxx_spi
);
107 extern u32
mpc8xxx_spi_tx_buf_u16(struct mpc8xxx_spi
*mpc8xxx_spi
);
108 extern u32
mpc8xxx_spi_tx_buf_u32(struct mpc8xxx_spi
*mpc8xxx_spi
);
109 extern void mpc8xxx_spi_rx_buf_u8(u32 data
, struct mpc8xxx_spi
*mpc8xxx_spi
);
110 extern void mpc8xxx_spi_rx_buf_u16(u32 data
, struct mpc8xxx_spi
*mpc8xxx_spi
);
111 extern void mpc8xxx_spi_rx_buf_u32(u32 data
, struct mpc8xxx_spi
*mpc8xxx_spi
);
113 extern struct mpc8xxx_spi_probe_info
*to_of_pinfo(
114 struct fsl_spi_platform_data
*pdata
);
115 extern int mpc8xxx_spi_bufs(struct mpc8xxx_spi
*mspi
,
116 struct spi_transfer
*t
, unsigned int len
);
117 extern const char *mpc8xxx_spi_strmode(unsigned int flags
);
118 extern void mpc8xxx_spi_probe(struct device
*dev
, struct resource
*mem
,
120 extern int mpc8xxx_spi_remove(struct device
*dev
);
121 extern int of_mpc8xxx_spi_probe(struct platform_device
*ofdev
);
123 #endif /* __SPI_FSL_LIB_H__ */