x86, numa: Reduce minimum fake node size to 32M
[linux/fpc-iii.git] / arch / x86 / mm / amdtopology_64.c
blob51fae9cfdecb39ba87149dc76f128f6e12e73540
1 /*
2 * AMD NUMA support.
3 * Discover the memory map and associated nodes.
5 * This version reads it directly from the AMD northbridge.
7 * Copyright 2002,2003 Andi Kleen, SuSE Labs.
8 */
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/string.h>
12 #include <linux/module.h>
13 #include <linux/nodemask.h>
14 #include <linux/memblock.h>
16 #include <asm/io.h>
17 #include <linux/pci_ids.h>
18 #include <linux/acpi.h>
19 #include <asm/types.h>
20 #include <asm/mmzone.h>
21 #include <asm/proto.h>
22 #include <asm/e820.h>
23 #include <asm/pci-direct.h>
24 #include <asm/numa.h>
25 #include <asm/mpspec.h>
26 #include <asm/apic.h>
27 #include <asm/amd_nb.h>
29 static struct bootnode __initdata nodes[8];
30 static nodemask_t __initdata nodes_parsed = NODE_MASK_NONE;
32 static __init int find_northbridge(void)
34 int num;
36 for (num = 0; num < 32; num++) {
37 u32 header;
39 header = read_pci_config(0, num, 0, 0x00);
40 if (header != (PCI_VENDOR_ID_AMD | (0x1100<<16)) &&
41 header != (PCI_VENDOR_ID_AMD | (0x1200<<16)) &&
42 header != (PCI_VENDOR_ID_AMD | (0x1300<<16)))
43 continue;
45 header = read_pci_config(0, num, 1, 0x00);
46 if (header != (PCI_VENDOR_ID_AMD | (0x1101<<16)) &&
47 header != (PCI_VENDOR_ID_AMD | (0x1201<<16)) &&
48 header != (PCI_VENDOR_ID_AMD | (0x1301<<16)))
49 continue;
50 return num;
53 return -1;
56 static __init void early_get_boot_cpu_id(void)
59 * need to get the APIC ID of the BSP so can use that to
60 * create apicid_to_node in amd_scan_nodes()
62 #ifdef CONFIG_X86_MPPARSE
64 * get boot-time SMP configuration:
66 if (smp_found_config)
67 early_get_smp_config();
68 #endif
69 early_init_lapic_mapping();
72 int __init amd_get_nodes(struct bootnode *physnodes)
74 int i;
75 int ret = 0;
77 for_each_node_mask(i, nodes_parsed) {
78 physnodes[ret].start = nodes[i].start;
79 physnodes[ret].end = nodes[i].end;
80 ret++;
82 return ret;
85 int __init amd_numa_init(unsigned long start_pfn, unsigned long end_pfn)
87 unsigned long start = PFN_PHYS(start_pfn);
88 unsigned long end = PFN_PHYS(end_pfn);
89 unsigned numnodes;
90 unsigned long prevbase;
91 int i, nb, found = 0;
92 u32 nodeid, reg;
94 if (!early_pci_allowed())
95 return -1;
97 nb = find_northbridge();
98 if (nb < 0)
99 return nb;
101 pr_info("Scanning NUMA topology in Northbridge %d\n", nb);
103 reg = read_pci_config(0, nb, 0, 0x60);
104 numnodes = ((reg >> 4) & 0xF) + 1;
105 if (numnodes <= 1)
106 return -1;
108 pr_info("Number of physical nodes %d\n", numnodes);
110 prevbase = 0;
111 for (i = 0; i < 8; i++) {
112 unsigned long base, limit;
114 base = read_pci_config(0, nb, 1, 0x40 + i*8);
115 limit = read_pci_config(0, nb, 1, 0x44 + i*8);
117 nodeid = limit & 7;
118 if ((base & 3) == 0) {
119 if (i < numnodes)
120 pr_info("Skipping disabled node %d\n", i);
121 continue;
123 if (nodeid >= numnodes) {
124 pr_info("Ignoring excess node %d (%lx:%lx)\n", nodeid,
125 base, limit);
126 continue;
129 if (!limit) {
130 pr_info("Skipping node entry %d (base %lx)\n",
131 i, base);
132 continue;
134 if ((base >> 8) & 3 || (limit >> 8) & 3) {
135 pr_err("Node %d using interleaving mode %lx/%lx\n",
136 nodeid, (base >> 8) & 3, (limit >> 8) & 3);
137 return -1;
139 if (node_isset(nodeid, nodes_parsed)) {
140 pr_info("Node %d already present, skipping\n",
141 nodeid);
142 continue;
145 limit >>= 16;
146 limit <<= 24;
147 limit |= (1<<24)-1;
148 limit++;
150 if (limit > end)
151 limit = end;
152 if (limit <= base)
153 continue;
155 base >>= 16;
156 base <<= 24;
158 if (base < start)
159 base = start;
160 if (limit > end)
161 limit = end;
162 if (limit == base) {
163 pr_err("Empty node %d\n", nodeid);
164 continue;
166 if (limit < base) {
167 pr_err("Node %d bogus settings %lx-%lx.\n",
168 nodeid, base, limit);
169 continue;
172 /* Could sort here, but pun for now. Should not happen anyroads. */
173 if (prevbase > base) {
174 pr_err("Node map not sorted %lx,%lx\n",
175 prevbase, base);
176 return -1;
179 pr_info("Node %d MemBase %016lx Limit %016lx\n",
180 nodeid, base, limit);
182 found++;
184 nodes[nodeid].start = base;
185 nodes[nodeid].end = limit;
187 prevbase = base;
189 node_set(nodeid, nodes_parsed);
192 if (!found)
193 return -1;
194 return 0;
197 int __init amd_scan_nodes(void)
199 unsigned int bits;
200 unsigned int cores;
201 unsigned int apicid_base;
202 int i;
204 BUG_ON(nodes_empty(nodes_parsed));
205 node_possible_map = nodes_parsed;
206 memnode_shift = compute_hash_shift(nodes, 8, NULL);
207 if (memnode_shift < 0) {
208 pr_err("No NUMA node hash function found. Contact maintainer\n");
209 return -1;
211 pr_info("Using node hash shift of %d\n", memnode_shift);
213 /* use the coreid bits from early_identify_cpu */
214 bits = boot_cpu_data.x86_coreid_bits;
215 cores = (1<<bits);
216 apicid_base = 0;
217 /* get the APIC ID of the BSP early for systems with apicid lifting */
218 early_get_boot_cpu_id();
219 if (boot_cpu_physical_apicid > 0) {
220 pr_info("BSP APIC ID: %02x\n", boot_cpu_physical_apicid);
221 apicid_base = boot_cpu_physical_apicid;
224 for_each_node_mask(i, node_possible_map) {
225 int j;
227 memblock_x86_register_active_regions(i,
228 nodes[i].start >> PAGE_SHIFT,
229 nodes[i].end >> PAGE_SHIFT);
230 for (j = apicid_base; j < cores + apicid_base; j++)
231 apicid_to_node[(i << bits) + j] = i;
232 setup_node_bootmem(i, nodes[i].start, nodes[i].end);
235 numa_init_array();
236 return 0;