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x86, numa: Reduce minimum fake node size to 32M
[linux/fpc-iii.git] / drivers / media / video / gspca / w996Xcf.c
blob4066ac8c45a0fc76acb7fc7b944979be5bad4d14
1 /**
2 *
3 * GSPCA sub driver for W996[78]CF JPEG USB Dual Mode Camera Chip.
4 *
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the in kernel v4l1 w9968cf driver:
8 *
9 * Copyright (C) 2002-2004 by Luca Risolia <luca.risolia@studio.unibo.it>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 *
25 */
26
27 /* Note this is not a stand alone driver, it gets included in ov519.c, this
28 is a bit of a hack, but it needs the driver code for a lot of different
29 ov sensors which is already present in ov519.c (the old v4l1 driver used
30 the ovchipcam framework). When we have the time we really should move
31 the sensor drivers to v4l2 sub drivers, and properly split of this
32 driver from ov519.c */
33
34 #define W9968CF_I2C_BUS_DELAY 4 /* delay in us for I2C bit r/w operations */
35
36 #define Y_QUANTABLE (&sd->jpeg_hdr[JPEG_QT0_OFFSET])
37 #define UV_QUANTABLE (&sd->jpeg_hdr[JPEG_QT1_OFFSET])
38
39 static const struct v4l2_pix_format w9968cf_vga_mode[] = {
40 {160, 120, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
41 .bytesperline = 160 * 2,
42 .sizeimage = 160 * 120 * 2,
43 .colorspace = V4L2_COLORSPACE_JPEG},
44 {176, 144, V4L2_PIX_FMT_UYVY, V4L2_FIELD_NONE,
45 .bytesperline = 176 * 2,
46 .sizeimage = 176 * 144 * 2,
47 .colorspace = V4L2_COLORSPACE_JPEG},
48 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
49 .bytesperline = 320 * 2,
50 .sizeimage = 320 * 240 * 2,
51 .colorspace = V4L2_COLORSPACE_JPEG},
52 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
53 .bytesperline = 352 * 2,
54 .sizeimage = 352 * 288 * 2,
55 .colorspace = V4L2_COLORSPACE_JPEG},
56 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
57 .bytesperline = 640 * 2,
58 .sizeimage = 640 * 480 * 2,
59 .colorspace = V4L2_COLORSPACE_JPEG},
60 };
61
62 static int reg_w(struct sd *sd, __u16 index, __u16 value);
63
64 /*--------------------------------------------------------------------------
65 Write 64-bit data to the fast serial bus registers.
66 Return 0 on success, -1 otherwise.
67 --------------------------------------------------------------------------*/
68 static int w9968cf_write_fsb(struct sd *sd, u16* data)
69 {
70 struct usb_device *udev = sd->gspca_dev.dev;
71 u16 value;
72 int ret;
73
74 value = *data++;
75 memcpy(sd->gspca_dev.usb_buf, data, 6);
76
77 ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), 0,
78 USB_TYPE_VENDOR | USB_DIR_OUT | USB_RECIP_DEVICE,
79 value, 0x06, sd->gspca_dev.usb_buf, 6, 500);
80 if (ret < 0) {
81 err("Write FSB registers failed (%d)", ret);
82 return ret;
83 }
84
85 return 0;
86 }
87
88 /*--------------------------------------------------------------------------
89 Write data to the serial bus control register.
90 Return 0 on success, a negative number otherwise.
91 --------------------------------------------------------------------------*/
92 static int w9968cf_write_sb(struct sd *sd, u16 value)
93 {
94 int ret;
95
96 /* We don't use reg_w here, as that would cause all writes when
97 bitbanging i2c to be logged, making the logs impossible to read */
98 ret = usb_control_msg(sd->gspca_dev.dev,
99 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
100 0,
101 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
102 value, 0x01, NULL, 0, 500);
103
104 udelay(W9968CF_I2C_BUS_DELAY);
105
106 if (ret < 0) {
107 err("Write SB reg [01] %04x failed", value);
108 return ret;
109 }
110
111 return 0;
112 }
113
114 /*--------------------------------------------------------------------------
115 Read data from the serial bus control register.
116 Return 0 on success, a negative number otherwise.
117 --------------------------------------------------------------------------*/
118 static int w9968cf_read_sb(struct sd *sd)
119 {
120 int ret;
121
122 /* We don't use reg_r here, as the w9968cf is special and has 16
123 bit registers instead of 8 bit */
124 ret = usb_control_msg(sd->gspca_dev.dev,
125 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
126 1,
127 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
128 0, 0x01, sd->gspca_dev.usb_buf, 2, 500);
129 if (ret >= 0)
130 ret = sd->gspca_dev.usb_buf[0] |
131 (sd->gspca_dev.usb_buf[1] << 8);
132 else
133 err("Read SB reg [01] failed");
134
135 udelay(W9968CF_I2C_BUS_DELAY);
136
137 return ret;
138 }
139
140 /*--------------------------------------------------------------------------
141 Upload quantization tables for the JPEG compression.
142 This function is called by w9968cf_start_transfer().
143 Return 0 on success, a negative number otherwise.
144 --------------------------------------------------------------------------*/
145 static int w9968cf_upload_quantizationtables(struct sd *sd)
146 {
147 u16 a, b;
148 int ret = 0, i, j;
149
150 ret += reg_w(sd, 0x39, 0x0010); /* JPEG clock enable */
151
152 for (i = 0, j = 0; i < 32; i++, j += 2) {
153 a = Y_QUANTABLE[j] | ((unsigned)(Y_QUANTABLE[j+1]) << 8);
154 b = UV_QUANTABLE[j] | ((unsigned)(UV_QUANTABLE[j+1]) << 8);
155 ret += reg_w(sd, 0x40+i, a);
156 ret += reg_w(sd, 0x60+i, b);
157 }
158 ret += reg_w(sd, 0x39, 0x0012); /* JPEG encoder enable */
159
160 return ret;
161 }
162
163 /****************************************************************************
164 * Low-level I2C I/O functions. *
165 * The adapter supports the following I2C transfer functions: *
166 * i2c_adap_fastwrite_byte_data() (at 400 kHz bit frequency only) *
167 * i2c_adap_read_byte_data() *
168 * i2c_adap_read_byte() *
169 ****************************************************************************/
170
171 static int w9968cf_smbus_start(struct sd *sd)
172 {
173 int ret = 0;
174
175 ret += w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
176 ret += w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
177
178 return ret;
179 }
180
181 static int w9968cf_smbus_stop(struct sd *sd)
182 {
183 int ret = 0;
184
185 ret += w9968cf_write_sb(sd, 0x0010); /* SDE=1, SDA=0, SCL=0 */
186 ret += w9968cf_write_sb(sd, 0x0011); /* SDE=1, SDA=0, SCL=1 */
187 ret += w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
188
189 return ret;
190 }
191
192 static int w9968cf_smbus_write_byte(struct sd *sd, u8 v)
193 {
194 u8 bit;
195 int ret = 0, sda;
196
197 for (bit = 0 ; bit < 8 ; bit++) {
198 sda = (v & 0x80) ? 2 : 0;
199 v <<= 1;
200 /* SDE=1, SDA=sda, SCL=0 */
201 ret += w9968cf_write_sb(sd, 0x10 | sda);
202 /* SDE=1, SDA=sda, SCL=1 */
203 ret += w9968cf_write_sb(sd, 0x11 | sda);
204 /* SDE=1, SDA=sda, SCL=0 */
205 ret += w9968cf_write_sb(sd, 0x10 | sda);
206 }
207
208 return ret;
209 }
210
211 static int w9968cf_smbus_read_byte(struct sd *sd, u8* v)
212 {
213 u8 bit;
214 int ret = 0;
215
216 /* No need to ensure SDA is high as we are always called after
217 read_ack which ends with SDA high */
218 *v = 0;
219 for (bit = 0 ; bit < 8 ; bit++) {
220 *v <<= 1;
221 /* SDE=1, SDA=1, SCL=1 */
222 ret += w9968cf_write_sb(sd, 0x0013);
223 *v |= (w9968cf_read_sb(sd) & 0x0008) ? 1 : 0;
224 /* SDE=1, SDA=1, SCL=0 */
225 ret += w9968cf_write_sb(sd, 0x0012);
226 }
227
228 return ret;
229 }
230
231 static int w9968cf_smbus_write_nack(struct sd *sd)
232 {
233 int ret = 0;
234
235 /* No need to ensure SDA is high as we are always called after
236 read_byte which ends with SDA high */
237 ret += w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
238 ret += w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
239
240 return ret;
241 }
242
243 static int w9968cf_smbus_read_ack(struct sd *sd)
244 {
245 int ret = 0, sda;
246
247 /* Ensure SDA is high before raising clock to avoid a spurious stop */
248 ret += w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
249 ret += w9968cf_write_sb(sd, 0x0013); /* SDE=1, SDA=1, SCL=1 */
250 sda = w9968cf_read_sb(sd);
251 ret += w9968cf_write_sb(sd, 0x0012); /* SDE=1, SDA=1, SCL=0 */
252 if (sda < 0)
253 ret += sda;
254 else if (sda & 0x08) {
255 PDEBUG(D_USBI, "Did not receive i2c ACK");
256 ret += -1;
257 }
258
259 return ret;
260 }
261
262 /* SMBus protocol: S Addr Wr [A] Subaddr [A] Value [A] P */
263 static int w9968cf_i2c_w(struct sd *sd, u8 reg, u8 value)
264 {
265 u16* data = (u16 *)sd->gspca_dev.usb_buf;
266 int ret = 0;
267
268 data[0] = 0x082f | ((sd->sensor_addr & 0x80) ? 0x1500 : 0x0);
269 data[0] |= (sd->sensor_addr & 0x40) ? 0x4000 : 0x0;
270 data[1] = 0x2082 | ((sd->sensor_addr & 0x40) ? 0x0005 : 0x0);
271 data[1] |= (sd->sensor_addr & 0x20) ? 0x0150 : 0x0;
272 data[1] |= (sd->sensor_addr & 0x10) ? 0x5400 : 0x0;
273 data[2] = 0x8208 | ((sd->sensor_addr & 0x08) ? 0x0015 : 0x0);
274 data[2] |= (sd->sensor_addr & 0x04) ? 0x0540 : 0x0;
275 data[2] |= (sd->sensor_addr & 0x02) ? 0x5000 : 0x0;
276 data[3] = 0x1d20 | ((sd->sensor_addr & 0x02) ? 0x0001 : 0x0);
277 data[3] |= (sd->sensor_addr & 0x01) ? 0x0054 : 0x0;
278
279 ret += w9968cf_write_fsb(sd, data);
280
281 data[0] = 0x8208 | ((reg & 0x80) ? 0x0015 : 0x0);
282 data[0] |= (reg & 0x40) ? 0x0540 : 0x0;
283 data[0] |= (reg & 0x20) ? 0x5000 : 0x0;
284 data[1] = 0x0820 | ((reg & 0x20) ? 0x0001 : 0x0);
285 data[1] |= (reg & 0x10) ? 0x0054 : 0x0;
286 data[1] |= (reg & 0x08) ? 0x1500 : 0x0;
287 data[1] |= (reg & 0x04) ? 0x4000 : 0x0;
288 data[2] = 0x2082 | ((reg & 0x04) ? 0x0005 : 0x0);
289 data[2] |= (reg & 0x02) ? 0x0150 : 0x0;
290 data[2] |= (reg & 0x01) ? 0x5400 : 0x0;
291 data[3] = 0x001d;
292
293 ret += w9968cf_write_fsb(sd, data);
294
295 data[0] = 0x8208 | ((value & 0x80) ? 0x0015 : 0x0);
296 data[0] |= (value & 0x40) ? 0x0540 : 0x0;
297 data[0] |= (value & 0x20) ? 0x5000 : 0x0;
298 data[1] = 0x0820 | ((value & 0x20) ? 0x0001 : 0x0);
299 data[1] |= (value & 0x10) ? 0x0054 : 0x0;
300 data[1] |= (value & 0x08) ? 0x1500 : 0x0;
301 data[1] |= (value & 0x04) ? 0x4000 : 0x0;
302 data[2] = 0x2082 | ((value & 0x04) ? 0x0005 : 0x0);
303 data[2] |= (value & 0x02) ? 0x0150 : 0x0;
304 data[2] |= (value & 0x01) ? 0x5400 : 0x0;
305 data[3] = 0xfe1d;
306
307 ret += w9968cf_write_fsb(sd, data);
308
309 if (!ret)
310 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
311 else
312 PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
313
314 return ret;
315 }
316
317 /* SMBus protocol: S Addr Wr [A] Subaddr [A] P S Addr+1 Rd [A] [Value] NA P */
318 static int w9968cf_i2c_r(struct sd *sd, u8 reg)
319 {
320 int ret = 0;
321 u8 value;
322
323 /* Fast serial bus data control disable */
324 ret += w9968cf_write_sb(sd, 0x0013); /* don't change ! */
325
326 ret += w9968cf_smbus_start(sd);
327 ret += w9968cf_smbus_write_byte(sd, sd->sensor_addr);
328 ret += w9968cf_smbus_read_ack(sd);
329 ret += w9968cf_smbus_write_byte(sd, reg);
330 ret += w9968cf_smbus_read_ack(sd);
331 ret += w9968cf_smbus_stop(sd);
332 ret += w9968cf_smbus_start(sd);
333 ret += w9968cf_smbus_write_byte(sd, sd->sensor_addr + 1);
334 ret += w9968cf_smbus_read_ack(sd);
335 ret += w9968cf_smbus_read_byte(sd, &value);
336 /* signal we don't want to read anymore, the v4l1 driver used to
337 send an ack here which is very wrong! (and then fixed
338 the issues this gave by retrying reads) */
339 ret += w9968cf_smbus_write_nack(sd);
340 ret += w9968cf_smbus_stop(sd);
341
342 /* Fast serial bus data control re-enable */
343 ret += w9968cf_write_sb(sd, 0x0030);
344
345 if (!ret) {
346 ret = value;
347 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
348 } else
349 PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
350
351 return ret;
352 }
353
354
355 /*--------------------------------------------------------------------------
356 Turn on the LED on some webcams. A beep should be heard too.
357 Return 0 on success, a negative number otherwise.
358 --------------------------------------------------------------------------*/
359 static int w9968cf_configure(struct sd *sd)
360 {
361 int ret = 0;
362
363 ret += reg_w(sd, 0x00, 0xff00); /* power-down */
364 ret += reg_w(sd, 0x00, 0xbf17); /* reset everything */
365 ret += reg_w(sd, 0x00, 0xbf10); /* normal operation */
366 ret += reg_w(sd, 0x01, 0x0010); /* serial bus, SDS high */
367 ret += reg_w(sd, 0x01, 0x0000); /* serial bus, SDS low */
368 ret += reg_w(sd, 0x01, 0x0010); /* ..high 'beep-beep' */
369 ret += reg_w(sd, 0x01, 0x0030); /* Set sda scl to FSB mode */
370
371 if (ret)
372 PDEBUG(D_ERR, "Couldn't turn on the LED");
373
374 sd->stopped = 1;
375
376 return ret;
377 }
378
379 static int w9968cf_init(struct sd *sd)
380 {
381 int ret = 0;
382 unsigned long hw_bufsize = sd->sif ? (352 * 288 * 2) : (640 * 480 * 2),
383 y0 = 0x0000,
384 u0 = y0 + hw_bufsize/2,
385 v0 = u0 + hw_bufsize/4,
386 y1 = v0 + hw_bufsize/4,
387 u1 = y1 + hw_bufsize/2,
388 v1 = u1 + hw_bufsize/4;
389
390 ret += reg_w(sd, 0x00, 0xff00); /* power off */
391 ret += reg_w(sd, 0x00, 0xbf10); /* power on */
392
393 ret += reg_w(sd, 0x03, 0x405d); /* DRAM timings */
394 ret += reg_w(sd, 0x04, 0x0030); /* SDRAM timings */
395
396 ret += reg_w(sd, 0x20, y0 & 0xffff); /* Y buf.0, low */
397 ret += reg_w(sd, 0x21, y0 >> 16); /* Y buf.0, high */
398 ret += reg_w(sd, 0x24, u0 & 0xffff); /* U buf.0, low */
399 ret += reg_w(sd, 0x25, u0 >> 16); /* U buf.0, high */
400 ret += reg_w(sd, 0x28, v0 & 0xffff); /* V buf.0, low */
401 ret += reg_w(sd, 0x29, v0 >> 16); /* V buf.0, high */
402
403 ret += reg_w(sd, 0x22, y1 & 0xffff); /* Y buf.1, low */
404 ret += reg_w(sd, 0x23, y1 >> 16); /* Y buf.1, high */
405 ret += reg_w(sd, 0x26, u1 & 0xffff); /* U buf.1, low */
406 ret += reg_w(sd, 0x27, u1 >> 16); /* U buf.1, high */
407 ret += reg_w(sd, 0x2a, v1 & 0xffff); /* V buf.1, low */
408 ret += reg_w(sd, 0x2b, v1 >> 16); /* V buf.1, high */
409
410 ret += reg_w(sd, 0x32, y1 & 0xffff); /* JPEG buf 0 low */
411 ret += reg_w(sd, 0x33, y1 >> 16); /* JPEG buf 0 high */
412
413 ret += reg_w(sd, 0x34, y1 & 0xffff); /* JPEG buf 1 low */
414 ret += reg_w(sd, 0x35, y1 >> 16); /* JPEG bug 1 high */
415
416 ret += reg_w(sd, 0x36, 0x0000);/* JPEG restart interval */
417 ret += reg_w(sd, 0x37, 0x0804);/*JPEG VLE FIFO threshold*/
418 ret += reg_w(sd, 0x38, 0x0000);/* disable hw up-scaling */
419 ret += reg_w(sd, 0x3f, 0x0000); /* JPEG/MCTL test data */
420
421 return ret;
422 }
423
424 static int w9968cf_set_crop_window(struct sd *sd)
425 {
426 int ret = 0, start_cropx, start_cropy, x, y, fw, fh, cw, ch,
427 max_width, max_height;
428
429 if (sd->sif) {
430 max_width = 352;
431 max_height = 288;
432 } else {
433 max_width = 640;
434 max_height = 480;
435 }
436
437 if (sd->sensor == SEN_OV7620) {
438 /* Sigh, this is dependend on the clock / framerate changes
439 made by the frequency control, sick. */
440 if (sd->ctrls[FREQ].val == 1) {
441 start_cropx = 277;
442 start_cropy = 37;
443 } else {
444 start_cropx = 105;
445 start_cropy = 37;
446 }
447 } else {
448 start_cropx = 320;
449 start_cropy = 35;
450 }
451
452 /* Work around to avoid FP arithmetics */
453 #define SC(x) ((x) << 10)
454
455 /* Scaling factors */
456 fw = SC(sd->gspca_dev.width) / max_width;
457 fh = SC(sd->gspca_dev.height) / max_height;
458
459 cw = (fw >= fh) ? max_width : SC(sd->gspca_dev.width)/fh;
460 ch = (fw >= fh) ? SC(sd->gspca_dev.height)/fw : max_height;
461
462 sd->sensor_width = max_width;
463 sd->sensor_height = max_height;
464
465 x = (max_width - cw) / 2;
466 y = (max_height - ch) / 2;
467
468 ret += reg_w(sd, 0x10, start_cropx + x);
469 ret += reg_w(sd, 0x11, start_cropy + y);
470 ret += reg_w(sd, 0x12, start_cropx + x + cw);
471 ret += reg_w(sd, 0x13, start_cropy + y + ch);
472
473 return ret;
474 }
475
476 static int w9968cf_mode_init_regs(struct sd *sd)
477 {
478 int ret = 0, val, vs_polarity, hs_polarity;
479
480 ret += w9968cf_set_crop_window(sd);
481
482 ret += reg_w(sd, 0x14, sd->gspca_dev.width);
483 ret += reg_w(sd, 0x15, sd->gspca_dev.height);
484
485 /* JPEG width & height */
486 ret += reg_w(sd, 0x30, sd->gspca_dev.width);
487 ret += reg_w(sd, 0x31, sd->gspca_dev.height);
488
489 /* Y & UV frame buffer strides (in WORD) */
490 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
491 V4L2_PIX_FMT_JPEG) {
492 ret += reg_w(sd, 0x2c, sd->gspca_dev.width/2);
493 ret += reg_w(sd, 0x2d, sd->gspca_dev.width/4);
494 } else
495 ret += reg_w(sd, 0x2c, sd->gspca_dev.width);
496
497 ret += reg_w(sd, 0x00, 0xbf17); /* reset everything */
498 ret += reg_w(sd, 0x00, 0xbf10); /* normal operation */
499
500 /* Transfer size in WORDS (for UYVY format only) */
501 val = sd->gspca_dev.width * sd->gspca_dev.height;
502 ret += reg_w(sd, 0x3d, val & 0xffff); /* low bits */
503 ret += reg_w(sd, 0x3e, val >> 16); /* high bits */
504
505 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
506 V4L2_PIX_FMT_JPEG) {
507 /* We may get called multiple times (usb isoc bw negotiat.) */
508 jpeg_define(sd->jpeg_hdr, sd->gspca_dev.height,
509 sd->gspca_dev.width, 0x22); /* JPEG 420 */
510 jpeg_set_qual(sd->jpeg_hdr, sd->quality);
511 ret += w9968cf_upload_quantizationtables(sd);
512 }
513
514 /* Video Capture Control Register */
515 if (sd->sensor == SEN_OV7620) {
516 /* Seems to work around a bug in the image sensor */
517 vs_polarity = 1;
518 hs_polarity = 1;
519 } else {
520 vs_polarity = 1;
521 hs_polarity = 0;
522 }
523
524 val = (vs_polarity << 12) | (hs_polarity << 11);
525
526 /* NOTE: We may not have enough memory to do double buffering while
527 doing compression (amount of memory differs per model cam).
528 So we use the second image buffer also as jpeg stream buffer
529 (see w9968cf_init), and disable double buffering. */
530 if (w9968cf_vga_mode[sd->gspca_dev.curr_mode].pixelformat ==
531 V4L2_PIX_FMT_JPEG) {
532 /* val |= 0x0002; YUV422P */
533 val |= 0x0003; /* YUV420P */
534 } else
535 val |= 0x0080; /* Enable HW double buffering */
536
537 /* val |= 0x0020; enable clamping */
538 /* val |= 0x0008; enable (1-2-1) filter */
539 /* val |= 0x000c; enable (2-3-6-3-2) filter */
540
541 val |= 0x8000; /* capt. enable */
542
543 ret += reg_w(sd, 0x16, val);
544
545 sd->gspca_dev.empty_packet = 0;
546
547 return ret;
548 }
549
550 static void w9968cf_stop0(struct sd *sd)
551 {
552 if (sd->gspca_dev.present) {
553 reg_w(sd, 0x39, 0x0000); /* disable JPEG encoder */
554 reg_w(sd, 0x16, 0x0000); /* stop video capture */
555 }
556 }
557
558 /* The w9968cf docs say that a 0 sized packet means EOF (and also SOF
559 for the next frame). This seems to simply not be true when operating
560 in JPEG mode, in this case there may be empty packets within the
561 frame. So in JPEG mode use the JPEG SOI marker to detect SOF.
562
563 Note to make things even more interesting the w9968cf sends *PLANAR* jpeg,
564 to be precise it sends: SOI, SOF, DRI, SOS, Y-data, SOS, U-data, SOS,
565 V-data, EOI. */
566 static void w9968cf_pkt_scan(struct gspca_dev *gspca_dev,
567 u8 *data, /* isoc packet */
568 int len) /* iso packet length */
569 {
570 struct sd *sd = (struct sd *) gspca_dev;
571
572 if (w9968cf_vga_mode[gspca_dev->curr_mode].pixelformat ==
573 V4L2_PIX_FMT_JPEG) {
574 if (len >= 2 &&
575 data[0] == 0xff &&
576 data[1] == 0xd8) {
577 gspca_frame_add(gspca_dev, LAST_PACKET,
578 NULL, 0);
579 gspca_frame_add(gspca_dev, FIRST_PACKET,
580 sd->jpeg_hdr, JPEG_HDR_SZ);
581 /* Strip the ff d8, our own header (which adds
582 huffman and quantization tables) already has this */
583 len -= 2;
584 data += 2;
585 }
586 } else {
587 /* In UYVY mode an empty packet signals EOF */
588 if (gspca_dev->empty_packet) {
589 gspca_frame_add(gspca_dev, LAST_PACKET,
590 NULL, 0);
591 gspca_frame_add(gspca_dev, FIRST_PACKET,
592 NULL, 0);
593 gspca_dev->empty_packet = 0;
594 }
595 }
596 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
597 }
Linux with added FPC-III support