include/media/saa7115.h

   1 /*
   2     saa7115.h - definition for saa7111/3/4/5 inputs and frequency flags
   3
   4     Copyright (C) 2006 Hans Verkuil (hverkuil@xs4all.nl)
   5
   6     This program is free software; you can redistribute it and/or modify
   7     it under the terms of the GNU General Public License as published by
   8     the Free Software Foundation; either version 2 of the License, or
   9     (at your option) any later version.
  10
  11     This program is distributed in the hope that it will be useful,
  12     but WITHOUT ANY WARRANTY; without even the implied warranty of
  13     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14     GNU General Public License for more details.
  15
  16     You should have received a copy of the GNU General Public License
  17     along with this program; if not, write to the Free Software
  18     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19 */
  20
  21 #ifndef _SAA7115_H_
  22 #define _SAA7115_H_
  23
  24 /* s_routing inputs, outputs, and config */
  25
  26 /* SAA7111/3/4/5 HW inputs */
  27 #define SAA7115_COMPOSITE0 0
  28 #define SAA7115_COMPOSITE1 1
  29 #define SAA7115_COMPOSITE2 2
  30 #define SAA7115_COMPOSITE3 3
  31 #define SAA7115_COMPOSITE4 4 /* not available for the saa7111/3 */
  32 #define SAA7115_COMPOSITE5 5 /* not available for the saa7111/3 */
  33 #define SAA7115_SVIDEO0    6
  34 #define SAA7115_SVIDEO1    7
  35 #define SAA7115_SVIDEO2    8
  36 #define SAA7115_SVIDEO3    9
  37
  38 /* outputs */
  39 #define SAA7115_IPORT_ON        1
  40 #define SAA7115_IPORT_OFF       0
  41
  42 /* SAA7111 specific outputs. */
  43 #define SAA7111_VBI_BYPASS      2
  44 #define SAA7111_FMT_YUV422      0x00
  45 #define SAA7111_FMT_RGB         0x40
  46 #define SAA7111_FMT_CCIR        0x80
  47 #define SAA7111_FMT_YUV411      0xc0
  48
  49 /* config flags */
  50 /* Register 0x85 should set bit 0 to 0 (it's 1 by default). This bit
  51  * controls the IDQ signal polarity which is set to 'inverted' if the bit
  52  * it 1 and to 'default' if it is 0. */
  53 #define SAA7115_IDQ_IS_DEFAULT  (1 << 0)
  54
  55 /* s_crystal_freq values and flags */
  56
  57 /* SAA7115 v4l2_crystal_freq frequency values */
  58 #define SAA7115_FREQ_32_11_MHZ  32110000   /* 32.11 MHz crystal, SAA7114/5 only */
  59 #define SAA7115_FREQ_24_576_MHZ 24576000   /* 24.576 MHz crystal */
  60
  61 /* SAA7115 v4l2_crystal_freq audio clock control flags */
  62 #define SAA7115_FREQ_FL_UCGC         (1 << 0) /* SA 3A[7], UCGC, SAA7115 only */
  63 #define SAA7115_FREQ_FL_CGCDIV       (1 << 1) /* SA 3A[6], CGCDIV, SAA7115 only */
  64 #define SAA7115_FREQ_FL_APLL         (1 << 2) /* SA 3A[3], APLL, SAA7114/5 only */
  65 #define SAA7115_FREQ_FL_DOUBLE_ASCLK (1 << 3) /* SA 39, LRDIV, SAA7114/5 only */
  66
  67 #endif
  68