drm/i915: Initialize return value for empty i915_gem_object_unbind()
[linux/fpc-iii.git] / arch / arm / mach-s3c24xx / cpufreq-utils.c
blobd4d9514335f497b8a6b845e2aa2048caddb9e2a0
1 /*
2 * Copyright (c) 2009 Simtec Electronics
3 * http://armlinux.simtec.co.uk/
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/errno.h>
15 #include <linux/cpufreq.h>
16 #include <linux/io.h>
17 #include <linux/clk.h>
19 #include <mach/map.h>
20 #include <mach/regs-clock.h>
22 #include <plat/cpu-freq-core.h>
24 #include "regs-mem.h"
26 /**
27 * s3c2410_cpufreq_setrefresh - set SDRAM refresh value
28 * @cfg: The frequency configuration
30 * Set the SDRAM refresh value appropriately for the configured
31 * frequency.
33 void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg)
35 struct s3c_cpufreq_board *board = cfg->board;
36 unsigned long refresh;
37 unsigned long refval;
39 /* Reduce both the refresh time (in ns) and the frequency (in MHz)
40 * down to ensure that we do not overflow 32 bit numbers.
42 * This should work for HCLK up to 133MHz and refresh period up
43 * to 30usec.
46 refresh = (cfg->freq.hclk / 100) * (board->refresh / 10);
47 refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */
48 refresh = (1 << 11) + 1 - refresh;
50 s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh);
52 refval = __raw_readl(S3C2410_REFRESH);
53 refval &= ~((1 << 12) - 1);
54 refval |= refresh;
55 __raw_writel(refval, S3C2410_REFRESH);
58 /**
59 * s3c2410_set_fvco - set the PLL value
60 * @cfg: The frequency configuration
62 void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg)
64 if (!IS_ERR(cfg->mpll))
65 clk_set_rate(cfg->mpll, cfg->pll.frequency);