2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
33 #define DRIVER_AUTHOR "Sarah Sharp"
34 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
36 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
37 static int link_quirk
;
38 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
39 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
41 /* TODO: copied from ehci-hcd.c - can this be refactored? */
43 * handshake - spin reading hc until handshake completes or fails
44 * @ptr: address of hc register to be read
45 * @mask: bits to look at in result of read
46 * @done: value of those bits when handshake succeeds
47 * @usec: timeout in microseconds
49 * Returns negative errno, or zero on success
51 * Success happens when the "mask" bits have the specified value (hardware
52 * handshake done). There are two failure modes: "usec" have passed (major
53 * hardware flakeout), or the register reads as all-ones (hardware removed).
55 int handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
56 u32 mask
, u32 done
, int usec
)
61 result
= xhci_readl(xhci
, ptr
);
62 if (result
== ~(u32
)0) /* card removed */
74 * Disable interrupts and begin the xHCI halting process.
76 void xhci_quiesce(struct xhci_hcd
*xhci
)
83 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
87 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
89 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
93 * Force HC into halt state.
95 * Disable any IRQs and clear the run/stop bit.
96 * HC will complete any current and actively pipelined transactions, and
97 * should halt within 16 ms of the run/stop bit being cleared.
98 * Read HC Halted bit in the status register to see when the HC is finished.
100 int xhci_halt(struct xhci_hcd
*xhci
)
103 xhci_dbg(xhci
, "// Halt the HC\n");
106 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
107 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
109 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
110 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
112 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
118 * Set the run bit and wait for the host to be running.
120 static int xhci_start(struct xhci_hcd
*xhci
)
125 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
127 xhci_dbg(xhci
, "// Turn on HC, cmd = 0x%x.\n",
129 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
132 * Wait for the HCHalted Status bit to be 0 to indicate the host is
135 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
136 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
137 if (ret
== -ETIMEDOUT
)
138 xhci_err(xhci
, "Host took too long to start, "
139 "waited %u microseconds.\n",
142 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
149 * This resets pipelines, timers, counters, state machines, etc.
150 * Transactions will be terminated immediately, and operational registers
151 * will be set to their defaults.
153 int xhci_reset(struct xhci_hcd
*xhci
)
159 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
160 if ((state
& STS_HALT
) == 0) {
161 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
165 xhci_dbg(xhci
, "// Reset the HC\n");
166 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
167 command
|= CMD_RESET
;
168 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
170 ret
= handshake(xhci
, &xhci
->op_regs
->command
,
171 CMD_RESET
, 0, 10 * 1000 * 1000);
175 xhci_dbg(xhci
, "Wait for controller to be ready for doorbell rings\n");
177 * xHCI cannot write to any doorbells or operational registers other
178 * than status until the "Controller Not Ready" flag is cleared.
180 ret
= handshake(xhci
, &xhci
->op_regs
->status
,
181 STS_CNR
, 0, 10 * 1000 * 1000);
183 for (i
= 0; i
< 2; ++i
) {
184 xhci
->bus_state
[i
].port_c_suspend
= 0;
185 xhci
->bus_state
[i
].suspended_ports
= 0;
186 xhci
->bus_state
[i
].resuming_ports
= 0;
193 static int xhci_free_msi(struct xhci_hcd
*xhci
)
197 if (!xhci
->msix_entries
)
200 for (i
= 0; i
< xhci
->msix_count
; i
++)
201 if (xhci
->msix_entries
[i
].vector
)
202 free_irq(xhci
->msix_entries
[i
].vector
,
210 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
213 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
215 ret
= pci_enable_msi(pdev
);
217 xhci_dbg(xhci
, "failed to allocate MSI entry\n");
221 ret
= request_irq(pdev
->irq
, (irq_handler_t
)xhci_msi_irq
,
222 0, "xhci_hcd", xhci_to_hcd(xhci
));
224 xhci_dbg(xhci
, "disable MSI interrupt\n");
225 pci_disable_msi(pdev
);
233 * free all IRQs request
235 static void xhci_free_irq(struct xhci_hcd
*xhci
)
237 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
240 /* return if using legacy interrupt */
241 if (xhci_to_hcd(xhci
)->irq
> 0)
244 ret
= xhci_free_msi(xhci
);
248 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
256 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
259 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
260 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
263 * calculate number of msi-x vectors supported.
264 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
265 * with max number of interrupters based on the xhci HCSPARAMS1.
266 * - num_online_cpus: maximum msi-x vectors per CPUs core.
267 * Add additional 1 vector to ensure always available interrupt.
269 xhci
->msix_count
= min(num_online_cpus() + 1,
270 HCS_MAX_INTRS(xhci
->hcs_params1
));
273 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
275 if (!xhci
->msix_entries
) {
276 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
280 for (i
= 0; i
< xhci
->msix_count
; i
++) {
281 xhci
->msix_entries
[i
].entry
= i
;
282 xhci
->msix_entries
[i
].vector
= 0;
285 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
287 xhci_dbg(xhci
, "Failed to enable MSI-X\n");
291 for (i
= 0; i
< xhci
->msix_count
; i
++) {
292 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
293 (irq_handler_t
)xhci_msi_irq
,
294 0, "xhci_hcd", xhci_to_hcd(xhci
));
299 hcd
->msix_enabled
= 1;
303 xhci_dbg(xhci
, "disable MSI-X interrupt\n");
305 pci_disable_msix(pdev
);
307 kfree(xhci
->msix_entries
);
308 xhci
->msix_entries
= NULL
;
312 /* Free any IRQs and disable MSI-X */
313 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
315 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
316 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
320 if (xhci
->msix_entries
) {
321 pci_disable_msix(pdev
);
322 kfree(xhci
->msix_entries
);
323 xhci
->msix_entries
= NULL
;
325 pci_disable_msi(pdev
);
328 hcd
->msix_enabled
= 0;
332 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
336 if (xhci
->msix_entries
) {
337 for (i
= 0; i
< xhci
->msix_count
; i
++)
338 synchronize_irq(xhci
->msix_entries
[i
].vector
);
342 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
344 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
345 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
349 * Some Fresco Logic host controllers advertise MSI, but fail to
350 * generate interrupts. Don't even try to enable MSI.
352 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
355 /* unregister the legacy interrupt */
357 free_irq(hcd
->irq
, hcd
);
360 ret
= xhci_setup_msix(xhci
);
362 /* fall back to msi*/
363 ret
= xhci_setup_msi(xhci
);
366 /* hcd->irq is 0, we have MSI */
370 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
374 /* fall back to legacy interrupt*/
375 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
376 hcd
->irq_descr
, hcd
);
378 xhci_err(xhci
, "request interrupt %d failed\n",
382 hcd
->irq
= pdev
->irq
;
388 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
393 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
397 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
403 static void compliance_mode_recovery(unsigned long arg
)
405 struct xhci_hcd
*xhci
;
410 xhci
= (struct xhci_hcd
*)arg
;
412 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
413 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
414 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
416 * Compliance Mode Detected. Letting USB Core
417 * handle the Warm Reset
419 xhci_dbg(xhci
, "Compliance Mode Detected->Port %d!\n",
421 xhci_dbg(xhci
, "Attempting Recovery routine!\n");
422 hcd
= xhci
->shared_hcd
;
424 if (hcd
->state
== HC_STATE_SUSPENDED
)
425 usb_hcd_resume_root_hub(hcd
);
427 usb_hcd_poll_rh_status(hcd
);
431 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
432 mod_timer(&xhci
->comp_mode_recovery_timer
,
433 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
437 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
438 * that causes ports behind that hardware to enter compliance mode sometimes.
439 * The quirk creates a timer that polls every 2 seconds the link state of
440 * each host controller's port and recovers it by issuing a Warm reset
441 * if Compliance mode is detected, otherwise the port will become "dead" (no
442 * device connections or disconnections will be detected anymore). Becasue no
443 * status event is generated when entering compliance mode (per xhci spec),
444 * this quirk is needed on systems that have the failing hardware installed.
446 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
448 xhci
->port_status_u0
= 0;
449 init_timer(&xhci
->comp_mode_recovery_timer
);
451 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
452 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
453 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
454 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
456 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
457 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
458 add_timer(&xhci
->comp_mode_recovery_timer
);
459 xhci_dbg(xhci
, "Compliance Mode Recovery Timer Initialized.\n");
463 * This function identifies the systems that have installed the SN65LVPE502CP
464 * USB3.0 re-driver and that need the Compliance Mode Quirk.
466 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
468 static bool compliance_mode_recovery_timer_quirk_check(void)
470 const char *dmi_product_name
, *dmi_sys_vendor
;
472 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
473 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
474 if (!dmi_product_name
|| !dmi_sys_vendor
)
477 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
480 if (strstr(dmi_product_name
, "Z420") ||
481 strstr(dmi_product_name
, "Z620") ||
482 strstr(dmi_product_name
, "Z820") ||
483 strstr(dmi_product_name
, "Z1 Workstation"))
489 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
491 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
496 * Initialize memory for HCD and xHC (one-time init).
498 * Program the PAGESIZE register, initialize the device context array, create
499 * device contexts (?), set up a command ring segment (or two?), create event
500 * ring (one for now).
502 int xhci_init(struct usb_hcd
*hcd
)
504 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
507 xhci_dbg(xhci
, "xhci_init\n");
508 spin_lock_init(&xhci
->lock
);
509 if (xhci
->hci_version
== 0x95 && link_quirk
) {
510 xhci_dbg(xhci
, "QUIRK: Not clearing Link TRB chain bits.\n");
511 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
513 xhci_dbg(xhci
, "xHCI doesn't need link TRB QUIRK\n");
515 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
516 xhci_dbg(xhci
, "Finished xhci_init\n");
518 /* Initializing Compliance Mode Recovery Data If Needed */
519 if (compliance_mode_recovery_timer_quirk_check()) {
520 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
521 compliance_mode_recovery_timer_init(xhci
);
527 /*-------------------------------------------------------------------------*/
530 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
531 static void xhci_event_ring_work(unsigned long arg
)
536 struct xhci_hcd
*xhci
= (struct xhci_hcd
*) arg
;
539 xhci_dbg(xhci
, "Poll event ring: %lu\n", jiffies
);
541 spin_lock_irqsave(&xhci
->lock
, flags
);
542 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
543 xhci_dbg(xhci
, "op reg status = 0x%x\n", temp
);
544 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
545 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
546 xhci_dbg(xhci
, "HW died, polling stopped.\n");
547 spin_unlock_irqrestore(&xhci
->lock
, flags
);
551 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
552 xhci_dbg(xhci
, "ir_set 0 pending = 0x%x\n", temp
);
553 xhci_dbg(xhci
, "HC error bitmask = 0x%x\n", xhci
->error_bitmask
);
554 xhci
->error_bitmask
= 0;
555 xhci_dbg(xhci
, "Event ring:\n");
556 xhci_debug_segment(xhci
, xhci
->event_ring
->deq_seg
);
557 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
558 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
559 temp_64
&= ~ERST_PTR_MASK
;
560 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
561 xhci_dbg(xhci
, "Command ring:\n");
562 xhci_debug_segment(xhci
, xhci
->cmd_ring
->deq_seg
);
563 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
564 xhci_dbg_cmd_ptrs(xhci
);
565 for (i
= 0; i
< MAX_HC_SLOTS
; ++i
) {
568 for (j
= 0; j
< 31; ++j
) {
569 xhci_dbg_ep_rings(xhci
, i
, j
, &xhci
->devs
[i
]->eps
[j
]);
572 spin_unlock_irqrestore(&xhci
->lock
, flags
);
575 mod_timer(&xhci
->event_ring_timer
, jiffies
+ POLL_TIMEOUT
* HZ
);
577 xhci_dbg(xhci
, "Quit polling the event ring.\n");
581 static int xhci_run_finished(struct xhci_hcd
*xhci
)
583 if (xhci_start(xhci
)) {
587 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
588 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
590 if (xhci
->quirks
& XHCI_NEC_HOST
)
591 xhci_ring_cmd_db(xhci
);
593 xhci_dbg(xhci
, "Finished xhci_run for USB3 roothub\n");
598 * Start the HC after it was halted.
600 * This function is called by the USB core when the HC driver is added.
601 * Its opposite is xhci_stop().
603 * xhci_init() must be called once before this function can be called.
604 * Reset the HC, enable device slot contexts, program DCBAAP, and
605 * set command ring pointer and event ring pointer.
607 * Setup MSI-X vectors and enable interrupts.
609 int xhci_run(struct usb_hcd
*hcd
)
614 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
616 /* Start the xHCI host controller running only after the USB 2.0 roothub
620 hcd
->uses_new_polling
= 1;
621 if (!usb_hcd_is_primary_hcd(hcd
))
622 return xhci_run_finished(xhci
);
624 xhci_dbg(xhci
, "xhci_run\n");
626 ret
= xhci_try_enable_msi(hcd
);
630 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
631 init_timer(&xhci
->event_ring_timer
);
632 xhci
->event_ring_timer
.data
= (unsigned long) xhci
;
633 xhci
->event_ring_timer
.function
= xhci_event_ring_work
;
634 /* Poll the event ring */
635 xhci
->event_ring_timer
.expires
= jiffies
+ POLL_TIMEOUT
* HZ
;
637 xhci_dbg(xhci
, "Setting event ring polling timer\n");
638 add_timer(&xhci
->event_ring_timer
);
641 xhci_dbg(xhci
, "Command ring memory map follows:\n");
642 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
643 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
644 xhci_dbg_cmd_ptrs(xhci
);
646 xhci_dbg(xhci
, "ERST memory map follows:\n");
647 xhci_dbg_erst(xhci
, &xhci
->erst
);
648 xhci_dbg(xhci
, "Event ring:\n");
649 xhci_debug_ring(xhci
, xhci
->event_ring
);
650 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
651 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
652 temp_64
&= ~ERST_PTR_MASK
;
653 xhci_dbg(xhci
, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64
);
655 xhci_dbg(xhci
, "// Set the interrupt modulation register\n");
656 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
657 temp
&= ~ER_IRQ_INTERVAL_MASK
;
659 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
661 /* Set the HCD state before we enable the irqs */
662 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
664 xhci_dbg(xhci
, "// Enable interrupts, cmd = 0x%x.\n",
666 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
668 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
669 xhci_dbg(xhci
, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
670 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
671 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
672 &xhci
->ir_set
->irq_pending
);
673 xhci_print_ir_set(xhci
, 0);
675 if (xhci
->quirks
& XHCI_NEC_HOST
)
676 xhci_queue_vendor_command(xhci
, 0, 0, 0,
677 TRB_TYPE(TRB_NEC_GET_FW
));
679 xhci_dbg(xhci
, "Finished xhci_run for USB2 roothub\n");
683 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
685 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
687 spin_lock_irq(&xhci
->lock
);
690 /* The shared_hcd is going to be deallocated shortly (the USB core only
691 * calls this function when allocation fails in usb_add_hcd(), or
692 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
694 xhci
->shared_hcd
= NULL
;
695 spin_unlock_irq(&xhci
->lock
);
701 * This function is called by the USB core when the HC driver is removed.
702 * Its opposite is xhci_run().
704 * Disable device contexts, disable IRQs, and quiesce the HC.
705 * Reset the HC, finish any completed transactions, and cleanup memory.
707 void xhci_stop(struct usb_hcd
*hcd
)
710 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
712 if (!usb_hcd_is_primary_hcd(hcd
)) {
713 xhci_only_stop_hcd(xhci
->shared_hcd
);
717 spin_lock_irq(&xhci
->lock
);
718 /* Make sure the xHC is halted for a USB3 roothub
719 * (xhci_stop() could be called as part of failed init).
723 spin_unlock_irq(&xhci
->lock
);
725 xhci_cleanup_msix(xhci
);
727 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
728 /* Tell the event ring poll function not to reschedule */
730 del_timer_sync(&xhci
->event_ring_timer
);
733 /* Deleting Compliance Mode Recovery Timer */
734 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
735 (!(xhci_all_ports_seen_u0(xhci
))))
736 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
738 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
741 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
742 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
743 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
744 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
745 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
746 &xhci
->ir_set
->irq_pending
);
747 xhci_print_ir_set(xhci
, 0);
749 xhci_dbg(xhci
, "cleaning up memory\n");
750 xhci_mem_cleanup(xhci
);
751 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
752 xhci_readl(xhci
, &xhci
->op_regs
->status
));
756 * Shutdown HC (not bus-specific)
758 * This is called when the machine is rebooting or halting. We assume that the
759 * machine will be powered off, and the HC's internal state will be reset.
760 * Don't bother to free memory.
762 * This will only ever be called with the main usb_hcd (the USB3 roothub).
764 void xhci_shutdown(struct usb_hcd
*hcd
)
766 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
768 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
769 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
771 spin_lock_irq(&xhci
->lock
);
773 spin_unlock_irq(&xhci
->lock
);
775 xhci_cleanup_msix(xhci
);
777 xhci_dbg(xhci
, "xhci_shutdown completed - status = %x\n",
778 xhci_readl(xhci
, &xhci
->op_regs
->status
));
782 static void xhci_save_registers(struct xhci_hcd
*xhci
)
784 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
785 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
786 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
787 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
788 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
789 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
790 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
791 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
792 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
795 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
797 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
798 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
799 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
800 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
801 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
802 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
803 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
804 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
805 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
808 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
812 /* step 2: initialize command ring buffer */
813 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
814 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
815 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
816 xhci
->cmd_ring
->dequeue
) &
817 (u64
) ~CMD_RING_RSVD_BITS
) |
818 xhci
->cmd_ring
->cycle_state
;
819 xhci_dbg(xhci
, "// Setting command ring address to 0x%llx\n",
820 (long unsigned long) val_64
);
821 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
825 * The whole command ring must be cleared to zero when we suspend the host.
827 * The host doesn't save the command ring pointer in the suspend well, so we
828 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
829 * aligned, because of the reserved bits in the command ring dequeue pointer
830 * register. Therefore, we can't just set the dequeue pointer back in the
831 * middle of the ring (TRBs are 16-byte aligned).
833 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
835 struct xhci_ring
*ring
;
836 struct xhci_segment
*seg
;
838 ring
= xhci
->cmd_ring
;
842 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
843 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
844 cpu_to_le32(~TRB_CYCLE
);
846 } while (seg
!= ring
->deq_seg
);
848 /* Reset the software enqueue and dequeue pointers */
849 ring
->deq_seg
= ring
->first_seg
;
850 ring
->dequeue
= ring
->first_seg
->trbs
;
851 ring
->enq_seg
= ring
->deq_seg
;
852 ring
->enqueue
= ring
->dequeue
;
854 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
856 * Ring is now zeroed, so the HW should look for change of ownership
857 * when the cycle bit is set to 1.
859 ring
->cycle_state
= 1;
862 * Reset the hardware dequeue pointer.
863 * Yes, this will need to be re-written after resume, but we're paranoid
864 * and want to make sure the hardware doesn't access bogus memory
865 * because, say, the BIOS or an SMI started the host without changing
866 * the command ring pointers.
868 xhci_set_cmd_ring_deq(xhci
);
872 * Stop HC (not bus-specific)
874 * This is called when the machine transition into S3/S4 mode.
877 int xhci_suspend(struct xhci_hcd
*xhci
)
880 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
883 /* Don't poll the roothubs on bus suspend. */
884 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
885 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
886 del_timer_sync(&hcd
->rh_timer
);
888 spin_lock_irq(&xhci
->lock
);
889 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
890 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
891 /* step 1: stop endpoint */
892 /* skipped assuming that port suspend has done */
894 /* step 2: clear Run/Stop bit */
895 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
897 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
898 if (handshake(xhci
, &xhci
->op_regs
->status
,
899 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
)) {
900 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
901 spin_unlock_irq(&xhci
->lock
);
904 xhci_clear_command_ring(xhci
);
906 /* step 3: save registers */
907 xhci_save_registers(xhci
);
909 /* step 4: set CSS flag */
910 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
912 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
913 if (handshake(xhci
, &xhci
->op_regs
->status
, STS_SAVE
, 0, 10 * 1000)) {
914 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
915 spin_unlock_irq(&xhci
->lock
);
918 spin_unlock_irq(&xhci
->lock
);
921 * Deleting Compliance Mode Recovery Timer because the xHCI Host
922 * is about to be suspended.
924 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
925 (!(xhci_all_ports_seen_u0(xhci
)))) {
926 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
927 xhci_dbg(xhci
, "Compliance Mode Recovery Timer Deleted!\n");
930 /* step 5: remove core well power */
931 /* synchronize irq when using MSI-X */
932 xhci_msix_sync_irqs(xhci
);
938 * start xHC (not bus-specific)
940 * This is called when the machine transition from S3/S4 mode.
943 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
945 u32 command
, temp
= 0;
946 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
947 struct usb_hcd
*secondary_hcd
;
950 /* Wait a bit if either of the roothubs need to settle from the
951 * transition into bus suspend.
953 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
955 xhci
->bus_state
[1].next_statechange
))
958 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
959 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
961 spin_lock_irq(&xhci
->lock
);
962 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
966 /* step 1: restore register */
967 xhci_restore_registers(xhci
);
968 /* step 2: initialize command ring buffer */
969 xhci_set_cmd_ring_deq(xhci
);
970 /* step 3: restore state and start state*/
971 /* step 3: set CRS flag */
972 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
974 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
975 if (handshake(xhci
, &xhci
->op_regs
->status
,
976 STS_RESTORE
, 0, 10 * 1000)) {
977 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
978 spin_unlock_irq(&xhci
->lock
);
981 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
984 /* If restore operation fails, re-initialize the HC during resume */
985 if ((temp
& STS_SRE
) || hibernated
) {
986 /* Let the USB core know _both_ roothubs lost power. */
987 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
988 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
990 xhci_dbg(xhci
, "Stop HCD\n");
993 spin_unlock_irq(&xhci
->lock
);
994 xhci_cleanup_msix(xhci
);
996 #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
997 /* Tell the event ring poll function not to reschedule */
999 del_timer_sync(&xhci
->event_ring_timer
);
1002 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
1003 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1004 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
1005 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
1006 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
1007 &xhci
->ir_set
->irq_pending
);
1008 xhci_print_ir_set(xhci
, 0);
1010 xhci_dbg(xhci
, "cleaning up memory\n");
1011 xhci_mem_cleanup(xhci
);
1012 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
1013 xhci_readl(xhci
, &xhci
->op_regs
->status
));
1015 /* USB core calls the PCI reinit and start functions twice:
1016 * first with the primary HCD, and then with the secondary HCD.
1017 * If we don't do the same, the host will never be started.
1019 if (!usb_hcd_is_primary_hcd(hcd
))
1020 secondary_hcd
= hcd
;
1022 secondary_hcd
= xhci
->shared_hcd
;
1024 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
1025 retval
= xhci_init(hcd
->primary_hcd
);
1028 xhci_dbg(xhci
, "Start the primary HCD\n");
1029 retval
= xhci_run(hcd
->primary_hcd
);
1031 xhci_dbg(xhci
, "Start the secondary HCD\n");
1032 retval
= xhci_run(secondary_hcd
);
1034 hcd
->state
= HC_STATE_SUSPENDED
;
1035 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1039 /* step 4: set Run/Stop bit */
1040 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1042 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1043 handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1046 /* step 5: walk topology and initialize portsc,
1047 * portpmsc and portli
1049 /* this is done in bus_resume */
1051 /* step 6: restart each of the previously
1052 * Running endpoints by ringing their doorbells
1055 spin_unlock_irq(&xhci
->lock
);
1059 usb_hcd_resume_root_hub(hcd
);
1060 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1064 * If system is subject to the Quirk, Compliance Mode Timer needs to
1065 * be re-initialized Always after a system resume. Ports are subject
1066 * to suffer the Compliance Mode issue again. It doesn't matter if
1067 * ports have entered previously to U0 before system's suspension.
1069 if (xhci
->quirks
& XHCI_COMP_MODE_QUIRK
)
1070 compliance_mode_recovery_timer_init(xhci
);
1072 /* Re-enable port polling. */
1073 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1074 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1075 usb_hcd_poll_rh_status(hcd
);
1079 #endif /* CONFIG_PM */
1081 /*-------------------------------------------------------------------------*/
1084 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1085 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1086 * value to right shift 1 for the bitmask.
1088 * Index = (epnum * 2) + direction - 1,
1089 * where direction = 0 for OUT, 1 for IN.
1090 * For control endpoints, the IN index is used (OUT index is unused), so
1091 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1093 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1096 if (usb_endpoint_xfer_control(desc
))
1097 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1099 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1100 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1104 /* Find the flag for this endpoint (for use in the control context). Use the
1105 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1108 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1110 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1113 /* Find the flag for this endpoint (for use in the control context). Use the
1114 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1117 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1119 return 1 << (ep_index
+ 1);
1122 /* Compute the last valid endpoint context index. Basically, this is the
1123 * endpoint index plus one. For slot contexts with more than valid endpoint,
1124 * we find the most significant bit set in the added contexts flags.
1125 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1126 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1128 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1130 return fls(added_ctxs
) - 1;
1133 /* Returns 1 if the arguments are OK;
1134 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1136 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1137 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1139 struct xhci_hcd
*xhci
;
1140 struct xhci_virt_device
*virt_dev
;
1142 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1143 printk(KERN_DEBUG
"xHCI %s called with invalid args\n",
1147 if (!udev
->parent
) {
1148 printk(KERN_DEBUG
"xHCI %s called for root hub\n",
1153 xhci
= hcd_to_xhci(hcd
);
1154 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1157 if (check_virt_dev
) {
1158 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1159 printk(KERN_DEBUG
"xHCI %s called with unaddressed "
1164 virt_dev
= xhci
->devs
[udev
->slot_id
];
1165 if (virt_dev
->udev
!= udev
) {
1166 printk(KERN_DEBUG
"xHCI %s called with udev and "
1167 "virt_dev does not match\n", func
);
1175 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1176 struct usb_device
*udev
, struct xhci_command
*command
,
1177 bool ctx_change
, bool must_succeed
);
1180 * Full speed devices may have a max packet size greater than 8 bytes, but the
1181 * USB core doesn't know that until it reads the first 8 bytes of the
1182 * descriptor. If the usb_device's max packet size changes after that point,
1183 * we need to issue an evaluate context command and wait on it.
1185 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1186 unsigned int ep_index
, struct urb
*urb
)
1188 struct xhci_container_ctx
*in_ctx
;
1189 struct xhci_container_ctx
*out_ctx
;
1190 struct xhci_input_control_ctx
*ctrl_ctx
;
1191 struct xhci_ep_ctx
*ep_ctx
;
1192 int max_packet_size
;
1193 int hw_max_packet_size
;
1196 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1197 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1198 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1199 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1200 if (hw_max_packet_size
!= max_packet_size
) {
1201 xhci_dbg(xhci
, "Max Packet Size for ep 0 changed.\n");
1202 xhci_dbg(xhci
, "Max packet size in usb_device = %d\n",
1204 xhci_dbg(xhci
, "Max packet size in xHCI HW = %d\n",
1205 hw_max_packet_size
);
1206 xhci_dbg(xhci
, "Issuing evaluate context command.\n");
1208 /* Set up the modified control endpoint 0 */
1209 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1210 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1211 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1212 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1213 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1214 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1216 /* Set up the input context flags for the command */
1217 /* FIXME: This won't work if a non-default control endpoint
1218 * changes max packet sizes.
1220 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1221 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1222 ctrl_ctx
->drop_flags
= 0;
1224 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1225 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1226 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1227 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1229 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1232 /* Clean up the input context for later use by bandwidth
1235 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1241 * non-error returns are a promise to giveback() the urb later
1242 * we drop ownership so next owner (or urb unlink) can get it
1244 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1246 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1247 struct xhci_td
*buffer
;
1248 unsigned long flags
;
1250 unsigned int slot_id
, ep_index
;
1251 struct urb_priv
*urb_priv
;
1254 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1255 true, true, __func__
) <= 0)
1258 slot_id
= urb
->dev
->slot_id
;
1259 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1261 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1262 if (!in_interrupt())
1263 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1268 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1269 size
= urb
->number_of_packets
;
1273 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1274 size
* sizeof(struct xhci_td
*), mem_flags
);
1278 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1284 for (i
= 0; i
< size
; i
++) {
1285 urb_priv
->td
[i
] = buffer
;
1289 urb_priv
->length
= size
;
1290 urb_priv
->td_cnt
= 0;
1291 urb
->hcpriv
= urb_priv
;
1293 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1294 /* Check to see if the max packet size for the default control
1295 * endpoint changed during FS device enumeration
1297 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1298 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1301 xhci_urb_free_priv(xhci
, urb_priv
);
1307 /* We have a spinlock and interrupts disabled, so we must pass
1308 * atomic context to this function, which may allocate memory.
1310 spin_lock_irqsave(&xhci
->lock
, flags
);
1311 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1313 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1317 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1318 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1319 spin_lock_irqsave(&xhci
->lock
, flags
);
1320 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1322 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1323 EP_GETTING_STREAMS
) {
1324 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1325 "is transitioning to using streams.\n");
1327 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1328 EP_GETTING_NO_STREAMS
) {
1329 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1330 "is transitioning to "
1331 "not having streams.\n");
1334 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1339 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1340 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1341 spin_lock_irqsave(&xhci
->lock
, flags
);
1342 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1344 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1348 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1350 spin_lock_irqsave(&xhci
->lock
, flags
);
1351 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1353 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1357 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1362 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1363 "non-responsive xHCI host.\n",
1364 urb
->ep
->desc
.bEndpointAddress
, urb
);
1367 xhci_urb_free_priv(xhci
, urb_priv
);
1369 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1373 /* Get the right ring for the given URB.
1374 * If the endpoint supports streams, boundary check the URB's stream ID.
1375 * If the endpoint doesn't support streams, return the singular endpoint ring.
1377 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1380 unsigned int slot_id
;
1381 unsigned int ep_index
;
1382 unsigned int stream_id
;
1383 struct xhci_virt_ep
*ep
;
1385 slot_id
= urb
->dev
->slot_id
;
1386 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1387 stream_id
= urb
->stream_id
;
1388 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1389 /* Common case: no streams */
1390 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1393 if (stream_id
== 0) {
1395 "WARN: Slot ID %u, ep index %u has streams, "
1396 "but URB has no stream ID.\n",
1401 if (stream_id
< ep
->stream_info
->num_streams
)
1402 return ep
->stream_info
->stream_rings
[stream_id
];
1405 "WARN: Slot ID %u, ep index %u has "
1406 "stream IDs 1 to %u allocated, "
1407 "but stream ID %u is requested.\n",
1409 ep
->stream_info
->num_streams
- 1,
1415 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1416 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1417 * should pick up where it left off in the TD, unless a Set Transfer Ring
1418 * Dequeue Pointer is issued.
1420 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1421 * the ring. Since the ring is a contiguous structure, they can't be physically
1422 * removed. Instead, there are two options:
1424 * 1) If the HC is in the middle of processing the URB to be canceled, we
1425 * simply move the ring's dequeue pointer past those TRBs using the Set
1426 * Transfer Ring Dequeue Pointer command. This will be the common case,
1427 * when drivers timeout on the last submitted URB and attempt to cancel.
1429 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1430 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1431 * HC will need to invalidate the any TRBs it has cached after the stop
1432 * endpoint command, as noted in the xHCI 0.95 errata.
1434 * 3) The TD may have completed by the time the Stop Endpoint Command
1435 * completes, so software needs to handle that case too.
1437 * This function should protect against the TD enqueueing code ringing the
1438 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1439 * It also needs to account for multiple cancellations on happening at the same
1440 * time for the same endpoint.
1442 * Note that this function can be called in any context, or so says
1443 * usb_hcd_unlink_urb()
1445 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1447 unsigned long flags
;
1450 struct xhci_hcd
*xhci
;
1451 struct urb_priv
*urb_priv
;
1453 unsigned int ep_index
;
1454 struct xhci_ring
*ep_ring
;
1455 struct xhci_virt_ep
*ep
;
1457 xhci
= hcd_to_xhci(hcd
);
1458 spin_lock_irqsave(&xhci
->lock
, flags
);
1459 /* Make sure the URB hasn't completed or been unlinked already */
1460 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1461 if (ret
|| !urb
->hcpriv
)
1463 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1464 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1465 xhci_dbg(xhci
, "HW died, freeing TD.\n");
1466 urb_priv
= urb
->hcpriv
;
1467 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1468 td
= urb_priv
->td
[i
];
1469 if (!list_empty(&td
->td_list
))
1470 list_del_init(&td
->td_list
);
1471 if (!list_empty(&td
->cancelled_td_list
))
1472 list_del_init(&td
->cancelled_td_list
);
1475 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1476 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1477 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1478 xhci_urb_free_priv(xhci
, urb_priv
);
1481 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1482 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1483 xhci_dbg(xhci
, "Ep 0x%x: URB %p to be canceled on "
1484 "non-responsive xHCI host.\n",
1485 urb
->ep
->desc
.bEndpointAddress
, urb
);
1486 /* Let the stop endpoint command watchdog timer (which set this
1487 * state) finish cleaning up the endpoint TD lists. We must
1488 * have caught it in the middle of dropping a lock and giving
1494 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1495 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1496 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1502 urb_priv
= urb
->hcpriv
;
1503 i
= urb_priv
->td_cnt
;
1504 if (i
< urb_priv
->length
)
1505 xhci_dbg(xhci
, "Cancel URB %p, dev %s, ep 0x%x, "
1506 "starting at offset 0x%llx\n",
1507 urb
, urb
->dev
->devpath
,
1508 urb
->ep
->desc
.bEndpointAddress
,
1509 (unsigned long long) xhci_trb_virt_to_dma(
1510 urb_priv
->td
[i
]->start_seg
,
1511 urb_priv
->td
[i
]->first_trb
));
1513 for (; i
< urb_priv
->length
; i
++) {
1514 td
= urb_priv
->td
[i
];
1515 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1518 /* Queue a stop endpoint command, but only if this is
1519 * the first cancellation to be handled.
1521 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1522 ep
->ep_state
|= EP_HALT_PENDING
;
1523 ep
->stop_cmds_pending
++;
1524 ep
->stop_cmd_timer
.expires
= jiffies
+
1525 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1526 add_timer(&ep
->stop_cmd_timer
);
1527 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1528 xhci_ring_cmd_db(xhci
);
1531 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1535 /* Drop an endpoint from a new bandwidth configuration for this device.
1536 * Only one call to this function is allowed per endpoint before
1537 * check_bandwidth() or reset_bandwidth() must be called.
1538 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1539 * add the endpoint to the schedule with possibly new parameters denoted by a
1540 * different endpoint descriptor in usb_host_endpoint.
1541 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1544 * The USB core will not allow URBs to be queued to an endpoint that is being
1545 * disabled, so there's no need for mutual exclusion to protect
1546 * the xhci->devs[slot_id] structure.
1548 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1549 struct usb_host_endpoint
*ep
)
1551 struct xhci_hcd
*xhci
;
1552 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1553 struct xhci_input_control_ctx
*ctrl_ctx
;
1554 struct xhci_slot_ctx
*slot_ctx
;
1555 unsigned int last_ctx
;
1556 unsigned int ep_index
;
1557 struct xhci_ep_ctx
*ep_ctx
;
1559 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1562 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1565 xhci
= hcd_to_xhci(hcd
);
1566 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1569 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1570 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1571 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1572 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1573 __func__
, drop_flag
);
1577 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1578 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1579 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1580 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1581 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1582 /* If the HC already knows the endpoint is disabled,
1583 * or the HCD has noted it is disabled, ignore this request
1585 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1586 cpu_to_le32(EP_STATE_DISABLED
)) ||
1587 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1588 xhci_get_endpoint_flag(&ep
->desc
)) {
1589 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1594 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1595 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1597 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1598 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1600 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1601 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1602 /* Update the last valid endpoint context, if we deleted the last one */
1603 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1604 LAST_CTX(last_ctx
)) {
1605 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1606 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1608 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1610 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1612 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1613 (unsigned int) ep
->desc
.bEndpointAddress
,
1615 (unsigned int) new_drop_flags
,
1616 (unsigned int) new_add_flags
,
1617 (unsigned int) new_slot_info
);
1621 /* Add an endpoint to a new possible bandwidth configuration for this device.
1622 * Only one call to this function is allowed per endpoint before
1623 * check_bandwidth() or reset_bandwidth() must be called.
1624 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1625 * add the endpoint to the schedule with possibly new parameters denoted by a
1626 * different endpoint descriptor in usb_host_endpoint.
1627 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1630 * The USB core will not allow URBs to be queued to an endpoint until the
1631 * configuration or alt setting is installed in the device, so there's no need
1632 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1634 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1635 struct usb_host_endpoint
*ep
)
1637 struct xhci_hcd
*xhci
;
1638 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1639 unsigned int ep_index
;
1640 struct xhci_slot_ctx
*slot_ctx
;
1641 struct xhci_input_control_ctx
*ctrl_ctx
;
1643 unsigned int last_ctx
;
1644 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1645 struct xhci_virt_device
*virt_dev
;
1648 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1650 /* So we won't queue a reset ep command for a root hub */
1654 xhci
= hcd_to_xhci(hcd
);
1655 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1658 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1659 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1660 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1661 /* FIXME when we have to issue an evaluate endpoint command to
1662 * deal with ep0 max packet size changing once we get the
1665 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1666 __func__
, added_ctxs
);
1670 virt_dev
= xhci
->devs
[udev
->slot_id
];
1671 in_ctx
= virt_dev
->in_ctx
;
1672 out_ctx
= virt_dev
->out_ctx
;
1673 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1674 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1676 /* If this endpoint is already in use, and the upper layers are trying
1677 * to add it again without dropping it, reject the addition.
1679 if (virt_dev
->eps
[ep_index
].ring
&&
1680 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1681 xhci_get_endpoint_flag(&ep
->desc
))) {
1682 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1683 "without dropping it.\n",
1684 (unsigned int) ep
->desc
.bEndpointAddress
);
1688 /* If the HCD has already noted the endpoint is enabled,
1689 * ignore this request.
1691 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1692 xhci_get_endpoint_flag(&ep
->desc
)) {
1693 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1699 * Configuration and alternate setting changes must be done in
1700 * process context, not interrupt context (or so documenation
1701 * for usb_set_interface() and usb_set_configuration() claim).
1703 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1704 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1705 __func__
, ep
->desc
.bEndpointAddress
);
1709 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1710 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1712 /* If xhci_endpoint_disable() was called for this endpoint, but the
1713 * xHC hasn't been notified yet through the check_bandwidth() call,
1714 * this re-adds a new state for the endpoint from the new endpoint
1715 * descriptors. We must drop and re-add this endpoint, so we leave the
1718 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1720 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1721 /* Update the last valid endpoint context, if we just added one past */
1722 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1723 LAST_CTX(last_ctx
)) {
1724 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1725 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1727 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1729 /* Store the usb_device pointer for later use */
1732 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1733 (unsigned int) ep
->desc
.bEndpointAddress
,
1735 (unsigned int) new_drop_flags
,
1736 (unsigned int) new_add_flags
,
1737 (unsigned int) new_slot_info
);
1741 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1743 struct xhci_input_control_ctx
*ctrl_ctx
;
1744 struct xhci_ep_ctx
*ep_ctx
;
1745 struct xhci_slot_ctx
*slot_ctx
;
1748 /* When a device's add flag and drop flag are zero, any subsequent
1749 * configure endpoint command will leave that endpoint's state
1750 * untouched. Make sure we don't leave any old state in the input
1751 * endpoint contexts.
1753 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1754 ctrl_ctx
->drop_flags
= 0;
1755 ctrl_ctx
->add_flags
= 0;
1756 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1757 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1758 /* Endpoint 0 is always valid */
1759 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1760 for (i
= 1; i
< 31; ++i
) {
1761 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1762 ep_ctx
->ep_info
= 0;
1763 ep_ctx
->ep_info2
= 0;
1765 ep_ctx
->tx_info
= 0;
1769 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1770 struct usb_device
*udev
, u32
*cmd_status
)
1774 switch (*cmd_status
) {
1776 dev_warn(&udev
->dev
, "Not enough host controller resources "
1777 "for new device state.\n");
1779 /* FIXME: can we allocate more resources for the HC? */
1782 case COMP_2ND_BW_ERR
:
1783 dev_warn(&udev
->dev
, "Not enough bandwidth "
1784 "for new device state.\n");
1786 /* FIXME: can we go back to the old state? */
1789 /* the HCD set up something wrong */
1790 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1792 "and endpoint is not disabled.\n");
1796 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1797 "configure command.\n");
1801 dev_dbg(&udev
->dev
, "Successful Endpoint Configure command\n");
1805 xhci_err(xhci
, "ERROR: unexpected command completion "
1806 "code 0x%x.\n", *cmd_status
);
1813 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1814 struct usb_device
*udev
, u32
*cmd_status
)
1817 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1819 switch (*cmd_status
) {
1821 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1822 "context command.\n");
1826 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1827 "evaluate context command.\n");
1830 case COMP_CTX_STATE
:
1831 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1832 "evaluate context command.\n");
1833 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1837 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
1838 "context command.\n");
1842 /* Max Exit Latency too large error */
1843 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1847 dev_dbg(&udev
->dev
, "Successful evaluate context command\n");
1851 xhci_err(xhci
, "ERROR: unexpected command completion "
1852 "code 0x%x.\n", *cmd_status
);
1859 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1860 struct xhci_container_ctx
*in_ctx
)
1862 struct xhci_input_control_ctx
*ctrl_ctx
;
1863 u32 valid_add_flags
;
1864 u32 valid_drop_flags
;
1866 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1867 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1868 * (bit 1). The default control endpoint is added during the Address
1869 * Device command and is never removed until the slot is disabled.
1871 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1872 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1874 /* Use hweight32 to count the number of ones in the add flags, or
1875 * number of endpoints added. Don't count endpoints that are changed
1876 * (both added and dropped).
1878 return hweight32(valid_add_flags
) -
1879 hweight32(valid_add_flags
& valid_drop_flags
);
1882 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1883 struct xhci_container_ctx
*in_ctx
)
1885 struct xhci_input_control_ctx
*ctrl_ctx
;
1886 u32 valid_add_flags
;
1887 u32 valid_drop_flags
;
1889 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1890 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1891 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1893 return hweight32(valid_drop_flags
) -
1894 hweight32(valid_add_flags
& valid_drop_flags
);
1898 * We need to reserve the new number of endpoints before the configure endpoint
1899 * command completes. We can't subtract the dropped endpoints from the number
1900 * of active endpoints until the command completes because we can oversubscribe
1901 * the host in this case:
1903 * - the first configure endpoint command drops more endpoints than it adds
1904 * - a second configure endpoint command that adds more endpoints is queued
1905 * - the first configure endpoint command fails, so the config is unchanged
1906 * - the second command may succeed, even though there isn't enough resources
1908 * Must be called with xhci->lock held.
1910 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1911 struct xhci_container_ctx
*in_ctx
)
1915 added_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1916 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1917 xhci_dbg(xhci
, "Not enough ep ctxs: "
1918 "%u active, need to add %u, limit is %u.\n",
1919 xhci
->num_active_eps
, added_eps
,
1920 xhci
->limit_active_eps
);
1923 xhci
->num_active_eps
+= added_eps
;
1924 xhci_dbg(xhci
, "Adding %u ep ctxs, %u now active.\n", added_eps
,
1925 xhci
->num_active_eps
);
1930 * The configure endpoint was failed by the xHC for some other reason, so we
1931 * need to revert the resources that failed configuration would have used.
1933 * Must be called with xhci->lock held.
1935 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1936 struct xhci_container_ctx
*in_ctx
)
1940 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, in_ctx
);
1941 xhci
->num_active_eps
-= num_failed_eps
;
1942 xhci_dbg(xhci
, "Removing %u failed ep ctxs, %u now active.\n",
1944 xhci
->num_active_eps
);
1948 * Now that the command has completed, clean up the active endpoint count by
1949 * subtracting out the endpoints that were dropped (but not changed).
1951 * Must be called with xhci->lock held.
1953 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1954 struct xhci_container_ctx
*in_ctx
)
1956 u32 num_dropped_eps
;
1958 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, in_ctx
);
1959 xhci
->num_active_eps
-= num_dropped_eps
;
1960 if (num_dropped_eps
)
1961 xhci_dbg(xhci
, "Removing %u dropped ep ctxs, %u now active.\n",
1963 xhci
->num_active_eps
);
1966 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
1968 switch (udev
->speed
) {
1970 case USB_SPEED_FULL
:
1972 case USB_SPEED_HIGH
:
1974 case USB_SPEED_SUPER
:
1976 case USB_SPEED_UNKNOWN
:
1977 case USB_SPEED_WIRELESS
:
1979 /* Should never happen */
1985 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
1987 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
1989 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
1994 /* If we are changing a LS/FS device under a HS hub,
1995 * make sure (if we are activating a new TT) that the HS bus has enough
1996 * bandwidth for this new TT.
1998 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
1999 struct xhci_virt_device
*virt_dev
,
2002 struct xhci_interval_bw_table
*bw_table
;
2003 struct xhci_tt_bw_info
*tt_info
;
2005 /* Find the bandwidth table for the root port this TT is attached to. */
2006 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2007 tt_info
= virt_dev
->tt_info
;
2008 /* If this TT already had active endpoints, the bandwidth for this TT
2009 * has already been added. Removing all periodic endpoints (and thus
2010 * making the TT enactive) will only decrease the bandwidth used.
2014 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2015 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2019 /* Not sure why we would have no new active endpoints...
2021 * Maybe because of an Evaluate Context change for a hub update or a
2022 * control endpoint 0 max packet size change?
2023 * FIXME: skip the bandwidth calculation in that case.
2028 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2029 struct xhci_virt_device
*virt_dev
)
2031 unsigned int bw_reserved
;
2033 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2034 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2037 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2038 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2045 * This algorithm is a very conservative estimate of the worst-case scheduling
2046 * scenario for any one interval. The hardware dynamically schedules the
2047 * packets, so we can't tell which microframe could be the limiting factor in
2048 * the bandwidth scheduling. This only takes into account periodic endpoints.
2050 * Obviously, we can't solve an NP complete problem to find the minimum worst
2051 * case scenario. Instead, we come up with an estimate that is no less than
2052 * the worst case bandwidth used for any one microframe, but may be an
2055 * We walk the requirements for each endpoint by interval, starting with the
2056 * smallest interval, and place packets in the schedule where there is only one
2057 * possible way to schedule packets for that interval. In order to simplify
2058 * this algorithm, we record the largest max packet size for each interval, and
2059 * assume all packets will be that size.
2061 * For interval 0, we obviously must schedule all packets for each interval.
2062 * The bandwidth for interval 0 is just the amount of data to be transmitted
2063 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2064 * the number of packets).
2066 * For interval 1, we have two possible microframes to schedule those packets
2067 * in. For this algorithm, if we can schedule the same number of packets for
2068 * each possible scheduling opportunity (each microframe), we will do so. The
2069 * remaining number of packets will be saved to be transmitted in the gaps in
2070 * the next interval's scheduling sequence.
2072 * As we move those remaining packets to be scheduled with interval 2 packets,
2073 * we have to double the number of remaining packets to transmit. This is
2074 * because the intervals are actually powers of 2, and we would be transmitting
2075 * the previous interval's packets twice in this interval. We also have to be
2076 * sure that when we look at the largest max packet size for this interval, we
2077 * also look at the largest max packet size for the remaining packets and take
2078 * the greater of the two.
2080 * The algorithm continues to evenly distribute packets in each scheduling
2081 * opportunity, and push the remaining packets out, until we get to the last
2082 * interval. Then those packets and their associated overhead are just added
2083 * to the bandwidth used.
2085 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2086 struct xhci_virt_device
*virt_dev
,
2089 unsigned int bw_reserved
;
2090 unsigned int max_bandwidth
;
2091 unsigned int bw_used
;
2092 unsigned int block_size
;
2093 struct xhci_interval_bw_table
*bw_table
;
2094 unsigned int packet_size
= 0;
2095 unsigned int overhead
= 0;
2096 unsigned int packets_transmitted
= 0;
2097 unsigned int packets_remaining
= 0;
2100 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2101 return xhci_check_ss_bw(xhci
, virt_dev
);
2103 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2104 max_bandwidth
= HS_BW_LIMIT
;
2105 /* Convert percent of bus BW reserved to blocks reserved */
2106 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2108 max_bandwidth
= FS_BW_LIMIT
;
2109 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2112 bw_table
= virt_dev
->bw_table
;
2113 /* We need to translate the max packet size and max ESIT payloads into
2114 * the units the hardware uses.
2116 block_size
= xhci_get_block_size(virt_dev
->udev
);
2118 /* If we are manipulating a LS/FS device under a HS hub, double check
2119 * that the HS bus has enough bandwidth if we are activing a new TT.
2121 if (virt_dev
->tt_info
) {
2122 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2123 virt_dev
->real_port
);
2124 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2125 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2126 "newly activated TT.\n");
2129 xhci_dbg(xhci
, "Recalculating BW for TT slot %u port %u\n",
2130 virt_dev
->tt_info
->slot_id
,
2131 virt_dev
->tt_info
->ttport
);
2133 xhci_dbg(xhci
, "Recalculating BW for rootport %u\n",
2134 virt_dev
->real_port
);
2137 /* Add in how much bandwidth will be used for interval zero, or the
2138 * rounded max ESIT payload + number of packets * largest overhead.
2140 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2141 bw_table
->interval_bw
[0].num_packets
*
2142 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2144 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2145 unsigned int bw_added
;
2146 unsigned int largest_mps
;
2147 unsigned int interval_overhead
;
2150 * How many packets could we transmit in this interval?
2151 * If packets didn't fit in the previous interval, we will need
2152 * to transmit that many packets twice within this interval.
2154 packets_remaining
= 2 * packets_remaining
+
2155 bw_table
->interval_bw
[i
].num_packets
;
2157 /* Find the largest max packet size of this or the previous
2160 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2163 struct xhci_virt_ep
*virt_ep
;
2164 struct list_head
*ep_entry
;
2166 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2167 virt_ep
= list_entry(ep_entry
,
2168 struct xhci_virt_ep
, bw_endpoint_list
);
2169 /* Convert to blocks, rounding up */
2170 largest_mps
= DIV_ROUND_UP(
2171 virt_ep
->bw_info
.max_packet_size
,
2174 if (largest_mps
> packet_size
)
2175 packet_size
= largest_mps
;
2177 /* Use the larger overhead of this or the previous interval. */
2178 interval_overhead
= xhci_get_largest_overhead(
2179 &bw_table
->interval_bw
[i
]);
2180 if (interval_overhead
> overhead
)
2181 overhead
= interval_overhead
;
2183 /* How many packets can we evenly distribute across
2184 * (1 << (i + 1)) possible scheduling opportunities?
2186 packets_transmitted
= packets_remaining
>> (i
+ 1);
2188 /* Add in the bandwidth used for those scheduled packets */
2189 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2191 /* How many packets do we have remaining to transmit? */
2192 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2194 /* What largest max packet size should those packets have? */
2195 /* If we've transmitted all packets, don't carry over the
2196 * largest packet size.
2198 if (packets_remaining
== 0) {
2201 } else if (packets_transmitted
> 0) {
2202 /* Otherwise if we do have remaining packets, and we've
2203 * scheduled some packets in this interval, take the
2204 * largest max packet size from endpoints with this
2207 packet_size
= largest_mps
;
2208 overhead
= interval_overhead
;
2210 /* Otherwise carry over packet_size and overhead from the last
2211 * time we had a remainder.
2213 bw_used
+= bw_added
;
2214 if (bw_used
> max_bandwidth
) {
2215 xhci_warn(xhci
, "Not enough bandwidth. "
2216 "Proposed: %u, Max: %u\n",
2217 bw_used
, max_bandwidth
);
2222 * Ok, we know we have some packets left over after even-handedly
2223 * scheduling interval 15. We don't know which microframes they will
2224 * fit into, so we over-schedule and say they will be scheduled every
2227 if (packets_remaining
> 0)
2228 bw_used
+= overhead
+ packet_size
;
2230 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2231 unsigned int port_index
= virt_dev
->real_port
- 1;
2233 /* OK, we're manipulating a HS device attached to a
2234 * root port bandwidth domain. Include the number of active TTs
2235 * in the bandwidth used.
2237 bw_used
+= TT_HS_OVERHEAD
*
2238 xhci
->rh_bw
[port_index
].num_active_tts
;
2241 xhci_dbg(xhci
, "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2242 "Available: %u " "percent\n",
2243 bw_used
, max_bandwidth
, bw_reserved
,
2244 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2247 bw_used
+= bw_reserved
;
2248 if (bw_used
> max_bandwidth
) {
2249 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2250 bw_used
, max_bandwidth
);
2254 bw_table
->bw_used
= bw_used
;
2258 static bool xhci_is_async_ep(unsigned int ep_type
)
2260 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2261 ep_type
!= ISOC_IN_EP
&&
2262 ep_type
!= INT_IN_EP
);
2265 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2267 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2270 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2272 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2274 if (ep_bw
->ep_interval
== 0)
2275 return SS_OVERHEAD_BURST
+
2276 (ep_bw
->mult
* ep_bw
->num_packets
*
2277 (SS_OVERHEAD
+ mps
));
2278 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2279 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2280 1 << ep_bw
->ep_interval
);
2284 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2285 struct xhci_bw_info
*ep_bw
,
2286 struct xhci_interval_bw_table
*bw_table
,
2287 struct usb_device
*udev
,
2288 struct xhci_virt_ep
*virt_ep
,
2289 struct xhci_tt_bw_info
*tt_info
)
2291 struct xhci_interval_bw
*interval_bw
;
2292 int normalized_interval
;
2294 if (xhci_is_async_ep(ep_bw
->type
))
2297 if (udev
->speed
== USB_SPEED_SUPER
) {
2298 if (xhci_is_sync_in_ep(ep_bw
->type
))
2299 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2300 xhci_get_ss_bw_consumed(ep_bw
);
2302 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2303 xhci_get_ss_bw_consumed(ep_bw
);
2307 /* SuperSpeed endpoints never get added to intervals in the table, so
2308 * this check is only valid for HS/FS/LS devices.
2310 if (list_empty(&virt_ep
->bw_endpoint_list
))
2312 /* For LS/FS devices, we need to translate the interval expressed in
2313 * microframes to frames.
2315 if (udev
->speed
== USB_SPEED_HIGH
)
2316 normalized_interval
= ep_bw
->ep_interval
;
2318 normalized_interval
= ep_bw
->ep_interval
- 3;
2320 if (normalized_interval
== 0)
2321 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2322 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2323 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2324 switch (udev
->speed
) {
2326 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2328 case USB_SPEED_FULL
:
2329 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2331 case USB_SPEED_HIGH
:
2332 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2334 case USB_SPEED_SUPER
:
2335 case USB_SPEED_UNKNOWN
:
2336 case USB_SPEED_WIRELESS
:
2337 /* Should never happen because only LS/FS/HS endpoints will get
2338 * added to the endpoint list.
2343 tt_info
->active_eps
-= 1;
2344 list_del_init(&virt_ep
->bw_endpoint_list
);
2347 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2348 struct xhci_bw_info
*ep_bw
,
2349 struct xhci_interval_bw_table
*bw_table
,
2350 struct usb_device
*udev
,
2351 struct xhci_virt_ep
*virt_ep
,
2352 struct xhci_tt_bw_info
*tt_info
)
2354 struct xhci_interval_bw
*interval_bw
;
2355 struct xhci_virt_ep
*smaller_ep
;
2356 int normalized_interval
;
2358 if (xhci_is_async_ep(ep_bw
->type
))
2361 if (udev
->speed
== USB_SPEED_SUPER
) {
2362 if (xhci_is_sync_in_ep(ep_bw
->type
))
2363 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2364 xhci_get_ss_bw_consumed(ep_bw
);
2366 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2367 xhci_get_ss_bw_consumed(ep_bw
);
2371 /* For LS/FS devices, we need to translate the interval expressed in
2372 * microframes to frames.
2374 if (udev
->speed
== USB_SPEED_HIGH
)
2375 normalized_interval
= ep_bw
->ep_interval
;
2377 normalized_interval
= ep_bw
->ep_interval
- 3;
2379 if (normalized_interval
== 0)
2380 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2381 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2382 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2383 switch (udev
->speed
) {
2385 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2387 case USB_SPEED_FULL
:
2388 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2390 case USB_SPEED_HIGH
:
2391 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2393 case USB_SPEED_SUPER
:
2394 case USB_SPEED_UNKNOWN
:
2395 case USB_SPEED_WIRELESS
:
2396 /* Should never happen because only LS/FS/HS endpoints will get
2397 * added to the endpoint list.
2403 tt_info
->active_eps
+= 1;
2404 /* Insert the endpoint into the list, largest max packet size first. */
2405 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2407 if (ep_bw
->max_packet_size
>=
2408 smaller_ep
->bw_info
.max_packet_size
) {
2409 /* Add the new ep before the smaller endpoint */
2410 list_add_tail(&virt_ep
->bw_endpoint_list
,
2411 &smaller_ep
->bw_endpoint_list
);
2415 /* Add the new endpoint at the end of the list. */
2416 list_add_tail(&virt_ep
->bw_endpoint_list
,
2417 &interval_bw
->endpoints
);
2420 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2421 struct xhci_virt_device
*virt_dev
,
2424 struct xhci_root_port_bw_info
*rh_bw_info
;
2425 if (!virt_dev
->tt_info
)
2428 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2429 if (old_active_eps
== 0 &&
2430 virt_dev
->tt_info
->active_eps
!= 0) {
2431 rh_bw_info
->num_active_tts
+= 1;
2432 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2433 } else if (old_active_eps
!= 0 &&
2434 virt_dev
->tt_info
->active_eps
== 0) {
2435 rh_bw_info
->num_active_tts
-= 1;
2436 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2440 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2441 struct xhci_virt_device
*virt_dev
,
2442 struct xhci_container_ctx
*in_ctx
)
2444 struct xhci_bw_info ep_bw_info
[31];
2446 struct xhci_input_control_ctx
*ctrl_ctx
;
2447 int old_active_eps
= 0;
2449 if (virt_dev
->tt_info
)
2450 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2452 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2454 for (i
= 0; i
< 31; i
++) {
2455 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2458 /* Make a copy of the BW info in case we need to revert this */
2459 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2460 sizeof(ep_bw_info
[i
]));
2461 /* Drop the endpoint from the interval table if the endpoint is
2462 * being dropped or changed.
2464 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2465 xhci_drop_ep_from_interval_table(xhci
,
2466 &virt_dev
->eps
[i
].bw_info
,
2472 /* Overwrite the information stored in the endpoints' bw_info */
2473 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2474 for (i
= 0; i
< 31; i
++) {
2475 /* Add any changed or added endpoints to the interval table */
2476 if (EP_IS_ADDED(ctrl_ctx
, i
))
2477 xhci_add_ep_to_interval_table(xhci
,
2478 &virt_dev
->eps
[i
].bw_info
,
2485 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2486 /* Ok, this fits in the bandwidth we have.
2487 * Update the number of active TTs.
2489 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2493 /* We don't have enough bandwidth for this, revert the stored info. */
2494 for (i
= 0; i
< 31; i
++) {
2495 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2498 /* Drop the new copies of any added or changed endpoints from
2499 * the interval table.
2501 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2502 xhci_drop_ep_from_interval_table(xhci
,
2503 &virt_dev
->eps
[i
].bw_info
,
2509 /* Revert the endpoint back to its old information */
2510 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2511 sizeof(ep_bw_info
[i
]));
2512 /* Add any changed or dropped endpoints back into the table */
2513 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2514 xhci_add_ep_to_interval_table(xhci
,
2515 &virt_dev
->eps
[i
].bw_info
,
2525 /* Issue a configure endpoint command or evaluate context command
2526 * and wait for it to finish.
2528 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2529 struct usb_device
*udev
,
2530 struct xhci_command
*command
,
2531 bool ctx_change
, bool must_succeed
)
2535 unsigned long flags
;
2536 struct xhci_container_ctx
*in_ctx
;
2537 struct completion
*cmd_completion
;
2539 struct xhci_virt_device
*virt_dev
;
2540 union xhci_trb
*cmd_trb
;
2542 spin_lock_irqsave(&xhci
->lock
, flags
);
2543 virt_dev
= xhci
->devs
[udev
->slot_id
];
2546 in_ctx
= command
->in_ctx
;
2548 in_ctx
= virt_dev
->in_ctx
;
2550 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2551 xhci_reserve_host_resources(xhci
, in_ctx
)) {
2552 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2553 xhci_warn(xhci
, "Not enough host resources, "
2554 "active endpoint contexts = %u\n",
2555 xhci
->num_active_eps
);
2558 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2559 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2560 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2561 xhci_free_host_resources(xhci
, in_ctx
);
2562 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2563 xhci_warn(xhci
, "Not enough bandwidth\n");
2568 cmd_completion
= command
->completion
;
2569 cmd_status
= &command
->status
;
2570 command
->command_trb
= xhci
->cmd_ring
->enqueue
;
2572 /* Enqueue pointer can be left pointing to the link TRB,
2573 * we must handle that
2575 if (TRB_TYPE_LINK_LE32(command
->command_trb
->link
.control
))
2576 command
->command_trb
=
2577 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
2579 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2581 cmd_completion
= &virt_dev
->cmd_completion
;
2582 cmd_status
= &virt_dev
->cmd_status
;
2584 init_completion(cmd_completion
);
2586 cmd_trb
= xhci
->cmd_ring
->dequeue
;
2588 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2589 udev
->slot_id
, must_succeed
);
2591 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2592 udev
->slot_id
, must_succeed
);
2595 list_del(&command
->cmd_list
);
2596 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2597 xhci_free_host_resources(xhci
, in_ctx
);
2598 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2599 xhci_dbg(xhci
, "FIXME allocate a new ring segment\n");
2602 xhci_ring_cmd_db(xhci
);
2603 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2605 /* Wait for the configure endpoint command to complete */
2606 timeleft
= wait_for_completion_interruptible_timeout(
2608 XHCI_CMD_DEFAULT_TIMEOUT
);
2609 if (timeleft
<= 0) {
2610 xhci_warn(xhci
, "%s while waiting for %s command\n",
2611 timeleft
== 0 ? "Timeout" : "Signal",
2613 "configure endpoint" :
2614 "evaluate context");
2615 /* cancel the configure endpoint command */
2616 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2623 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2625 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2627 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2628 spin_lock_irqsave(&xhci
->lock
, flags
);
2629 /* If the command failed, remove the reserved resources.
2630 * Otherwise, clean up the estimate to include dropped eps.
2633 xhci_free_host_resources(xhci
, in_ctx
);
2635 xhci_finish_resource_reservation(xhci
, in_ctx
);
2636 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2641 /* Called after one or more calls to xhci_add_endpoint() or
2642 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2643 * to call xhci_reset_bandwidth().
2645 * Since we are in the middle of changing either configuration or
2646 * installing a new alt setting, the USB core won't allow URBs to be
2647 * enqueued for any endpoint on the old config or interface. Nothing
2648 * else should be touching the xhci->devs[slot_id] structure, so we
2649 * don't need to take the xhci->lock for manipulating that.
2651 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2655 struct xhci_hcd
*xhci
;
2656 struct xhci_virt_device
*virt_dev
;
2657 struct xhci_input_control_ctx
*ctrl_ctx
;
2658 struct xhci_slot_ctx
*slot_ctx
;
2660 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2663 xhci
= hcd_to_xhci(hcd
);
2664 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2667 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2668 virt_dev
= xhci
->devs
[udev
->slot_id
];
2670 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2671 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2672 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2673 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2674 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2676 /* Don't issue the command if there's no endpoints to update. */
2677 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2678 ctrl_ctx
->drop_flags
== 0)
2681 xhci_dbg(xhci
, "New Input Control Context:\n");
2682 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2683 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2684 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2686 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2689 /* Callee should call reset_bandwidth() */
2693 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2694 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2695 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2697 /* Free any rings that were dropped, but not changed. */
2698 for (i
= 1; i
< 31; ++i
) {
2699 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2700 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2701 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2703 xhci_zero_in_ctx(xhci
, virt_dev
);
2705 * Install any rings for completely new endpoints or changed endpoints,
2706 * and free or cache any old rings from changed endpoints.
2708 for (i
= 1; i
< 31; ++i
) {
2709 if (!virt_dev
->eps
[i
].new_ring
)
2711 /* Only cache or free the old ring if it exists.
2712 * It may not if this is the first add of an endpoint.
2714 if (virt_dev
->eps
[i
].ring
) {
2715 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2717 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2718 virt_dev
->eps
[i
].new_ring
= NULL
;
2724 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2726 struct xhci_hcd
*xhci
;
2727 struct xhci_virt_device
*virt_dev
;
2730 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2733 xhci
= hcd_to_xhci(hcd
);
2735 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2736 virt_dev
= xhci
->devs
[udev
->slot_id
];
2737 /* Free any rings allocated for added endpoints */
2738 for (i
= 0; i
< 31; ++i
) {
2739 if (virt_dev
->eps
[i
].new_ring
) {
2740 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2741 virt_dev
->eps
[i
].new_ring
= NULL
;
2744 xhci_zero_in_ctx(xhci
, virt_dev
);
2747 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2748 struct xhci_container_ctx
*in_ctx
,
2749 struct xhci_container_ctx
*out_ctx
,
2750 u32 add_flags
, u32 drop_flags
)
2752 struct xhci_input_control_ctx
*ctrl_ctx
;
2753 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2754 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2755 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2756 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2757 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2759 xhci_dbg(xhci
, "Input Context:\n");
2760 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2763 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2764 unsigned int slot_id
, unsigned int ep_index
,
2765 struct xhci_dequeue_state
*deq_state
)
2767 struct xhci_container_ctx
*in_ctx
;
2768 struct xhci_ep_ctx
*ep_ctx
;
2772 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2773 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2774 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2775 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2776 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2777 deq_state
->new_deq_ptr
);
2779 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2780 "reset ep command\n");
2781 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2782 deq_state
->new_deq_seg
,
2783 deq_state
->new_deq_ptr
);
2786 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2788 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2789 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2790 xhci
->devs
[slot_id
]->out_ctx
, added_ctxs
, added_ctxs
);
2793 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2794 struct usb_device
*udev
, unsigned int ep_index
)
2796 struct xhci_dequeue_state deq_state
;
2797 struct xhci_virt_ep
*ep
;
2799 xhci_dbg(xhci
, "Cleaning up stalled endpoint ring\n");
2800 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2801 /* We need to move the HW's dequeue pointer past this TD,
2802 * or it will attempt to resend it on the next doorbell ring.
2804 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2805 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2808 /* HW with the reset endpoint quirk will use the saved dequeue state to
2809 * issue a configure endpoint command later.
2811 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2812 xhci_dbg(xhci
, "Queueing new dequeue state\n");
2813 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2814 ep_index
, ep
->stopped_stream
, &deq_state
);
2816 /* Better hope no one uses the input context between now and the
2817 * reset endpoint completion!
2818 * XXX: No idea how this hardware will react when stream rings
2821 xhci_dbg(xhci
, "Setting up input context for "
2822 "configure endpoint command\n");
2823 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2824 ep_index
, &deq_state
);
2828 /* Deal with stalled endpoints. The core should have sent the control message
2829 * to clear the halt condition. However, we need to make the xHCI hardware
2830 * reset its sequence number, since a device will expect a sequence number of
2831 * zero after the halt condition is cleared.
2832 * Context: in_interrupt
2834 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2835 struct usb_host_endpoint
*ep
)
2837 struct xhci_hcd
*xhci
;
2838 struct usb_device
*udev
;
2839 unsigned int ep_index
;
2840 unsigned long flags
;
2842 struct xhci_virt_ep
*virt_ep
;
2844 xhci
= hcd_to_xhci(hcd
);
2845 udev
= (struct usb_device
*) ep
->hcpriv
;
2846 /* Called with a root hub endpoint (or an endpoint that wasn't added
2847 * with xhci_add_endpoint()
2851 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2852 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2853 if (!virt_ep
->stopped_td
) {
2854 xhci_dbg(xhci
, "Endpoint 0x%x not halted, refusing to reset.\n",
2855 ep
->desc
.bEndpointAddress
);
2858 if (usb_endpoint_xfer_control(&ep
->desc
)) {
2859 xhci_dbg(xhci
, "Control endpoint stall already handled.\n");
2863 xhci_dbg(xhci
, "Queueing reset endpoint command\n");
2864 spin_lock_irqsave(&xhci
->lock
, flags
);
2865 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
2867 * Can't change the ring dequeue pointer until it's transitioned to the
2868 * stopped state, which is only upon a successful reset endpoint
2869 * command. Better hope that last command worked!
2872 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
2873 kfree(virt_ep
->stopped_td
);
2874 xhci_ring_cmd_db(xhci
);
2876 virt_ep
->stopped_td
= NULL
;
2877 virt_ep
->stopped_trb
= NULL
;
2878 virt_ep
->stopped_stream
= 0;
2879 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2882 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
2885 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2886 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2887 unsigned int slot_id
)
2890 unsigned int ep_index
;
2891 unsigned int ep_state
;
2895 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2898 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
2899 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2900 " descriptor for ep 0x%x does not support streams\n",
2901 ep
->desc
.bEndpointAddress
);
2905 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2906 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2907 if (ep_state
& EP_HAS_STREAMS
||
2908 ep_state
& EP_GETTING_STREAMS
) {
2909 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2910 "already has streams set up.\n",
2911 ep
->desc
.bEndpointAddress
);
2912 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2913 "dynamic stream context array reallocation.\n");
2916 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2917 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2918 "endpoint 0x%x; URBs are pending.\n",
2919 ep
->desc
.bEndpointAddress
);
2925 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2926 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2928 unsigned int max_streams
;
2930 /* The stream context array size must be a power of two */
2931 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2933 * Find out how many primary stream array entries the host controller
2934 * supports. Later we may use secondary stream arrays (similar to 2nd
2935 * level page entries), but that's an optional feature for xHCI host
2936 * controllers. xHCs must support at least 4 stream IDs.
2938 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2939 if (*num_stream_ctxs
> max_streams
) {
2940 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2942 *num_stream_ctxs
= max_streams
;
2943 *num_streams
= max_streams
;
2947 /* Returns an error code if one of the endpoint already has streams.
2948 * This does not change any data structures, it only checks and gathers
2951 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
2952 struct usb_device
*udev
,
2953 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2954 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
2956 unsigned int max_streams
;
2957 unsigned int endpoint_flag
;
2961 for (i
= 0; i
< num_eps
; i
++) {
2962 ret
= xhci_check_streams_endpoint(xhci
, udev
,
2963 eps
[i
], udev
->slot_id
);
2967 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
2968 if (max_streams
< (*num_streams
- 1)) {
2969 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
2970 eps
[i
]->desc
.bEndpointAddress
,
2972 *num_streams
= max_streams
+1;
2975 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
2976 if (*changed_ep_bitmask
& endpoint_flag
)
2978 *changed_ep_bitmask
|= endpoint_flag
;
2983 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
2984 struct usb_device
*udev
,
2985 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
2987 u32 changed_ep_bitmask
= 0;
2988 unsigned int slot_id
;
2989 unsigned int ep_index
;
2990 unsigned int ep_state
;
2993 slot_id
= udev
->slot_id
;
2994 if (!xhci
->devs
[slot_id
])
2997 for (i
= 0; i
< num_eps
; i
++) {
2998 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
2999 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3000 /* Are streams already being freed for the endpoint? */
3001 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3002 xhci_warn(xhci
, "WARN Can't disable streams for "
3004 "streams are being disabled already.",
3005 eps
[i
]->desc
.bEndpointAddress
);
3008 /* Are there actually any streams to free? */
3009 if (!(ep_state
& EP_HAS_STREAMS
) &&
3010 !(ep_state
& EP_GETTING_STREAMS
)) {
3011 xhci_warn(xhci
, "WARN Can't disable streams for "
3013 "streams are already disabled!",
3014 eps
[i
]->desc
.bEndpointAddress
);
3015 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3016 "with non-streams endpoint\n");
3019 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3021 return changed_ep_bitmask
;
3025 * The USB device drivers use this function (though the HCD interface in USB
3026 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3027 * coordinate mass storage command queueing across multiple endpoints (basically
3028 * a stream ID == a task ID).
3030 * Setting up streams involves allocating the same size stream context array
3031 * for each endpoint and issuing a configure endpoint command for all endpoints.
3033 * Don't allow the call to succeed if one endpoint only supports one stream
3034 * (which means it doesn't support streams at all).
3036 * Drivers may get less stream IDs than they asked for, if the host controller
3037 * hardware or endpoints claim they can't support the number of requested
3040 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3041 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3042 unsigned int num_streams
, gfp_t mem_flags
)
3045 struct xhci_hcd
*xhci
;
3046 struct xhci_virt_device
*vdev
;
3047 struct xhci_command
*config_cmd
;
3048 unsigned int ep_index
;
3049 unsigned int num_stream_ctxs
;
3050 unsigned long flags
;
3051 u32 changed_ep_bitmask
= 0;
3056 /* Add one to the number of streams requested to account for
3057 * stream 0 that is reserved for xHCI usage.
3060 xhci
= hcd_to_xhci(hcd
);
3061 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3064 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3066 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3070 /* Check to make sure all endpoints are not already configured for
3071 * streams. While we're at it, find the maximum number of streams that
3072 * all the endpoints will support and check for duplicate endpoints.
3074 spin_lock_irqsave(&xhci
->lock
, flags
);
3075 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3076 num_eps
, &num_streams
, &changed_ep_bitmask
);
3078 xhci_free_command(xhci
, config_cmd
);
3079 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3082 if (num_streams
<= 1) {
3083 xhci_warn(xhci
, "WARN: endpoints can't handle "
3084 "more than one stream.\n");
3085 xhci_free_command(xhci
, config_cmd
);
3086 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3089 vdev
= xhci
->devs
[udev
->slot_id
];
3090 /* Mark each endpoint as being in transition, so
3091 * xhci_urb_enqueue() will reject all URBs.
3093 for (i
= 0; i
< num_eps
; i
++) {
3094 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3095 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3097 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3099 /* Setup internal data structures and allocate HW data structures for
3100 * streams (but don't install the HW structures in the input context
3101 * until we're sure all memory allocation succeeded).
3103 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3104 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3105 num_stream_ctxs
, num_streams
);
3107 for (i
= 0; i
< num_eps
; i
++) {
3108 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3109 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3111 num_streams
, mem_flags
);
3112 if (!vdev
->eps
[ep_index
].stream_info
)
3114 /* Set maxPstreams in endpoint context and update deq ptr to
3115 * point to stream context array. FIXME
3119 /* Set up the input context for a configure endpoint command. */
3120 for (i
= 0; i
< num_eps
; i
++) {
3121 struct xhci_ep_ctx
*ep_ctx
;
3123 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3124 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3126 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3127 vdev
->out_ctx
, ep_index
);
3128 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3129 vdev
->eps
[ep_index
].stream_info
);
3131 /* Tell the HW to drop its old copy of the endpoint context info
3132 * and add the updated copy from the input context.
3134 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3135 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3137 /* Issue and wait for the configure endpoint command */
3138 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3141 /* xHC rejected the configure endpoint command for some reason, so we
3142 * leave the old ring intact and free our internal streams data
3148 spin_lock_irqsave(&xhci
->lock
, flags
);
3149 for (i
= 0; i
< num_eps
; i
++) {
3150 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3151 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3152 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3153 udev
->slot_id
, ep_index
);
3154 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3156 xhci_free_command(xhci
, config_cmd
);
3157 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3159 /* Subtract 1 for stream 0, which drivers can't use */
3160 return num_streams
- 1;
3163 /* If it didn't work, free the streams! */
3164 for (i
= 0; i
< num_eps
; i
++) {
3165 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3166 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3167 vdev
->eps
[ep_index
].stream_info
= NULL
;
3168 /* FIXME Unset maxPstreams in endpoint context and
3169 * update deq ptr to point to normal string ring.
3171 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3172 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3173 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3175 xhci_free_command(xhci
, config_cmd
);
3179 /* Transition the endpoint from using streams to being a "normal" endpoint
3182 * Modify the endpoint context state, submit a configure endpoint command,
3183 * and free all endpoint rings for streams if that completes successfully.
3185 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3186 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3190 struct xhci_hcd
*xhci
;
3191 struct xhci_virt_device
*vdev
;
3192 struct xhci_command
*command
;
3193 unsigned int ep_index
;
3194 unsigned long flags
;
3195 u32 changed_ep_bitmask
;
3197 xhci
= hcd_to_xhci(hcd
);
3198 vdev
= xhci
->devs
[udev
->slot_id
];
3200 /* Set up a configure endpoint command to remove the streams rings */
3201 spin_lock_irqsave(&xhci
->lock
, flags
);
3202 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3203 udev
, eps
, num_eps
);
3204 if (changed_ep_bitmask
== 0) {
3205 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3209 /* Use the xhci_command structure from the first endpoint. We may have
3210 * allocated too many, but the driver may call xhci_free_streams() for
3211 * each endpoint it grouped into one call to xhci_alloc_streams().
3213 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3214 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3215 for (i
= 0; i
< num_eps
; i
++) {
3216 struct xhci_ep_ctx
*ep_ctx
;
3218 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3219 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3220 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3221 EP_GETTING_NO_STREAMS
;
3223 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3224 vdev
->out_ctx
, ep_index
);
3225 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3226 &vdev
->eps
[ep_index
]);
3228 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3229 vdev
->out_ctx
, changed_ep_bitmask
, changed_ep_bitmask
);
3230 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3232 /* Issue and wait for the configure endpoint command,
3233 * which must succeed.
3235 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3238 /* xHC rejected the configure endpoint command for some reason, so we
3239 * leave the streams rings intact.
3244 spin_lock_irqsave(&xhci
->lock
, flags
);
3245 for (i
= 0; i
< num_eps
; i
++) {
3246 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3247 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3248 vdev
->eps
[ep_index
].stream_info
= NULL
;
3249 /* FIXME Unset maxPstreams in endpoint context and
3250 * update deq ptr to point to normal string ring.
3252 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3253 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3255 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3261 * Deletes endpoint resources for endpoints that were active before a Reset
3262 * Device command, or a Disable Slot command. The Reset Device command leaves
3263 * the control endpoint intact, whereas the Disable Slot command deletes it.
3265 * Must be called with xhci->lock held.
3267 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3268 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3271 unsigned int num_dropped_eps
= 0;
3272 unsigned int drop_flags
= 0;
3274 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3275 if (virt_dev
->eps
[i
].ring
) {
3276 drop_flags
|= 1 << i
;
3280 xhci
->num_active_eps
-= num_dropped_eps
;
3281 if (num_dropped_eps
)
3282 xhci_dbg(xhci
, "Dropped %u ep ctxs, flags = 0x%x, "
3284 num_dropped_eps
, drop_flags
,
3285 xhci
->num_active_eps
);
3289 * This submits a Reset Device Command, which will set the device state to 0,
3290 * set the device address to 0, and disable all the endpoints except the default
3291 * control endpoint. The USB core should come back and call
3292 * xhci_address_device(), and then re-set up the configuration. If this is
3293 * called because of a usb_reset_and_verify_device(), then the old alternate
3294 * settings will be re-installed through the normal bandwidth allocation
3297 * Wait for the Reset Device command to finish. Remove all structures
3298 * associated with the endpoints that were disabled. Clear the input device
3299 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3301 * If the virt_dev to be reset does not exist or does not match the udev,
3302 * it means the device is lost, possibly due to the xHC restore error and
3303 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3304 * re-allocate the device.
3306 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3309 unsigned long flags
;
3310 struct xhci_hcd
*xhci
;
3311 unsigned int slot_id
;
3312 struct xhci_virt_device
*virt_dev
;
3313 struct xhci_command
*reset_device_cmd
;
3315 int last_freed_endpoint
;
3316 struct xhci_slot_ctx
*slot_ctx
;
3317 int old_active_eps
= 0;
3319 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3322 xhci
= hcd_to_xhci(hcd
);
3323 slot_id
= udev
->slot_id
;
3324 virt_dev
= xhci
->devs
[slot_id
];
3326 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3327 "not exist. Re-allocate the device\n", slot_id
);
3328 ret
= xhci_alloc_dev(hcd
, udev
);
3335 if (virt_dev
->udev
!= udev
) {
3336 /* If the virt_dev and the udev does not match, this virt_dev
3337 * may belong to another udev.
3338 * Re-allocate the device.
3340 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3341 "not match the udev. Re-allocate the device\n",
3343 ret
= xhci_alloc_dev(hcd
, udev
);
3350 /* If device is not setup, there is no point in resetting it */
3351 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3352 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3353 SLOT_STATE_DISABLED
)
3356 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3357 /* Allocate the command structure that holds the struct completion.
3358 * Assume we're in process context, since the normal device reset
3359 * process has to wait for the device anyway. Storage devices are
3360 * reset as part of error handling, so use GFP_NOIO instead of
3363 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3364 if (!reset_device_cmd
) {
3365 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3369 /* Attempt to submit the Reset Device command to the command ring */
3370 spin_lock_irqsave(&xhci
->lock
, flags
);
3371 reset_device_cmd
->command_trb
= xhci
->cmd_ring
->enqueue
;
3373 /* Enqueue pointer can be left pointing to the link TRB,
3374 * we must handle that
3376 if (TRB_TYPE_LINK_LE32(reset_device_cmd
->command_trb
->link
.control
))
3377 reset_device_cmd
->command_trb
=
3378 xhci
->cmd_ring
->enq_seg
->next
->trbs
;
3380 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3381 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3383 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3384 list_del(&reset_device_cmd
->cmd_list
);
3385 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3386 goto command_cleanup
;
3388 xhci_ring_cmd_db(xhci
);
3389 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3391 /* Wait for the Reset Device command to finish */
3392 timeleft
= wait_for_completion_interruptible_timeout(
3393 reset_device_cmd
->completion
,
3394 USB_CTRL_SET_TIMEOUT
);
3395 if (timeleft
<= 0) {
3396 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3397 timeleft
== 0 ? "Timeout" : "Signal");
3398 spin_lock_irqsave(&xhci
->lock
, flags
);
3399 /* The timeout might have raced with the event ring handler, so
3400 * only delete from the list if the item isn't poisoned.
3402 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3403 list_del(&reset_device_cmd
->cmd_list
);
3404 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3406 goto command_cleanup
;
3409 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3410 * unless we tried to reset a slot ID that wasn't enabled,
3411 * or the device wasn't in the addressed or configured state.
3413 ret
= reset_device_cmd
->status
;
3415 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3416 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3417 xhci_info(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3419 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3420 xhci_info(xhci
, "Not freeing device rings.\n");
3421 /* Don't treat this as an error. May change my mind later. */
3423 goto command_cleanup
;
3425 xhci_dbg(xhci
, "Successful reset device command.\n");
3428 if (xhci_is_vendor_info_code(xhci
, ret
))
3430 xhci_warn(xhci
, "Unknown completion code %u for "
3431 "reset device command.\n", ret
);
3433 goto command_cleanup
;
3436 /* Free up host controller endpoint resources */
3437 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3438 spin_lock_irqsave(&xhci
->lock
, flags
);
3439 /* Don't delete the default control endpoint resources */
3440 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3441 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3444 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3445 last_freed_endpoint
= 1;
3446 for (i
= 1; i
< 31; ++i
) {
3447 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3449 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3450 xhci_free_stream_info(xhci
, ep
->stream_info
);
3451 ep
->stream_info
= NULL
;
3452 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3456 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3457 last_freed_endpoint
= i
;
3459 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3460 xhci_drop_ep_from_interval_table(xhci
,
3461 &virt_dev
->eps
[i
].bw_info
,
3466 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3468 /* If necessary, update the number of active TTs on this root port */
3469 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3471 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3472 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3476 xhci_free_command(xhci
, reset_device_cmd
);
3481 * At this point, the struct usb_device is about to go away, the device has
3482 * disconnected, and all traffic has been stopped and the endpoints have been
3483 * disabled. Free any HC data structures associated with that device.
3485 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3487 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3488 struct xhci_virt_device
*virt_dev
;
3489 unsigned long flags
;
3493 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3494 /* If the host is halted due to driver unload, we still need to free the
3497 if (ret
<= 0 && ret
!= -ENODEV
)
3500 virt_dev
= xhci
->devs
[udev
->slot_id
];
3502 /* Stop any wayward timer functions (which may grab the lock) */
3503 for (i
= 0; i
< 31; ++i
) {
3504 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3505 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3508 if (udev
->usb2_hw_lpm_enabled
) {
3509 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3510 udev
->usb2_hw_lpm_enabled
= 0;
3513 spin_lock_irqsave(&xhci
->lock
, flags
);
3514 /* Don't disable the slot if the host controller is dead. */
3515 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3516 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3517 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3518 xhci_free_virt_device(xhci
, udev
->slot_id
);
3519 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3523 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3524 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3525 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3528 xhci_ring_cmd_db(xhci
);
3529 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3531 * Event command completion handler will free any data structures
3532 * associated with the slot. XXX Can free sleep?
3537 * Checks if we have enough host controller resources for the default control
3540 * Must be called with xhci->lock held.
3542 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3544 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3545 xhci_dbg(xhci
, "Not enough ep ctxs: "
3546 "%u active, need to add 1, limit is %u.\n",
3547 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3550 xhci
->num_active_eps
+= 1;
3551 xhci_dbg(xhci
, "Adding 1 ep ctx, %u now active.\n",
3552 xhci
->num_active_eps
);
3558 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3559 * timed out, or allocating memory failed. Returns 1 on success.
3561 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3563 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3564 unsigned long flags
;
3567 union xhci_trb
*cmd_trb
;
3569 spin_lock_irqsave(&xhci
->lock
, flags
);
3570 cmd_trb
= xhci
->cmd_ring
->dequeue
;
3571 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3573 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3574 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3577 xhci_ring_cmd_db(xhci
);
3578 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3580 /* XXX: how much time for xHC slot assignment? */
3581 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3582 XHCI_CMD_DEFAULT_TIMEOUT
);
3583 if (timeleft
<= 0) {
3584 xhci_warn(xhci
, "%s while waiting for a slot\n",
3585 timeleft
== 0 ? "Timeout" : "Signal");
3586 /* cancel the enable slot request */
3587 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3590 if (!xhci
->slot_id
) {
3591 xhci_err(xhci
, "Error while assigning device slot ID\n");
3595 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3596 spin_lock_irqsave(&xhci
->lock
, flags
);
3597 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3599 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3600 xhci_warn(xhci
, "Not enough host resources, "
3601 "active endpoint contexts = %u\n",
3602 xhci
->num_active_eps
);
3605 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3607 /* Use GFP_NOIO, since this function can be called from
3608 * xhci_discover_or_reset_device(), which may be called as part of
3609 * mass storage driver error handling.
3611 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3612 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3615 udev
->slot_id
= xhci
->slot_id
;
3616 /* Is this a LS or FS device under a HS hub? */
3617 /* Hub or peripherial? */
3621 /* Disable slot, if we can do it without mem alloc */
3622 spin_lock_irqsave(&xhci
->lock
, flags
);
3623 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3624 xhci_ring_cmd_db(xhci
);
3625 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3630 * Issue an Address Device command (which will issue a SetAddress request to
3632 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3633 * we should only issue and wait on one address command at the same time.
3635 * We add one to the device address issued by the hardware because the USB core
3636 * uses address 1 for the root hubs (even though they're not really devices).
3638 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3640 unsigned long flags
;
3642 struct xhci_virt_device
*virt_dev
;
3644 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3645 struct xhci_slot_ctx
*slot_ctx
;
3646 struct xhci_input_control_ctx
*ctrl_ctx
;
3648 union xhci_trb
*cmd_trb
;
3650 if (!udev
->slot_id
) {
3651 xhci_dbg(xhci
, "Bad Slot ID %d\n", udev
->slot_id
);
3655 virt_dev
= xhci
->devs
[udev
->slot_id
];
3657 if (WARN_ON(!virt_dev
)) {
3659 * In plug/unplug torture test with an NEC controller,
3660 * a zero-dereference was observed once due to virt_dev = 0.
3661 * Print useful debug rather than crash if it is observed again!
3663 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3668 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3670 * If this is the first Set Address since device plug-in or
3671 * virt_device realloaction after a resume with an xHCI power loss,
3672 * then set up the slot context.
3674 if (!slot_ctx
->dev_info
)
3675 xhci_setup_addressable_virt_dev(xhci
, udev
);
3676 /* Otherwise, update the control endpoint ring enqueue pointer. */
3678 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3679 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3680 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3681 ctrl_ctx
->drop_flags
= 0;
3683 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3684 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3686 spin_lock_irqsave(&xhci
->lock
, flags
);
3687 cmd_trb
= xhci
->cmd_ring
->dequeue
;
3688 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3691 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3692 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3695 xhci_ring_cmd_db(xhci
);
3696 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3698 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3699 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3700 XHCI_CMD_DEFAULT_TIMEOUT
);
3701 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3702 * the SetAddress() "recovery interval" required by USB and aborting the
3703 * command on a timeout.
3705 if (timeleft
<= 0) {
3706 xhci_warn(xhci
, "%s while waiting for address device command\n",
3707 timeleft
== 0 ? "Timeout" : "Signal");
3708 /* cancel the address device command */
3709 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3715 switch (virt_dev
->cmd_status
) {
3716 case COMP_CTX_STATE
:
3718 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3723 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3727 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3728 "device command.\n");
3732 xhci_dbg(xhci
, "Successful Address Device command\n");
3735 xhci_err(xhci
, "ERROR: unexpected command completion "
3736 "code 0x%x.\n", virt_dev
->cmd_status
);
3737 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3738 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3745 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3746 xhci_dbg(xhci
, "Op regs DCBAA ptr = %#016llx\n", temp_64
);
3747 xhci_dbg(xhci
, "Slot ID %d dcbaa entry @%p = %#016llx\n",
3749 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3750 (unsigned long long)
3751 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3752 xhci_dbg(xhci
, "Output Context DMA address = %#08llx\n",
3753 (unsigned long long)virt_dev
->out_ctx
->dma
);
3754 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3755 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3756 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3757 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3759 * USB core uses address 1 for the roothubs, so we add one to the
3760 * address given back to us by the HC.
3762 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3763 /* Use kernel assigned address for devices; store xHC assigned
3764 * address locally. */
3765 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3767 /* Zero the input context control for later use */
3768 ctrl_ctx
->add_flags
= 0;
3769 ctrl_ctx
->drop_flags
= 0;
3771 xhci_dbg(xhci
, "Internal device address = %d\n", virt_dev
->address
);
3776 #ifdef CONFIG_USB_SUSPEND
3778 /* BESL to HIRD Encoding array for USB2 LPM */
3779 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3780 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3782 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3783 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3784 struct usb_device
*udev
)
3786 int u2del
, besl
, besl_host
;
3787 int besl_device
= 0;
3790 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3791 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3793 if (field
& USB_BESL_SUPPORT
) {
3794 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3795 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3798 /* Use baseline BESL value as default */
3799 if (field
& USB_BESL_BASELINE_VALID
)
3800 besl_device
= USB_GET_BESL_BASELINE(field
);
3801 else if (field
& USB_BESL_DEEP_VALID
)
3802 besl_device
= USB_GET_BESL_DEEP(field
);
3807 besl_host
= (u2del
- 51) / 75 + 1;
3810 besl
= besl_host
+ besl_device
;
3817 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
3818 struct usb_device
*udev
)
3820 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3821 struct dev_info
*dev_info
;
3822 __le32 __iomem
**port_array
;
3823 __le32 __iomem
*addr
, *pm_addr
;
3825 unsigned int port_num
;
3826 unsigned long flags
;
3830 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
3834 /* we only support lpm for non-hub device connected to root hub yet */
3835 if (!udev
->parent
|| udev
->parent
->parent
||
3836 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3839 spin_lock_irqsave(&xhci
->lock
, flags
);
3841 /* Look for devices in lpm_failed_devs list */
3842 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
3843 le16_to_cpu(udev
->descriptor
.idProduct
);
3844 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
3845 if (dev_info
->dev_id
== dev_id
) {
3851 port_array
= xhci
->usb2_ports
;
3852 port_num
= udev
->portnum
- 1;
3854 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
3855 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
3861 * Test USB 2.0 software LPM.
3862 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
3863 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
3864 * in the June 2011 errata release.
3866 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
3868 * Set L1 Device Slot and HIRD/BESL.
3869 * Check device's USB 2.0 extension descriptor to determine whether
3870 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
3872 pm_addr
= port_array
[port_num
] + 1;
3873 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3874 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
3875 xhci_writel(xhci
, temp
, pm_addr
);
3877 /* Set port link state to U2(L1) */
3878 addr
= port_array
[port_num
];
3879 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
3882 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3884 spin_lock_irqsave(&xhci
->lock
, flags
);
3886 /* Check L1 Status */
3887 ret
= handshake(xhci
, pm_addr
, PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
3888 if (ret
!= -ETIMEDOUT
) {
3889 /* enter L1 successfully */
3890 temp
= xhci_readl(xhci
, addr
);
3891 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
3895 temp
= xhci_readl(xhci
, pm_addr
);
3896 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
3897 port_num
, temp
& PORT_L1S_MASK
);
3901 /* Resume the port */
3902 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
3904 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3906 spin_lock_irqsave(&xhci
->lock
, flags
);
3909 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
3911 /* Check PORTSC to make sure the device is in the right state */
3913 temp
= xhci_readl(xhci
, addr
);
3914 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
3915 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
3916 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
3917 xhci_dbg(xhci
, "port L1 resume fail\n");
3923 /* Insert dev to lpm_failed_devs list */
3924 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
3926 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
3931 dev_info
->dev_id
= dev_id
;
3932 INIT_LIST_HEAD(&dev_info
->list
);
3933 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
3935 xhci_ring_device(xhci
, udev
->slot_id
);
3939 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3943 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
3944 struct usb_device
*udev
, int enable
)
3946 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3947 __le32 __iomem
**port_array
;
3948 __le32 __iomem
*pm_addr
;
3950 unsigned int port_num
;
3951 unsigned long flags
;
3954 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
3958 if (!udev
->parent
|| udev
->parent
->parent
||
3959 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
3962 if (udev
->usb2_hw_lpm_capable
!= 1)
3965 spin_lock_irqsave(&xhci
->lock
, flags
);
3967 port_array
= xhci
->usb2_ports
;
3968 port_num
= udev
->portnum
- 1;
3969 pm_addr
= port_array
[port_num
] + 1;
3970 temp
= xhci_readl(xhci
, pm_addr
);
3972 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
3973 enable
? "enable" : "disable", port_num
);
3975 hird
= xhci_calculate_hird_besl(xhci
, udev
);
3978 temp
&= ~PORT_HIRD_MASK
;
3979 temp
|= PORT_HIRD(hird
) | PORT_RWE
;
3980 xhci_writel(xhci
, temp
, pm_addr
);
3981 temp
= xhci_readl(xhci
, pm_addr
);
3983 xhci_writel(xhci
, temp
, pm_addr
);
3985 temp
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
3986 xhci_writel(xhci
, temp
, pm_addr
);
3989 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3993 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3995 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3998 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
4000 xhci_dbg(xhci
, "software LPM test succeed\n");
4001 if (xhci
->hw_lpm_support
== 1) {
4002 udev
->usb2_hw_lpm_capable
= 1;
4003 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
4005 udev
->usb2_hw_lpm_enabled
= 1;
4014 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4015 struct usb_device
*udev
, int enable
)
4020 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4025 #endif /* CONFIG_USB_SUSPEND */
4027 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4030 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4031 static unsigned long long xhci_service_interval_to_ns(
4032 struct usb_endpoint_descriptor
*desc
)
4034 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4037 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4038 enum usb3_link_state state
)
4040 unsigned long long sel
;
4041 unsigned long long pel
;
4042 unsigned int max_sel_pel
;
4047 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4048 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4049 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4050 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4054 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4055 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4056 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4060 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4062 return USB3_LPM_DISABLED
;
4065 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4066 return USB3_LPM_DEVICE_INITIATED
;
4068 if (sel
> max_sel_pel
)
4069 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4070 "due to long SEL %llu ms\n",
4073 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4074 "due to long PEL %llu\n ms",
4076 return USB3_LPM_DISABLED
;
4079 /* Returns the hub-encoded U1 timeout value.
4080 * The U1 timeout should be the maximum of the following values:
4081 * - For control endpoints, U1 system exit latency (SEL) * 3
4082 * - For bulk endpoints, U1 SEL * 5
4083 * - For interrupt endpoints:
4084 * - Notification EPs, U1 SEL * 3
4085 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4086 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4088 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4089 struct usb_endpoint_descriptor
*desc
)
4091 unsigned long long timeout_ns
;
4095 ep_type
= usb_endpoint_type(desc
);
4097 case USB_ENDPOINT_XFER_CONTROL
:
4098 timeout_ns
= udev
->u1_params
.sel
* 3;
4100 case USB_ENDPOINT_XFER_BULK
:
4101 timeout_ns
= udev
->u1_params
.sel
* 5;
4103 case USB_ENDPOINT_XFER_INT
:
4104 intr_type
= usb_endpoint_interrupt_type(desc
);
4105 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4106 timeout_ns
= udev
->u1_params
.sel
* 3;
4109 /* Otherwise the calculation is the same as isoc eps */
4110 case USB_ENDPOINT_XFER_ISOC
:
4111 timeout_ns
= xhci_service_interval_to_ns(desc
);
4112 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4113 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4114 timeout_ns
= udev
->u1_params
.sel
* 2;
4120 /* The U1 timeout is encoded in 1us intervals. */
4121 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4122 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4123 if (timeout_ns
== USB3_LPM_DISABLED
)
4126 /* If the necessary timeout value is bigger than what we can set in the
4127 * USB 3.0 hub, we have to disable hub-initiated U1.
4129 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4131 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4132 "due to long timeout %llu ms\n", timeout_ns
);
4133 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4136 /* Returns the hub-encoded U2 timeout value.
4137 * The U2 timeout should be the maximum of:
4138 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4139 * - largest bInterval of any active periodic endpoint (to avoid going
4140 * into lower power link states between intervals).
4141 * - the U2 Exit Latency of the device
4143 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4144 struct usb_endpoint_descriptor
*desc
)
4146 unsigned long long timeout_ns
;
4147 unsigned long long u2_del_ns
;
4149 timeout_ns
= 10 * 1000 * 1000;
4151 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4152 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4153 timeout_ns
= xhci_service_interval_to_ns(desc
);
4155 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4156 if (u2_del_ns
> timeout_ns
)
4157 timeout_ns
= u2_del_ns
;
4159 /* The U2 timeout is encoded in 256us intervals */
4160 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4161 /* If the necessary timeout value is bigger than what we can set in the
4162 * USB 3.0 hub, we have to disable hub-initiated U2.
4164 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4166 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4167 "due to long timeout %llu ms\n", timeout_ns
);
4168 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4171 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4172 struct usb_device
*udev
,
4173 struct usb_endpoint_descriptor
*desc
,
4174 enum usb3_link_state state
,
4177 if (state
== USB3_LPM_U1
) {
4178 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4179 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4181 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4182 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4185 return USB3_LPM_DISABLED
;
4188 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4189 struct usb_device
*udev
,
4190 struct usb_endpoint_descriptor
*desc
,
4191 enum usb3_link_state state
,
4196 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4197 desc
, state
, timeout
);
4199 /* If we found we can't enable hub-initiated LPM, or
4200 * the U1 or U2 exit latency was too high to allow
4201 * device-initiated LPM as well, just stop searching.
4203 if (alt_timeout
== USB3_LPM_DISABLED
||
4204 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4205 *timeout
= alt_timeout
;
4208 if (alt_timeout
> *timeout
)
4209 *timeout
= alt_timeout
;
4213 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4214 struct usb_device
*udev
,
4215 struct usb_host_interface
*alt
,
4216 enum usb3_link_state state
,
4221 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4222 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4223 &alt
->endpoint
[j
].desc
, state
, timeout
))
4230 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4231 enum usb3_link_state state
)
4233 struct usb_device
*parent
;
4234 unsigned int num_hubs
;
4236 if (state
== USB3_LPM_U2
)
4239 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4240 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4241 parent
= parent
->parent
)
4247 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4248 " below second-tier hub.\n");
4249 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4250 "to decrease power consumption.\n");
4254 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4255 struct usb_device
*udev
,
4256 enum usb3_link_state state
)
4258 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4259 return xhci_check_intel_tier_policy(udev
, state
);
4263 /* Returns the U1 or U2 timeout that should be enabled.
4264 * If the tier check or timeout setting functions return with a non-zero exit
4265 * code, that means the timeout value has been finalized and we shouldn't look
4266 * at any more endpoints.
4268 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4269 struct usb_device
*udev
, enum usb3_link_state state
)
4271 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4272 struct usb_host_config
*config
;
4275 u16 timeout
= USB3_LPM_DISABLED
;
4277 if (state
== USB3_LPM_U1
)
4279 else if (state
== USB3_LPM_U2
)
4282 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4287 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4290 /* Gather some information about the currently installed configuration
4291 * and alternate interface settings.
4293 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4297 config
= udev
->actconfig
;
4301 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4302 struct usb_driver
*driver
;
4303 struct usb_interface
*intf
= config
->interface
[i
];
4308 /* Check if any currently bound drivers want hub-initiated LPM
4311 if (intf
->dev
.driver
) {
4312 driver
= to_usb_driver(intf
->dev
.driver
);
4313 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4314 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4315 "at request of driver %s\n",
4316 state_name
, driver
->name
);
4317 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4321 /* Not sure how this could happen... */
4322 if (!intf
->cur_altsetting
)
4325 if (xhci_update_timeout_for_interface(xhci
, udev
,
4326 intf
->cur_altsetting
,
4334 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
4335 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
4337 static int xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
4338 struct usb_device
*udev
, u16 max_exit_latency
)
4340 struct xhci_virt_device
*virt_dev
;
4341 struct xhci_command
*command
;
4342 struct xhci_input_control_ctx
*ctrl_ctx
;
4343 struct xhci_slot_ctx
*slot_ctx
;
4344 unsigned long flags
;
4347 spin_lock_irqsave(&xhci
->lock
, flags
);
4348 if (max_exit_latency
== xhci
->devs
[udev
->slot_id
]->current_mel
) {
4349 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4353 /* Attempt to issue an Evaluate Context command to change the MEL. */
4354 virt_dev
= xhci
->devs
[udev
->slot_id
];
4355 command
= xhci
->lpm_command
;
4356 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
4357 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4359 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
4360 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4361 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
4362 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
4363 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
4365 xhci_dbg(xhci
, "Set up evaluate context for LPM MEL change.\n");
4366 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
4367 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
4369 /* Issue and wait for the evaluate context command. */
4370 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
4372 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
4373 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
4376 spin_lock_irqsave(&xhci
->lock
, flags
);
4377 virt_dev
->current_mel
= max_exit_latency
;
4378 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4383 static int calculate_max_exit_latency(struct usb_device
*udev
,
4384 enum usb3_link_state state_changed
,
4385 u16 hub_encoded_timeout
)
4387 unsigned long long u1_mel_us
= 0;
4388 unsigned long long u2_mel_us
= 0;
4389 unsigned long long mel_us
= 0;
4395 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4396 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4397 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4398 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4400 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4401 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4402 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4403 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4405 /* If U1 was already enabled and we're not disabling it,
4406 * or we're going to enable U1, account for the U1 max exit latency.
4408 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4410 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4411 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4413 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4415 if (u1_mel_us
> u2_mel_us
)
4419 /* xHCI host controller max exit latency field is only 16 bits wide. */
4420 if (mel_us
> MAX_EXIT
) {
4421 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4422 "is too big.\n", mel_us
);
4428 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4429 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4430 struct usb_device
*udev
, enum usb3_link_state state
)
4432 struct xhci_hcd
*xhci
;
4433 u16 hub_encoded_timeout
;
4437 xhci
= hcd_to_xhci(hcd
);
4438 /* The LPM timeout values are pretty host-controller specific, so don't
4439 * enable hub-initiated timeouts unless the vendor has provided
4440 * information about their timeout algorithm.
4442 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4443 !xhci
->devs
[udev
->slot_id
])
4444 return USB3_LPM_DISABLED
;
4446 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4447 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4449 /* Max Exit Latency is too big, disable LPM. */
4450 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4454 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4457 return hub_encoded_timeout
;
4460 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4461 struct usb_device
*udev
, enum usb3_link_state state
)
4463 struct xhci_hcd
*xhci
;
4467 xhci
= hcd_to_xhci(hcd
);
4468 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4469 !xhci
->devs
[udev
->slot_id
])
4472 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4473 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4478 #else /* CONFIG_PM */
4480 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4481 struct usb_device
*udev
, enum usb3_link_state state
)
4483 return USB3_LPM_DISABLED
;
4486 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4487 struct usb_device
*udev
, enum usb3_link_state state
)
4491 #endif /* CONFIG_PM */
4493 /*-------------------------------------------------------------------------*/
4495 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4496 * internal data structures for the device.
4498 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4499 struct usb_tt
*tt
, gfp_t mem_flags
)
4501 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4502 struct xhci_virt_device
*vdev
;
4503 struct xhci_command
*config_cmd
;
4504 struct xhci_input_control_ctx
*ctrl_ctx
;
4505 struct xhci_slot_ctx
*slot_ctx
;
4506 unsigned long flags
;
4507 unsigned think_time
;
4510 /* Ignore root hubs */
4514 vdev
= xhci
->devs
[hdev
->slot_id
];
4516 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4519 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4521 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4525 spin_lock_irqsave(&xhci
->lock
, flags
);
4526 if (hdev
->speed
== USB_SPEED_HIGH
&&
4527 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4528 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4529 xhci_free_command(xhci
, config_cmd
);
4530 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4534 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4535 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4536 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4537 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4538 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4540 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4541 if (xhci
->hci_version
> 0x95) {
4542 xhci_dbg(xhci
, "xHCI version %x needs hub "
4543 "TT think time and number of ports\n",
4544 (unsigned int) xhci
->hci_version
);
4545 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4546 /* Set TT think time - convert from ns to FS bit times.
4547 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4548 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4550 * xHCI 1.0: this field shall be 0 if the device is not a
4553 think_time
= tt
->think_time
;
4554 if (think_time
!= 0)
4555 think_time
= (think_time
/ 666) - 1;
4556 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4557 slot_ctx
->tt_info
|=
4558 cpu_to_le32(TT_THINK_TIME(think_time
));
4560 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4561 "TT think time or number of ports\n",
4562 (unsigned int) xhci
->hci_version
);
4564 slot_ctx
->dev_state
= 0;
4565 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4567 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4568 (xhci
->hci_version
> 0x95) ?
4569 "configure endpoint" : "evaluate context");
4570 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4571 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4573 /* Issue and wait for the configure endpoint or
4574 * evaluate context command.
4576 if (xhci
->hci_version
> 0x95)
4577 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4580 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4583 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4584 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4586 xhci_free_command(xhci
, config_cmd
);
4590 int xhci_get_frame(struct usb_hcd
*hcd
)
4592 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4593 /* EHCI mods by the periodic size. Why? */
4594 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4597 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4599 struct xhci_hcd
*xhci
;
4600 struct device
*dev
= hcd
->self
.controller
;
4604 /* Accept arbitrarily long scatter-gather lists */
4605 hcd
->self
.sg_tablesize
= ~0;
4606 /* XHCI controllers don't stop the ep queue on short packets :| */
4607 hcd
->self
.no_stop_on_short
= 1;
4609 if (usb_hcd_is_primary_hcd(hcd
)) {
4610 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4613 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4614 xhci
->main_hcd
= hcd
;
4615 /* Mark the first roothub as being USB 2.0.
4616 * The xHCI driver will register the USB 3.0 roothub.
4618 hcd
->speed
= HCD_USB2
;
4619 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4621 * USB 2.0 roothub under xHCI has an integrated TT,
4622 * (rate matching hub) as opposed to having an OHCI/UHCI
4623 * companion controller.
4627 /* xHCI private pointer was set in xhci_pci_probe for the second
4628 * registered roothub.
4630 xhci
= hcd_to_xhci(hcd
);
4631 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4632 if (HCC_64BIT_ADDR(temp
)) {
4633 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4634 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4636 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4641 xhci
->cap_regs
= hcd
->regs
;
4642 xhci
->op_regs
= hcd
->regs
+
4643 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4644 xhci
->run_regs
= hcd
->regs
+
4645 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4646 /* Cache read-only capability registers */
4647 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4648 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4649 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4650 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4651 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4652 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4653 xhci_print_registers(xhci
);
4655 get_quirks(dev
, xhci
);
4657 /* Make sure the HC is halted. */
4658 retval
= xhci_halt(xhci
);
4662 xhci_dbg(xhci
, "Resetting HCD\n");
4663 /* Reset the internal HC memory state and registers. */
4664 retval
= xhci_reset(xhci
);
4667 xhci_dbg(xhci
, "Reset complete\n");
4669 temp
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4670 if (HCC_64BIT_ADDR(temp
)) {
4671 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4672 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(64));
4674 dma_set_mask(hcd
->self
.controller
, DMA_BIT_MASK(32));
4677 xhci_dbg(xhci
, "Calling HCD init\n");
4678 /* Initialize HCD and host controller data structures. */
4679 retval
= xhci_init(hcd
);
4682 xhci_dbg(xhci
, "Called HCD init\n");
4689 MODULE_DESCRIPTION(DRIVER_DESC
);
4690 MODULE_AUTHOR(DRIVER_AUTHOR
);
4691 MODULE_LICENSE("GPL");
4693 static int __init
xhci_hcd_init(void)
4697 retval
= xhci_register_pci();
4699 printk(KERN_DEBUG
"Problem registering PCI driver.");
4702 retval
= xhci_register_plat();
4704 printk(KERN_DEBUG
"Problem registering platform driver.");
4708 * Check the compiler generated sizes of structures that must be laid
4709 * out in specific ways for hardware access.
4711 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4712 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4713 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4714 /* xhci_device_control has eight fields, and also
4715 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4717 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4718 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4719 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4720 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4721 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4722 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4723 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4726 xhci_unregister_pci();
4729 module_init(xhci_hcd_init
);
4731 static void __exit
xhci_hcd_cleanup(void)
4733 xhci_unregister_pci();
4734 xhci_unregister_plat();
4736 module_exit(xhci_hcd_cleanup
);