2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2008 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <linux/rculist.h>
15 #include <linux/slab.h>
16 #include <asm/sn/addrs.h>
17 #include <asm/sn/arch.h>
18 #include <asm/sn/intr.h>
19 #include <asm/sn/pcibr_provider.h>
20 #include <asm/sn/pcibus_provider_defs.h>
21 #include <asm/sn/pcidev.h>
22 #include <asm/sn/shub_mmr.h>
23 #include <asm/sn/sn_sal.h>
24 #include <asm/sn/sn_feature_sets.h>
26 static void force_interrupt(int irq
);
27 static void register_intr_pda(struct sn_irq_info
*sn_irq_info
);
28 static void unregister_intr_pda(struct sn_irq_info
*sn_irq_info
);
30 int sn_force_interrupt_flag
= 1;
31 extern int sn_ioif_inited
;
32 struct list_head
**sn_irq_lh
;
33 static DEFINE_SPINLOCK(sn_irq_info_lock
); /* non-IRQ lock */
35 u64
sn_intr_alloc(nasid_t local_nasid
, int local_widget
,
36 struct sn_irq_info
*sn_irq_info
,
37 int req_irq
, nasid_t req_nasid
,
40 struct ia64_sal_retval ret_stuff
;
44 SAL_CALL_NOLOCK(ret_stuff
, (u64
) SN_SAL_IOIF_INTERRUPT
,
45 (u64
) SAL_INTR_ALLOC
, (u64
) local_nasid
,
46 (u64
) local_widget
, __pa(sn_irq_info
), (u64
) req_irq
,
47 (u64
) req_nasid
, (u64
) req_slice
);
49 return ret_stuff
.status
;
52 void sn_intr_free(nasid_t local_nasid
, int local_widget
,
53 struct sn_irq_info
*sn_irq_info
)
55 struct ia64_sal_retval ret_stuff
;
59 SAL_CALL_NOLOCK(ret_stuff
, (u64
) SN_SAL_IOIF_INTERRUPT
,
60 (u64
) SAL_INTR_FREE
, (u64
) local_nasid
,
61 (u64
) local_widget
, (u64
) sn_irq_info
->irq_irq
,
62 (u64
) sn_irq_info
->irq_cookie
, 0, 0);
65 u64
sn_intr_redirect(nasid_t local_nasid
, int local_widget
,
66 struct sn_irq_info
*sn_irq_info
,
67 nasid_t req_nasid
, int req_slice
)
69 struct ia64_sal_retval ret_stuff
;
73 SAL_CALL_NOLOCK(ret_stuff
, (u64
) SN_SAL_IOIF_INTERRUPT
,
74 (u64
) SAL_INTR_REDIRECT
, (u64
) local_nasid
,
75 (u64
) local_widget
, __pa(sn_irq_info
),
76 (u64
) req_nasid
, (u64
) req_slice
, 0);
78 return ret_stuff
.status
;
81 static unsigned int sn_startup_irq(unsigned int irq
)
86 static void sn_shutdown_irq(unsigned int irq
)
90 extern void ia64_mca_register_cpev(int);
92 static void sn_disable_irq(unsigned int irq
)
94 if (irq
== local_vector_to_irq(IA64_CPE_VECTOR
))
95 ia64_mca_register_cpev(0);
98 static void sn_enable_irq(unsigned int irq
)
100 if (irq
== local_vector_to_irq(IA64_CPE_VECTOR
))
101 ia64_mca_register_cpev(irq
);
104 static void sn_ack_irq(unsigned int irq
)
106 u64 event_occurred
, mask
;
109 event_occurred
= HUB_L((u64
*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED
));
110 mask
= event_occurred
& SH_ALL_INT_MASK
;
111 HUB_S((u64
*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS
), mask
);
112 __set_bit(irq
, (volatile void *)pda
->sn_in_service_ivecs
);
114 move_native_irq(irq
);
117 static void sn_end_irq(unsigned int irq
)
123 if (ivec
== SGI_UART_VECTOR
) {
124 event_occurred
= HUB_L((u64
*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED
));
125 /* If the UART bit is set here, we may have received an
126 * interrupt from the UART that the driver missed. To
127 * make sure, we IPI ourselves to force us to look again.
129 if (event_occurred
& SH_EVENT_OCCURRED_UART_INT_MASK
) {
130 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR
,
134 __clear_bit(ivec
, (volatile void *)pda
->sn_in_service_ivecs
);
135 if (sn_force_interrupt_flag
)
136 force_interrupt(irq
);
139 static void sn_irq_info_free(struct rcu_head
*head
);
141 struct sn_irq_info
*sn_retarget_vector(struct sn_irq_info
*sn_irq_info
,
142 nasid_t nasid
, int slice
)
150 int local_widget
, status
;
152 struct sn_irq_info
*new_irq_info
;
153 struct sn_pcibus_provider
*pci_provider
;
155 bridge
= (u64
) sn_irq_info
->irq_bridge
;
157 return NULL
; /* irq is not a device interrupt */
160 local_nasid
= NASID_GET(bridge
);
163 local_widget
= TIO_SWIN_WIDGETNUM(bridge
);
165 local_widget
= SWIN_WIDGETNUM(bridge
);
166 vector
= sn_irq_info
->irq_irq
;
168 /* Make use of SAL_INTR_REDIRECT if PROM supports it */
169 status
= sn_intr_redirect(local_nasid
, local_widget
, sn_irq_info
, nasid
, slice
);
171 new_irq_info
= sn_irq_info
;
176 * PROM does not support SAL_INTR_REDIRECT, or it failed.
177 * Revert to old method.
179 new_irq_info
= kmalloc(sizeof(struct sn_irq_info
), GFP_ATOMIC
);
180 if (new_irq_info
== NULL
)
183 memcpy(new_irq_info
, sn_irq_info
, sizeof(struct sn_irq_info
));
185 /* Free the old PROM new_irq_info structure */
186 sn_intr_free(local_nasid
, local_widget
, new_irq_info
);
187 unregister_intr_pda(new_irq_info
);
189 /* allocate a new PROM new_irq_info struct */
190 status
= sn_intr_alloc(local_nasid
, local_widget
,
191 new_irq_info
, vector
,
194 /* SAL call failed */
200 register_intr_pda(new_irq_info
);
201 spin_lock(&sn_irq_info_lock
);
202 list_replace_rcu(&sn_irq_info
->list
, &new_irq_info
->list
);
203 spin_unlock(&sn_irq_info_lock
);
204 call_rcu(&sn_irq_info
->rcu
, sn_irq_info_free
);
208 /* Update kernels new_irq_info with new target info */
209 cpuid
= nasid_slice_to_cpuid(new_irq_info
->irq_nasid
,
210 new_irq_info
->irq_slice
);
211 new_irq_info
->irq_cpuid
= cpuid
;
213 pci_provider
= sn_pci_provider
[new_irq_info
->irq_bridge_type
];
216 * If this represents a line interrupt, target it. If it's
217 * an msi (irq_int_bit < 0), it's already targeted.
219 if (new_irq_info
->irq_int_bit
>= 0 &&
220 pci_provider
&& pci_provider
->target_interrupt
)
221 (pci_provider
->target_interrupt
)(new_irq_info
);
224 cpuphys
= cpu_physical_id(cpuid
);
225 set_irq_affinity_info((vector
& 0xff), cpuphys
, 0);
231 static int sn_set_affinity_irq(unsigned int irq
, const struct cpumask
*mask
)
233 struct sn_irq_info
*sn_irq_info
, *sn_irq_info_safe
;
237 nasid
= cpuid_to_nasid(cpumask_first(mask
));
238 slice
= cpuid_to_slice(cpumask_first(mask
));
240 list_for_each_entry_safe(sn_irq_info
, sn_irq_info_safe
,
241 sn_irq_lh
[irq
], list
)
242 (void)sn_retarget_vector(sn_irq_info
, nasid
, slice
);
248 void sn_set_err_irq_affinity(unsigned int irq
)
251 * On systems which support CPU disabling (SHub2), all error interrupts
252 * are targetted at the boot CPU.
254 if (is_shub2() && sn_prom_feature_available(PRF_CPU_DISABLE_SUPPORT
))
255 set_irq_affinity_info(irq
, cpu_physical_id(0), 0);
258 void sn_set_err_irq_affinity(unsigned int irq
) { }
262 sn_mask_irq(unsigned int irq
)
267 sn_unmask_irq(unsigned int irq
)
271 struct irq_chip irq_type_sn
= {
273 .startup
= sn_startup_irq
,
274 .shutdown
= sn_shutdown_irq
,
275 .enable
= sn_enable_irq
,
276 .disable
= sn_disable_irq
,
280 .unmask
= sn_unmask_irq
,
281 .set_affinity
= sn_set_affinity_irq
284 ia64_vector
sn_irq_to_vector(int irq
)
286 if (irq
>= IA64_NUM_VECTORS
)
288 return (ia64_vector
)irq
;
291 unsigned int sn_local_vector_to_irq(u8 vector
)
293 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector
));
296 void sn_irq_init(void)
299 struct irq_desc
*base_desc
= irq_desc
;
301 ia64_first_device_vector
= IA64_SN2_FIRST_DEVICE_VECTOR
;
302 ia64_last_device_vector
= IA64_SN2_LAST_DEVICE_VECTOR
;
304 for (i
= 0; i
< NR_IRQS
; i
++) {
305 if (base_desc
[i
].chip
== &no_irq_chip
) {
306 base_desc
[i
].chip
= &irq_type_sn
;
311 static void register_intr_pda(struct sn_irq_info
*sn_irq_info
)
313 int irq
= sn_irq_info
->irq_irq
;
314 int cpu
= sn_irq_info
->irq_cpuid
;
316 if (pdacpu(cpu
)->sn_last_irq
< irq
) {
317 pdacpu(cpu
)->sn_last_irq
= irq
;
320 if (pdacpu(cpu
)->sn_first_irq
== 0 || pdacpu(cpu
)->sn_first_irq
> irq
)
321 pdacpu(cpu
)->sn_first_irq
= irq
;
324 static void unregister_intr_pda(struct sn_irq_info
*sn_irq_info
)
326 int irq
= sn_irq_info
->irq_irq
;
327 int cpu
= sn_irq_info
->irq_cpuid
;
328 struct sn_irq_info
*tmp_irq_info
;
332 if (pdacpu(cpu
)->sn_last_irq
== irq
) {
334 for (i
= pdacpu(cpu
)->sn_last_irq
- 1;
335 i
&& !foundmatch
; i
--) {
336 list_for_each_entry_rcu(tmp_irq_info
,
339 if (tmp_irq_info
->irq_cpuid
== cpu
) {
345 pdacpu(cpu
)->sn_last_irq
= i
;
348 if (pdacpu(cpu
)->sn_first_irq
== irq
) {
350 for (i
= pdacpu(cpu
)->sn_first_irq
+ 1;
351 i
< NR_IRQS
&& !foundmatch
; i
++) {
352 list_for_each_entry_rcu(tmp_irq_info
,
355 if (tmp_irq_info
->irq_cpuid
== cpu
) {
361 pdacpu(cpu
)->sn_first_irq
= ((i
== NR_IRQS
) ? 0 : i
);
366 static void sn_irq_info_free(struct rcu_head
*head
)
368 struct sn_irq_info
*sn_irq_info
;
370 sn_irq_info
= container_of(head
, struct sn_irq_info
, rcu
);
374 void sn_irq_fixup(struct pci_dev
*pci_dev
, struct sn_irq_info
*sn_irq_info
)
376 nasid_t nasid
= sn_irq_info
->irq_nasid
;
377 int slice
= sn_irq_info
->irq_slice
;
378 int cpu
= nasid_slice_to_cpuid(nasid
, slice
);
381 struct irq_desc
*desc
;
384 pci_dev_get(pci_dev
);
385 sn_irq_info
->irq_cpuid
= cpu
;
386 sn_irq_info
->irq_pciioinfo
= SN_PCIDEV_INFO(pci_dev
);
388 /* link it into the sn_irq[irq] list */
389 spin_lock(&sn_irq_info_lock
);
390 list_add_rcu(&sn_irq_info
->list
, sn_irq_lh
[sn_irq_info
->irq_irq
]);
391 reserve_irq_vector(sn_irq_info
->irq_irq
);
392 spin_unlock(&sn_irq_info_lock
);
394 register_intr_pda(sn_irq_info
);
396 cpuphys
= cpu_physical_id(cpu
);
397 set_irq_affinity_info(sn_irq_info
->irq_irq
, cpuphys
, 0);
398 desc
= irq_to_desc(sn_irq_info
->irq_irq
);
400 * Affinity was set by the PROM, prevent it from
401 * being reset by the request_irq() path.
403 desc
->status
|= IRQ_AFFINITY_SET
;
407 void sn_irq_unfixup(struct pci_dev
*pci_dev
)
409 struct sn_irq_info
*sn_irq_info
;
411 /* Only cleanup IRQ stuff if this device has a host bus context */
412 if (!SN_PCIDEV_BUSSOFT(pci_dev
))
415 sn_irq_info
= SN_PCIDEV_INFO(pci_dev
)->pdi_sn_irq_info
;
418 if (!sn_irq_info
->irq_irq
) {
423 unregister_intr_pda(sn_irq_info
);
424 spin_lock(&sn_irq_info_lock
);
425 list_del_rcu(&sn_irq_info
->list
);
426 spin_unlock(&sn_irq_info_lock
);
427 if (list_empty(sn_irq_lh
[sn_irq_info
->irq_irq
]))
428 free_irq_vector(sn_irq_info
->irq_irq
);
429 call_rcu(&sn_irq_info
->rcu
, sn_irq_info_free
);
430 pci_dev_put(pci_dev
);
435 sn_call_force_intr_provider(struct sn_irq_info
*sn_irq_info
)
437 struct sn_pcibus_provider
*pci_provider
;
439 pci_provider
= sn_pci_provider
[sn_irq_info
->irq_bridge_type
];
441 /* Don't force an interrupt if the irq has been disabled */
442 if (!(irq_desc
[sn_irq_info
->irq_irq
].status
& IRQ_DISABLED
) &&
443 pci_provider
&& pci_provider
->force_interrupt
)
444 (*pci_provider
->force_interrupt
)(sn_irq_info
);
447 static void force_interrupt(int irq
)
449 struct sn_irq_info
*sn_irq_info
;
455 list_for_each_entry_rcu(sn_irq_info
, sn_irq_lh
[irq
], list
)
456 sn_call_force_intr_provider(sn_irq_info
);
462 * Check for lost interrupts. If the PIC int_status reg. says that
463 * an interrupt has been sent, but not handled, and the interrupt
464 * is not pending in either the cpu irr regs or in the soft irr regs,
465 * and the interrupt is not in service, then the interrupt may have
466 * been lost. Force an interrupt on that pin. It is possible that
467 * the interrupt is in flight, so we may generate a spurious interrupt,
468 * but we should never miss a real lost interrupt.
470 static void sn_check_intr(int irq
, struct sn_irq_info
*sn_irq_info
)
473 struct pcidev_info
*pcidev_info
;
474 struct pcibus_info
*pcibus_info
;
477 * Bridge types attached to TIO (anything but PIC) do not need this WAR
478 * since they do not target Shub II interrupt registers. If that
479 * ever changes, this check needs to accomodate.
481 if (sn_irq_info
->irq_bridge_type
!= PCIIO_ASIC_TYPE_PIC
)
484 pcidev_info
= (struct pcidev_info
*)sn_irq_info
->irq_pciioinfo
;
489 (struct pcibus_info
*)pcidev_info
->pdi_host_pcidev_info
->
491 regval
= pcireg_intr_status_get(pcibus_info
);
493 if (!ia64_get_irr(irq_to_vector(irq
))) {
494 if (!test_bit(irq
, pda
->sn_in_service_ivecs
)) {
496 if (sn_irq_info
->irq_int_bit
& regval
&
497 sn_irq_info
->irq_last_intr
) {
498 regval
&= ~(sn_irq_info
->irq_int_bit
& regval
);
499 sn_call_force_intr_provider(sn_irq_info
);
503 sn_irq_info
->irq_last_intr
= regval
;
506 void sn_lb_int_war_check(void)
508 struct sn_irq_info
*sn_irq_info
;
511 if (!sn_ioif_inited
|| pda
->sn_first_irq
== 0)
515 for (i
= pda
->sn_first_irq
; i
<= pda
->sn_last_irq
; i
++) {
516 list_for_each_entry_rcu(sn_irq_info
, sn_irq_lh
[i
], list
) {
517 sn_check_intr(i
, sn_irq_info
);
523 void __init
sn_irq_lh_init(void)
527 sn_irq_lh
= kmalloc(sizeof(struct list_head
*) * NR_IRQS
, GFP_KERNEL
);
529 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
531 for (i
= 0; i
< NR_IRQS
; i
++) {
532 sn_irq_lh
[i
] = kmalloc(sizeof(struct list_head
), GFP_KERNEL
);
534 panic("SN PCI INIT: Failed IRQ memory allocation\n");
536 INIT_LIST_HEAD(sn_irq_lh
[i
]);