6 #define DISPTYPE_CRT1 0x00000008L
7 #define DISPTYPE_CRT2 0x00000004L
8 #define DISPTYPE_LCD 0x00000002L
9 #define DISPTYPE_TV 0x00000001L
10 #define DISPTYPE_DISP1 DISPTYPE_CRT1
11 #define DISPTYPE_DISP2 (DISPTYPE_CRT2 | DISPTYPE_LCD | DISPTYPE_TV)
12 #define DISPMODE_SINGLE 0x00000020L
13 #define DISPMODE_MIRROR 0x00000010L
14 #define DISPMODE_DUALVIEW 0x00000040L
16 #define HASVB_NONE 0x00
17 #define HASVB_301 0x01
18 #define HASVB_LVDS 0x02
19 #define HASVB_TRUMPION 0x04
20 #define HASVB_LVDS_CHRONTEL 0x10
21 #define HASVB_302 0x20
22 #define HASVB_303 0x40
23 #define HASVB_CHRONTEL 0x80
26 #define XGIFB_ID 0x53495346 /* Identify myself with 'XGIF' */
43 TVTYPE_PALM
, // vicki@030226
44 TVTYPE_PALN
, // vicki@030226
45 TVTYPE_NTSCJ
, // vicki@030226
49 enum xgi_tv_plug
{ /* vicki@030226 */
58 TVPLUG_COMPOSITE_AND_SVIDEO
= 3,
60 TVPLUG_YPBPR_525i
= 5,
61 TVPLUG_YPBPR_525P
= 6,
62 TVPLUG_YPBPR_750P
= 7,
63 TVPLUG_YPBPR_1080i
= 8,
69 unsigned int video_size
;
70 unsigned long video_base
;
72 unsigned long mmio_base
;
73 unsigned long mmio_size
;
75 unsigned long vga_base
;
87 unsigned int refresh_rate
;
89 unsigned long disp_state
;
91 unsigned char TV_type
;
92 unsigned char TV_plug
;
94 enum XGI_CHIP_TYPE chip
;
95 unsigned char revision_id
;
97 unsigned short DstColor
;
98 unsigned long XGI310_AccelDepth
;
99 unsigned long CommandReg
;
102 unsigned int pcislot
;
103 unsigned int pcifunc
;
105 unsigned short subsysvendor
;
106 unsigned short subsysdevice
;
112 extern struct video_info xgi_video_info
;