arch/arm/mach-ep93xx/timer-ep93xx.c

   1 #include <linux/kernel.h>
   2 #include <linux/init.h>
   3 #include <linux/interrupt.h>
   4 #include <linux/irq.h>
   5 #include <linux/io.h>
   6 #include <asm/mach/time.h>
   7 #include "soc.h"
   8
   9 /*************************************************************************
  10  * Timer handling for EP93xx
  11  *************************************************************************
  12  * The ep93xx has four internal timers.  Timers 1, 2 (both 16 bit) and
  13  * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate
  14  * an interrupt on underflow.  Timer 4 (40 bit) counts down at 983.04 kHz,
  15  * is free-running, and can't generate interrupts.
  16  *
  17  * The 508 kHz timers are ideal for use for the timer interrupt, as the
  18  * most common values of HZ divide 508 kHz nicely.  We pick one of the 16
  19  * bit timers (timer 1) since we don't need more than 16 bits of reload
  20  * value as long as HZ >= 8.
  21  *
  22  * The higher clock rate of timer 4 makes it a better choice than the
  23  * other timers for use in gettimeoffset(), while the fact that it can't
  24  * generate interrupts means we don't have to worry about not being able
  25  * to use this timer for something else.  We also use timer 4 for keeping
  26  * track of lost jiffies.
  27  */
  28 #define EP93XX_TIMER_REG(x)             (EP93XX_TIMER_BASE + (x))
  29 #define EP93XX_TIMER1_LOAD              EP93XX_TIMER_REG(0x00)
  30 #define EP93XX_TIMER1_VALUE             EP93XX_TIMER_REG(0x04)
  31 #define EP93XX_TIMER1_CONTROL           EP93XX_TIMER_REG(0x08)
  32 #define EP93XX_TIMER123_CONTROL_ENABLE  (1 << 7)
  33 #define EP93XX_TIMER123_CONTROL_MODE    (1 << 6)
  34 #define EP93XX_TIMER123_CONTROL_CLKSEL  (1 << 3)
  35 #define EP93XX_TIMER1_CLEAR             EP93XX_TIMER_REG(0x0c)
  36 #define EP93XX_TIMER2_LOAD              EP93XX_TIMER_REG(0x20)
  37 #define EP93XX_TIMER2_VALUE             EP93XX_TIMER_REG(0x24)
  38 #define EP93XX_TIMER2_CONTROL           EP93XX_TIMER_REG(0x28)
  39 #define EP93XX_TIMER2_CLEAR             EP93XX_TIMER_REG(0x2c)
  40 #define EP93XX_TIMER4_VALUE_LOW         EP93XX_TIMER_REG(0x60)
  41 #define EP93XX_TIMER4_VALUE_HIGH        EP93XX_TIMER_REG(0x64)
  42 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8)
  43 #define EP93XX_TIMER3_LOAD              EP93XX_TIMER_REG(0x80)
  44 #define EP93XX_TIMER3_VALUE             EP93XX_TIMER_REG(0x84)
  45 #define EP93XX_TIMER3_CONTROL           EP93XX_TIMER_REG(0x88)
  46 #define EP93XX_TIMER3_CLEAR             EP93XX_TIMER_REG(0x8c)
  47
  48 #define EP93XX_TIMER123_CLOCK           508469
  49 #define EP93XX_TIMER4_CLOCK             983040
  50
  51 #define TIMER1_RELOAD                   ((EP93XX_TIMER123_CLOCK / HZ) - 1)
  52 #define TIMER4_TICKS_PER_JIFFY          DIV_ROUND_CLOSEST(EP93XX_TIMER4_CLOCK, HZ)
  53
  54 static unsigned int last_jiffy_time;
  55
  56 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id)
  57 {
  58         /* Writing any value clears the timer interrupt */
  59         __raw_writel(1, EP93XX_TIMER1_CLEAR);
  60
  61         /* Recover lost jiffies */
  62         while ((signed long)
  63                 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time)
  64                                                 >= TIMER4_TICKS_PER_JIFFY) {
  65                 last_jiffy_time += TIMER4_TICKS_PER_JIFFY;
  66                 timer_tick();
  67         }
  68
  69         return IRQ_HANDLED;
  70 }
  71
  72 static struct irqaction ep93xx_timer_irq = {
  73         .name           = "ep93xx timer",
  74         .flags          = IRQF_TIMER | IRQF_IRQPOLL,
  75         .handler        = ep93xx_timer_interrupt,
  76 };
  77
  78 static u32 ep93xx_gettimeoffset(void)
  79 {
  80         int offset;
  81
  82         offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time;
  83
  84         /*
  85          * Timer 4 is based on a 983.04 kHz reference clock,
  86          * so dividing by 983040 gives the fraction of a second,
  87          * so dividing by 0.983040 converts to uS.
  88          * Refactor the calculation to avoid overflow.
  89          * Finally, multiply by 1000 to give nS.
  90          */
  91         return (offset + (53 * offset / 3072)) * 1000;
  92 }
  93
  94 void __init ep93xx_timer_init(void)
  95 {
  96         u32 tmode = EP93XX_TIMER123_CONTROL_MODE |
  97                     EP93XX_TIMER123_CONTROL_CLKSEL;
  98
  99         arch_gettimeoffset = ep93xx_gettimeoffset;
 100
 101         /* Enable periodic HZ timer.  */
 102         __raw_writel(tmode, EP93XX_TIMER1_CONTROL);
 103         __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD);
 104         __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE,
 105                         EP93XX_TIMER1_CONTROL);
 106
 107         /* Enable lost jiffy timer.  */
 108         __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE,
 109                         EP93XX_TIMER4_VALUE_HIGH);
 110
 111         setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq);
 112 }