2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/types.h>
56 #include <linux/errno.h>
57 #include <linux/ioport.h>
58 #include <linux/pci.h>
59 #include <linux/dma-mapping.h>
60 #include <linux/kernel.h>
61 #include <linux/netdevice.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/delay.h>
66 #include <linux/highmem.h>
67 #include <linux/sockios.h>
68 #include <linux/firmware.h>
69 #include <linux/slab.h>
70 #include <linux/prefetch.h>
71 #include <linux/if_vlan.h>
74 #include <linux/ethtool.h>
82 #include <asm/byteorder.h>
83 #include <asm/uaccess.h>
86 #define DRV_NAME "acenic"
90 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
91 #define ACE_IS_TIGON_I(ap) 0
92 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
94 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
95 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
98 #ifndef PCI_VENDOR_ID_ALTEON
99 #define PCI_VENDOR_ID_ALTEON 0x12ae
101 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
102 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
103 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
105 #ifndef PCI_DEVICE_ID_3COM_3C985
106 #define PCI_DEVICE_ID_3COM_3C985 0x0001
108 #ifndef PCI_VENDOR_ID_NETGEAR
109 #define PCI_VENDOR_ID_NETGEAR 0x1385
110 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
112 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
113 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
118 * Farallon used the DEC vendor ID by mistake and they seem not
121 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
122 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
124 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
125 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
127 #ifndef PCI_VENDOR_ID_SGI
128 #define PCI_VENDOR_ID_SGI 0x10a9
130 #ifndef PCI_DEVICE_ID_SGI_ACENIC
131 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
134 static const struct pci_device_id acenic_pci_tbl
[] = {
135 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
,
136 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
137 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER
,
138 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
139 { PCI_VENDOR_ID_3COM
, PCI_DEVICE_ID_3COM_3C985
,
140 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
141 { PCI_VENDOR_ID_NETGEAR
, PCI_DEVICE_ID_NETGEAR_GA620
,
142 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
143 { PCI_VENDOR_ID_NETGEAR
, PCI_DEVICE_ID_NETGEAR_GA620T
,
144 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
146 * Farallon used the DEC vendor ID on their cards incorrectly,
147 * then later Alteon's ID.
149 { PCI_VENDOR_ID_DEC
, PCI_DEVICE_ID_FARALLON_PN9000SX
,
150 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
151 { PCI_VENDOR_ID_ALTEON
, PCI_DEVICE_ID_FARALLON_PN9100T
,
152 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
153 { PCI_VENDOR_ID_SGI
, PCI_DEVICE_ID_SGI_ACENIC
,
154 PCI_ANY_ID
, PCI_ANY_ID
, PCI_CLASS_NETWORK_ETHERNET
<< 8, 0xffff00, },
157 MODULE_DEVICE_TABLE(pci
, acenic_pci_tbl
);
159 #define ace_sync_irq(irq) synchronize_irq(irq)
161 #ifndef offset_in_page
162 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
165 #define ACE_MAX_MOD_PARMS 8
166 #define BOARD_IDX_STATIC 0
167 #define BOARD_IDX_OVERFLOW -1
172 * These must be defined before the firmware is included.
174 #define MAX_TEXT_LEN 96*1024
175 #define MAX_RODATA_LEN 8*1024
176 #define MAX_DATA_LEN 2*1024
178 #ifndef tigon2FwReleaseLocal
179 #define tigon2FwReleaseLocal 0
183 * This driver currently supports Tigon I and Tigon II based cards
184 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
185 * GA620. The driver should also work on the SGI, DEC and Farallon
186 * versions of the card, however I have not been able to test that
189 * This card is really neat, it supports receive hardware checksumming
190 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
191 * firmware. Also the programming interface is quite neat, except for
192 * the parts dealing with the i2c eeprom on the card ;-)
194 * Using jumbo frames:
196 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
197 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
198 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
199 * interface number and <MTU> being the MTU value.
203 * When compiled as a loadable module, the driver allows for a number
204 * of module parameters to be specified. The driver supports the
205 * following module parameters:
207 * trace=<val> - Firmware trace level. This requires special traced
208 * firmware to replace the firmware supplied with
209 * the driver - for debugging purposes only.
211 * link=<val> - Link state. Normally you want to use the default link
212 * parameters set by the driver. This can be used to
213 * override these in case your switch doesn't negotiate
214 * the link properly. Valid values are:
215 * 0x0001 - Force half duplex link.
216 * 0x0002 - Do not negotiate line speed with the other end.
217 * 0x0010 - 10Mbit/sec link.
218 * 0x0020 - 100Mbit/sec link.
219 * 0x0040 - 1000Mbit/sec link.
220 * 0x0100 - Do not negotiate flow control.
221 * 0x0200 - Enable RX flow control Y
222 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
223 * Default value is 0x0270, ie. enable link+flow
224 * control negotiation. Negotiating the highest
225 * possible link speed with RX flow control enabled.
227 * When disabling link speed negotiation, only one link
228 * speed is allowed to be specified!
230 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
231 * to wait for more packets to arive before
232 * interrupting the host, from the time the first
235 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
236 * to wait for more packets to arive in the transmit ring,
237 * before interrupting the host, after transmitting the
238 * first packet in the ring.
240 * max_tx_desc=<val> - maximum number of transmit descriptors
241 * (packets) transmitted before interrupting the host.
243 * max_rx_desc=<val> - maximum number of receive descriptors
244 * (packets) received before interrupting the host.
246 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
247 * increments of the NIC's on board memory to be used for
248 * transmit and receive buffers. For the 1MB NIC app. 800KB
249 * is available, on the 1/2MB NIC app. 300KB is available.
250 * 68KB will always be available as a minimum for both
251 * directions. The default value is a 50/50 split.
252 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
253 * operations, default (1) is to always disable this as
254 * that is what Alteon does on NT. I have not been able
255 * to measure any real performance differences with
256 * this on my systems. Set <val>=0 if you want to
257 * enable these operations.
259 * If you use more than one NIC, specify the parameters for the
260 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
261 * run tracing on NIC #2 but not on NIC #1 and #3.
265 * - Proper multicast support.
266 * - NIC dump support.
267 * - More tuning parameters.
269 * The mini ring is not used under Linux and I am not sure it makes sense
270 * to actually use it.
272 * New interrupt handler strategy:
274 * The old interrupt handler worked using the traditional method of
275 * replacing an skbuff with a new one when a packet arrives. However
276 * the rx rings do not need to contain a static number of buffer
277 * descriptors, thus it makes sense to move the memory allocation out
278 * of the main interrupt handler and do it in a bottom half handler
279 * and only allocate new buffers when the number of buffers in the
280 * ring is below a certain threshold. In order to avoid starving the
281 * NIC under heavy load it is however necessary to force allocation
282 * when hitting a minimum threshold. The strategy for alloction is as
285 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
286 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
287 * the buffers in the interrupt handler
288 * RX_RING_THRES - maximum number of buffers in the rx ring
289 * RX_MINI_THRES - maximum number of buffers in the mini ring
290 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
292 * One advantagous side effect of this allocation approach is that the
293 * entire rx processing can be done without holding any spin lock
294 * since the rx rings and registers are totally independent of the tx
295 * ring and its registers. This of course includes the kmalloc's of
296 * new skb's. Thus start_xmit can run in parallel with rx processing
297 * and the memory allocation on SMP systems.
299 * Note that running the skb reallocation in a bottom half opens up
300 * another can of races which needs to be handled properly. In
301 * particular it can happen that the interrupt handler tries to run
302 * the reallocation while the bottom half is either running on another
303 * CPU or was interrupted on the same CPU. To get around this the
304 * driver uses bitops to prevent the reallocation routines from being
307 * TX handling can also be done without holding any spin lock, wheee
308 * this is fun! since tx_ret_csm is only written to by the interrupt
309 * handler. The case to be aware of is when shutting down the device
310 * and cleaning up where it is necessary to make sure that
311 * start_xmit() is not running while this is happening. Well DaveM
312 * informs me that this case is already protected against ... bye bye
313 * Mr. Spin Lock, it was nice to know you.
315 * TX interrupts are now partly disabled so the NIC will only generate
316 * TX interrupts for the number of coal ticks, not for the number of
317 * TX packets in the queue. This should reduce the number of TX only,
318 * ie. when no RX processing is done, interrupts seen.
322 * Threshold values for RX buffer allocation - the low water marks for
323 * when to start refilling the rings are set to 75% of the ring
324 * sizes. It seems to make sense to refill the rings entirely from the
325 * intrrupt handler once it gets below the panic threshold, that way
326 * we don't risk that the refilling is moved to another CPU when the
327 * one running the interrupt handler just got the slab code hot in its
330 #define RX_RING_SIZE 72
331 #define RX_MINI_SIZE 64
332 #define RX_JUMBO_SIZE 48
334 #define RX_PANIC_STD_THRES 16
335 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
336 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
337 #define RX_PANIC_MINI_THRES 12
338 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
339 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
340 #define RX_PANIC_JUMBO_THRES 6
341 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
342 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
346 * Size of the mini ring entries, basically these just should be big
347 * enough to take TCP ACKs
349 #define ACE_MINI_SIZE 100
351 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE
352 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
353 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
356 * There seems to be a magic difference in the effect between 995 and 996
357 * but little difference between 900 and 995 ... no idea why.
359 * There is now a default set of tuning parameters which is set, depending
360 * on whether or not the user enables Jumbo frames. It's assumed that if
361 * Jumbo frames are enabled, the user wants optimal tuning for that case.
363 #define DEF_TX_COAL 400 /* 996 */
364 #define DEF_TX_MAX_DESC 60 /* was 40 */
365 #define DEF_RX_COAL 120 /* 1000 */
366 #define DEF_RX_MAX_DESC 25
367 #define DEF_TX_RATIO 21 /* 24 */
369 #define DEF_JUMBO_TX_COAL 20
370 #define DEF_JUMBO_TX_MAX_DESC 60
371 #define DEF_JUMBO_RX_COAL 30
372 #define DEF_JUMBO_RX_MAX_DESC 6
373 #define DEF_JUMBO_TX_RATIO 21
375 #if tigon2FwReleaseLocal < 20001118
377 * Standard firmware and early modifications duplicate
378 * IRQ load without this flag (coal timer is never reset).
379 * Note that with this flag tx_coal should be less than
380 * time to xmit full tx ring.
381 * 400usec is not so bad for tx ring size of 128.
383 #define TX_COAL_INTS_ONLY 1 /* worth it */
386 * With modified firmware, this is not necessary, but still useful.
388 #define TX_COAL_INTS_ONLY 1
392 #define DEF_STAT (2 * TICKS_PER_SEC)
395 static int link_state
[ACE_MAX_MOD_PARMS
];
396 static int trace
[ACE_MAX_MOD_PARMS
];
397 static int tx_coal_tick
[ACE_MAX_MOD_PARMS
];
398 static int rx_coal_tick
[ACE_MAX_MOD_PARMS
];
399 static int max_tx_desc
[ACE_MAX_MOD_PARMS
];
400 static int max_rx_desc
[ACE_MAX_MOD_PARMS
];
401 static int tx_ratio
[ACE_MAX_MOD_PARMS
];
402 static int dis_pci_mem_inval
[ACE_MAX_MOD_PARMS
] = {1, 1, 1, 1, 1, 1, 1, 1};
404 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
405 MODULE_LICENSE("GPL");
406 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
407 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
408 MODULE_FIRMWARE("acenic/tg1.bin");
410 MODULE_FIRMWARE("acenic/tg2.bin");
412 module_param_array_named(link
, link_state
, int, NULL
, 0);
413 module_param_array(trace
, int, NULL
, 0);
414 module_param_array(tx_coal_tick
, int, NULL
, 0);
415 module_param_array(max_tx_desc
, int, NULL
, 0);
416 module_param_array(rx_coal_tick
, int, NULL
, 0);
417 module_param_array(max_rx_desc
, int, NULL
, 0);
418 module_param_array(tx_ratio
, int, NULL
, 0);
419 MODULE_PARM_DESC(link
, "AceNIC/3C985/NetGear link state");
420 MODULE_PARM_DESC(trace
, "AceNIC/3C985/NetGear firmware trace level");
421 MODULE_PARM_DESC(tx_coal_tick
, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
422 MODULE_PARM_DESC(max_tx_desc
, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
423 MODULE_PARM_DESC(rx_coal_tick
, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
424 MODULE_PARM_DESC(max_rx_desc
, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
425 MODULE_PARM_DESC(tx_ratio
, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
428 static const char version
[] =
429 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
430 " http://home.cern.ch/~jes/gige/acenic.html\n";
432 static int ace_get_settings(struct net_device
*, struct ethtool_cmd
*);
433 static int ace_set_settings(struct net_device
*, struct ethtool_cmd
*);
434 static void ace_get_drvinfo(struct net_device
*, struct ethtool_drvinfo
*);
436 static const struct ethtool_ops ace_ethtool_ops
= {
437 .get_settings
= ace_get_settings
,
438 .set_settings
= ace_set_settings
,
439 .get_drvinfo
= ace_get_drvinfo
,
442 static void ace_watchdog(struct net_device
*dev
);
444 static const struct net_device_ops ace_netdev_ops
= {
445 .ndo_open
= ace_open
,
446 .ndo_stop
= ace_close
,
447 .ndo_tx_timeout
= ace_watchdog
,
448 .ndo_get_stats
= ace_get_stats
,
449 .ndo_start_xmit
= ace_start_xmit
,
450 .ndo_set_rx_mode
= ace_set_multicast_list
,
451 .ndo_validate_addr
= eth_validate_addr
,
452 .ndo_set_mac_address
= ace_set_mac_addr
,
453 .ndo_change_mtu
= ace_change_mtu
,
456 static int acenic_probe_one(struct pci_dev
*pdev
,
457 const struct pci_device_id
*id
)
459 struct net_device
*dev
;
460 struct ace_private
*ap
;
461 static int boards_found
;
463 dev
= alloc_etherdev(sizeof(struct ace_private
));
467 SET_NETDEV_DEV(dev
, &pdev
->dev
);
469 ap
= netdev_priv(dev
);
471 ap
->name
= pci_name(pdev
);
473 dev
->features
|= NETIF_F_SG
| NETIF_F_IP_CSUM
;
474 dev
->features
|= NETIF_F_HW_VLAN_CTAG_TX
| NETIF_F_HW_VLAN_CTAG_RX
;
476 dev
->watchdog_timeo
= 5*HZ
;
478 dev
->netdev_ops
= &ace_netdev_ops
;
479 dev
->ethtool_ops
= &ace_ethtool_ops
;
481 /* we only display this string ONCE */
485 if (pci_enable_device(pdev
))
486 goto fail_free_netdev
;
489 * Enable master mode before we start playing with the
490 * pci_command word since pci_set_master() will modify
493 pci_set_master(pdev
);
495 pci_read_config_word(pdev
, PCI_COMMAND
, &ap
->pci_command
);
497 /* OpenFirmware on Mac's does not set this - DOH.. */
498 if (!(ap
->pci_command
& PCI_COMMAND_MEMORY
)) {
499 printk(KERN_INFO
"%s: Enabling PCI Memory Mapped "
500 "access - was not enabled by BIOS/Firmware\n",
502 ap
->pci_command
= ap
->pci_command
| PCI_COMMAND_MEMORY
;
503 pci_write_config_word(ap
->pdev
, PCI_COMMAND
,
508 pci_read_config_byte(pdev
, PCI_LATENCY_TIMER
, &ap
->pci_latency
);
509 if (ap
->pci_latency
<= 0x40) {
510 ap
->pci_latency
= 0x40;
511 pci_write_config_byte(pdev
, PCI_LATENCY_TIMER
, ap
->pci_latency
);
515 * Remap the regs into kernel space - this is abuse of
516 * dev->base_addr since it was means for I/O port
517 * addresses but who gives a damn.
519 dev
->base_addr
= pci_resource_start(pdev
, 0);
520 ap
->regs
= ioremap(dev
->base_addr
, 0x4000);
522 printk(KERN_ERR
"%s: Unable to map I/O register, "
523 "AceNIC %i will be disabled.\n",
524 ap
->name
, boards_found
);
525 goto fail_free_netdev
;
528 switch(pdev
->vendor
) {
529 case PCI_VENDOR_ID_ALTEON
:
530 if (pdev
->device
== PCI_DEVICE_ID_FARALLON_PN9100T
) {
531 printk(KERN_INFO
"%s: Farallon PN9100-T ",
534 printk(KERN_INFO
"%s: Alteon AceNIC ",
538 case PCI_VENDOR_ID_3COM
:
539 printk(KERN_INFO
"%s: 3Com 3C985 ", ap
->name
);
541 case PCI_VENDOR_ID_NETGEAR
:
542 printk(KERN_INFO
"%s: NetGear GA620 ", ap
->name
);
544 case PCI_VENDOR_ID_DEC
:
545 if (pdev
->device
== PCI_DEVICE_ID_FARALLON_PN9000SX
) {
546 printk(KERN_INFO
"%s: Farallon PN9000-SX ",
550 case PCI_VENDOR_ID_SGI
:
551 printk(KERN_INFO
"%s: SGI AceNIC ", ap
->name
);
554 printk(KERN_INFO
"%s: Unknown AceNIC ", ap
->name
);
558 printk("Gigabit Ethernet at 0x%08lx, ", dev
->base_addr
);
559 printk("irq %d\n", pdev
->irq
);
561 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
562 if ((readl(&ap
->regs
->HostCtrl
) >> 28) == 4) {
563 printk(KERN_ERR
"%s: Driver compiled without Tigon I"
564 " support - NIC disabled\n", dev
->name
);
569 if (ace_allocate_descriptors(dev
))
570 goto fail_free_netdev
;
573 if (boards_found
>= ACE_MAX_MOD_PARMS
)
574 ap
->board_idx
= BOARD_IDX_OVERFLOW
;
576 ap
->board_idx
= boards_found
;
578 ap
->board_idx
= BOARD_IDX_STATIC
;
582 goto fail_free_netdev
;
584 if (register_netdev(dev
)) {
585 printk(KERN_ERR
"acenic: device registration failed\n");
588 ap
->name
= dev
->name
;
590 if (ap
->pci_using_dac
)
591 dev
->features
|= NETIF_F_HIGHDMA
;
593 pci_set_drvdata(pdev
, dev
);
599 ace_init_cleanup(dev
);
605 static void acenic_remove_one(struct pci_dev
*pdev
)
607 struct net_device
*dev
= pci_get_drvdata(pdev
);
608 struct ace_private
*ap
= netdev_priv(dev
);
609 struct ace_regs __iomem
*regs
= ap
->regs
;
612 unregister_netdev(dev
);
614 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
615 if (ap
->version
>= 2)
616 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
, ®s
->CpuBCtrl
);
619 * This clears any pending interrupts
621 writel(1, ®s
->Mb0Lo
);
622 readl(®s
->CpuCtrl
); /* flush */
625 * Make sure no other CPUs are processing interrupts
626 * on the card before the buffers are being released.
627 * Otherwise one might experience some `interesting'
630 * Then release the RX buffers - jumbo buffers were
631 * already released in ace_close().
633 ace_sync_irq(dev
->irq
);
635 for (i
= 0; i
< RX_STD_RING_ENTRIES
; i
++) {
636 struct sk_buff
*skb
= ap
->skb
->rx_std_skbuff
[i
].skb
;
639 struct ring_info
*ringp
;
642 ringp
= &ap
->skb
->rx_std_skbuff
[i
];
643 mapping
= dma_unmap_addr(ringp
, mapping
);
644 pci_unmap_page(ap
->pdev
, mapping
,
648 ap
->rx_std_ring
[i
].size
= 0;
649 ap
->skb
->rx_std_skbuff
[i
].skb
= NULL
;
654 if (ap
->version
>= 2) {
655 for (i
= 0; i
< RX_MINI_RING_ENTRIES
; i
++) {
656 struct sk_buff
*skb
= ap
->skb
->rx_mini_skbuff
[i
].skb
;
659 struct ring_info
*ringp
;
662 ringp
= &ap
->skb
->rx_mini_skbuff
[i
];
663 mapping
= dma_unmap_addr(ringp
,mapping
);
664 pci_unmap_page(ap
->pdev
, mapping
,
668 ap
->rx_mini_ring
[i
].size
= 0;
669 ap
->skb
->rx_mini_skbuff
[i
].skb
= NULL
;
675 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++) {
676 struct sk_buff
*skb
= ap
->skb
->rx_jumbo_skbuff
[i
].skb
;
678 struct ring_info
*ringp
;
681 ringp
= &ap
->skb
->rx_jumbo_skbuff
[i
];
682 mapping
= dma_unmap_addr(ringp
, mapping
);
683 pci_unmap_page(ap
->pdev
, mapping
,
687 ap
->rx_jumbo_ring
[i
].size
= 0;
688 ap
->skb
->rx_jumbo_skbuff
[i
].skb
= NULL
;
693 ace_init_cleanup(dev
);
697 static struct pci_driver acenic_pci_driver
= {
699 .id_table
= acenic_pci_tbl
,
700 .probe
= acenic_probe_one
,
701 .remove
= acenic_remove_one
,
704 static void ace_free_descriptors(struct net_device
*dev
)
706 struct ace_private
*ap
= netdev_priv(dev
);
709 if (ap
->rx_std_ring
!= NULL
) {
710 size
= (sizeof(struct rx_desc
) *
711 (RX_STD_RING_ENTRIES
+
712 RX_JUMBO_RING_ENTRIES
+
713 RX_MINI_RING_ENTRIES
+
714 RX_RETURN_RING_ENTRIES
));
715 pci_free_consistent(ap
->pdev
, size
, ap
->rx_std_ring
,
716 ap
->rx_ring_base_dma
);
717 ap
->rx_std_ring
= NULL
;
718 ap
->rx_jumbo_ring
= NULL
;
719 ap
->rx_mini_ring
= NULL
;
720 ap
->rx_return_ring
= NULL
;
722 if (ap
->evt_ring
!= NULL
) {
723 size
= (sizeof(struct event
) * EVT_RING_ENTRIES
);
724 pci_free_consistent(ap
->pdev
, size
, ap
->evt_ring
,
728 if (ap
->tx_ring
!= NULL
&& !ACE_IS_TIGON_I(ap
)) {
729 size
= (sizeof(struct tx_desc
) * MAX_TX_RING_ENTRIES
);
730 pci_free_consistent(ap
->pdev
, size
, ap
->tx_ring
,
735 if (ap
->evt_prd
!= NULL
) {
736 pci_free_consistent(ap
->pdev
, sizeof(u32
),
737 (void *)ap
->evt_prd
, ap
->evt_prd_dma
);
740 if (ap
->rx_ret_prd
!= NULL
) {
741 pci_free_consistent(ap
->pdev
, sizeof(u32
),
742 (void *)ap
->rx_ret_prd
,
744 ap
->rx_ret_prd
= NULL
;
746 if (ap
->tx_csm
!= NULL
) {
747 pci_free_consistent(ap
->pdev
, sizeof(u32
),
748 (void *)ap
->tx_csm
, ap
->tx_csm_dma
);
754 static int ace_allocate_descriptors(struct net_device
*dev
)
756 struct ace_private
*ap
= netdev_priv(dev
);
759 size
= (sizeof(struct rx_desc
) *
760 (RX_STD_RING_ENTRIES
+
761 RX_JUMBO_RING_ENTRIES
+
762 RX_MINI_RING_ENTRIES
+
763 RX_RETURN_RING_ENTRIES
));
765 ap
->rx_std_ring
= pci_alloc_consistent(ap
->pdev
, size
,
766 &ap
->rx_ring_base_dma
);
767 if (ap
->rx_std_ring
== NULL
)
770 ap
->rx_jumbo_ring
= ap
->rx_std_ring
+ RX_STD_RING_ENTRIES
;
771 ap
->rx_mini_ring
= ap
->rx_jumbo_ring
+ RX_JUMBO_RING_ENTRIES
;
772 ap
->rx_return_ring
= ap
->rx_mini_ring
+ RX_MINI_RING_ENTRIES
;
774 size
= (sizeof(struct event
) * EVT_RING_ENTRIES
);
776 ap
->evt_ring
= pci_alloc_consistent(ap
->pdev
, size
, &ap
->evt_ring_dma
);
778 if (ap
->evt_ring
== NULL
)
782 * Only allocate a host TX ring for the Tigon II, the Tigon I
783 * has to use PCI registers for this ;-(
785 if (!ACE_IS_TIGON_I(ap
)) {
786 size
= (sizeof(struct tx_desc
) * MAX_TX_RING_ENTRIES
);
788 ap
->tx_ring
= pci_alloc_consistent(ap
->pdev
, size
,
791 if (ap
->tx_ring
== NULL
)
795 ap
->evt_prd
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
797 if (ap
->evt_prd
== NULL
)
800 ap
->rx_ret_prd
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
801 &ap
->rx_ret_prd_dma
);
802 if (ap
->rx_ret_prd
== NULL
)
805 ap
->tx_csm
= pci_alloc_consistent(ap
->pdev
, sizeof(u32
),
807 if (ap
->tx_csm
== NULL
)
814 ace_init_cleanup(dev
);
820 * Generic cleanup handling data allocated during init. Used when the
821 * module is unloaded or if an error occurs during initialization
823 static void ace_init_cleanup(struct net_device
*dev
)
825 struct ace_private
*ap
;
827 ap
= netdev_priv(dev
);
829 ace_free_descriptors(dev
);
832 pci_free_consistent(ap
->pdev
, sizeof(struct ace_info
),
833 ap
->info
, ap
->info_dma
);
835 kfree(ap
->trace_buf
);
838 free_irq(dev
->irq
, dev
);
845 * Commands are considered to be slow.
847 static inline void ace_issue_cmd(struct ace_regs __iomem
*regs
, struct cmd
*cmd
)
851 idx
= readl(®s
->CmdPrd
);
853 writel(*(u32
*)(cmd
), ®s
->CmdRng
[idx
]);
854 idx
= (idx
+ 1) % CMD_RING_ENTRIES
;
856 writel(idx
, ®s
->CmdPrd
);
860 static int ace_init(struct net_device
*dev
)
862 struct ace_private
*ap
;
863 struct ace_regs __iomem
*regs
;
864 struct ace_info
*info
= NULL
;
865 struct pci_dev
*pdev
;
868 u32 tig_ver
, mac1
, mac2
, tmp
, pci_state
;
869 int board_idx
, ecode
= 0;
871 unsigned char cache_size
;
873 ap
= netdev_priv(dev
);
876 board_idx
= ap
->board_idx
;
879 * aman@sgi.com - its useful to do a NIC reset here to
880 * address the `Firmware not running' problem subsequent
881 * to any crashes involving the NIC
883 writel(HW_RESET
| (HW_RESET
<< 24), ®s
->HostCtrl
);
884 readl(®s
->HostCtrl
); /* PCI write posting */
888 * Don't access any other registers before this point!
892 * This will most likely need BYTE_SWAP once we switch
893 * to using __raw_writel()
895 writel((WORD_SWAP
| CLR_INT
| ((WORD_SWAP
| CLR_INT
) << 24)),
898 writel((CLR_INT
| WORD_SWAP
| ((CLR_INT
| WORD_SWAP
) << 24)),
901 readl(®s
->HostCtrl
); /* PCI write posting */
904 * Stop the NIC CPU and clear pending interrupts
906 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
907 readl(®s
->CpuCtrl
); /* PCI write posting */
908 writel(0, ®s
->Mb0Lo
);
910 tig_ver
= readl(®s
->HostCtrl
) >> 28;
913 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
916 printk(KERN_INFO
" Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
917 tig_ver
, ap
->firmware_major
, ap
->firmware_minor
,
919 writel(0, ®s
->LocalCtrl
);
921 ap
->tx_ring_entries
= TIGON_I_TX_RING_ENTRIES
;
925 printk(KERN_INFO
" Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
926 tig_ver
, ap
->firmware_major
, ap
->firmware_minor
,
928 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
, ®s
->CpuBCtrl
);
929 readl(®s
->CpuBCtrl
); /* PCI write posting */
931 * The SRAM bank size does _not_ indicate the amount
932 * of memory on the card, it controls the _bank_ size!
933 * Ie. a 1MB AceNIC will have two banks of 512KB.
935 writel(SRAM_BANK_512K
, ®s
->LocalCtrl
);
936 writel(SYNC_SRAM_TIMING
, ®s
->MiscCfg
);
938 ap
->tx_ring_entries
= MAX_TX_RING_ENTRIES
;
941 printk(KERN_WARNING
" Unsupported Tigon version detected "
948 * ModeStat _must_ be set after the SRAM settings as this change
949 * seems to corrupt the ModeStat and possible other registers.
950 * The SRAM settings survive resets and setting it to the same
951 * value a second time works as well. This is what caused the
952 * `Firmware not running' problem on the Tigon II.
955 writel(ACE_BYTE_SWAP_DMA
| ACE_WARN
| ACE_FATAL
| ACE_BYTE_SWAP_BD
|
956 ACE_WORD_SWAP_BD
| ACE_NO_JUMBO_FRAG
, ®s
->ModeStat
);
958 writel(ACE_BYTE_SWAP_DMA
| ACE_WARN
| ACE_FATAL
|
959 ACE_WORD_SWAP_BD
| ACE_NO_JUMBO_FRAG
, ®s
->ModeStat
);
961 readl(®s
->ModeStat
); /* PCI write posting */
964 for(i
= 0; i
< 4; i
++) {
968 t
= read_eeprom_byte(dev
, 0x8c+i
);
976 for(i
= 4; i
< 8; i
++) {
980 t
= read_eeprom_byte(dev
, 0x8c+i
);
988 writel(mac1
, ®s
->MacAddrHi
);
989 writel(mac2
, ®s
->MacAddrLo
);
991 dev
->dev_addr
[0] = (mac1
>> 8) & 0xff;
992 dev
->dev_addr
[1] = mac1
& 0xff;
993 dev
->dev_addr
[2] = (mac2
>> 24) & 0xff;
994 dev
->dev_addr
[3] = (mac2
>> 16) & 0xff;
995 dev
->dev_addr
[4] = (mac2
>> 8) & 0xff;
996 dev
->dev_addr
[5] = mac2
& 0xff;
998 printk("MAC: %pM\n", dev
->dev_addr
);
1001 * Looks like this is necessary to deal with on all architectures,
1002 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1003 * Ie. having two NICs in the machine, one will have the cache
1004 * line set at boot time, the other will not.
1007 pci_read_config_byte(pdev
, PCI_CACHE_LINE_SIZE
, &cache_size
);
1009 if (cache_size
!= SMP_CACHE_BYTES
) {
1010 printk(KERN_INFO
" PCI cache line size set incorrectly "
1011 "(%i bytes) by BIOS/FW, ", cache_size
);
1012 if (cache_size
> SMP_CACHE_BYTES
)
1013 printk("expecting %i\n", SMP_CACHE_BYTES
);
1015 printk("correcting to %i\n", SMP_CACHE_BYTES
);
1016 pci_write_config_byte(pdev
, PCI_CACHE_LINE_SIZE
,
1017 SMP_CACHE_BYTES
>> 2);
1021 pci_state
= readl(®s
->PciState
);
1022 printk(KERN_INFO
" PCI bus width: %i bits, speed: %iMHz, "
1023 "latency: %i clks\n",
1024 (pci_state
& PCI_32BIT
) ? 32 : 64,
1025 (pci_state
& PCI_66MHZ
) ? 66 : 33,
1029 * Set the max DMA transfer size. Seems that for most systems
1030 * the performance is better when no MAX parameter is
1031 * set. However for systems enabling PCI write and invalidate,
1032 * DMA writes must be set to the L1 cache line size to get
1033 * optimal performance.
1035 * The default is now to turn the PCI write and invalidate off
1036 * - that is what Alteon does for NT.
1038 tmp
= READ_CMD_MEM
| WRITE_CMD_MEM
;
1039 if (ap
->version
>= 2) {
1040 tmp
|= (MEM_READ_MULTIPLE
| (pci_state
& PCI_66MHZ
));
1042 * Tuning parameters only supported for 8 cards
1044 if (board_idx
== BOARD_IDX_OVERFLOW
||
1045 dis_pci_mem_inval
[board_idx
]) {
1046 if (ap
->pci_command
& PCI_COMMAND_INVALIDATE
) {
1047 ap
->pci_command
&= ~PCI_COMMAND_INVALIDATE
;
1048 pci_write_config_word(pdev
, PCI_COMMAND
,
1050 printk(KERN_INFO
" Disabling PCI memory "
1051 "write and invalidate\n");
1053 } else if (ap
->pci_command
& PCI_COMMAND_INVALIDATE
) {
1054 printk(KERN_INFO
" PCI memory write & invalidate "
1055 "enabled by BIOS, enabling counter measures\n");
1057 switch(SMP_CACHE_BYTES
) {
1059 tmp
|= DMA_WRITE_MAX_16
;
1062 tmp
|= DMA_WRITE_MAX_32
;
1065 tmp
|= DMA_WRITE_MAX_64
;
1068 tmp
|= DMA_WRITE_MAX_128
;
1071 printk(KERN_INFO
" Cache line size %i not "
1072 "supported, PCI write and invalidate "
1073 "disabled\n", SMP_CACHE_BYTES
);
1074 ap
->pci_command
&= ~PCI_COMMAND_INVALIDATE
;
1075 pci_write_config_word(pdev
, PCI_COMMAND
,
1083 * On this platform, we know what the best dma settings
1084 * are. We use 64-byte maximum bursts, because if we
1085 * burst larger than the cache line size (or even cross
1086 * a 64byte boundary in a single burst) the UltraSparc
1087 * PCI controller will disconnect at 64-byte multiples.
1089 * Read-multiple will be properly enabled above, and when
1090 * set will give the PCI controller proper hints about
1093 tmp
&= ~DMA_READ_WRITE_MASK
;
1094 tmp
|= DMA_READ_MAX_64
;
1095 tmp
|= DMA_WRITE_MAX_64
;
1098 tmp
&= ~DMA_READ_WRITE_MASK
;
1099 tmp
|= DMA_READ_MAX_128
;
1101 * All the docs say MUST NOT. Well, I did.
1102 * Nothing terrible happens, if we load wrong size.
1103 * Bit w&i still works better!
1105 tmp
|= DMA_WRITE_MAX_128
;
1107 writel(tmp
, ®s
->PciState
);
1111 * The Host PCI bus controller driver has to set FBB.
1112 * If all devices on that PCI bus support FBB, then the controller
1113 * can enable FBB support in the Host PCI Bus controller (or on
1114 * the PCI-PCI bridge if that applies).
1118 * I have received reports from people having problems when this
1121 if (!(ap
->pci_command
& PCI_COMMAND_FAST_BACK
)) {
1122 printk(KERN_INFO
" Enabling PCI Fast Back to Back\n");
1123 ap
->pci_command
|= PCI_COMMAND_FAST_BACK
;
1124 pci_write_config_word(pdev
, PCI_COMMAND
, ap
->pci_command
);
1129 * Configure DMA attributes.
1131 if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(64))) {
1132 ap
->pci_using_dac
= 1;
1133 } else if (!pci_set_dma_mask(pdev
, DMA_BIT_MASK(32))) {
1134 ap
->pci_using_dac
= 0;
1141 * Initialize the generic info block and the command+event rings
1142 * and the control blocks for the transmit and receive rings
1143 * as they need to be setup once and for all.
1145 if (!(info
= pci_alloc_consistent(ap
->pdev
, sizeof(struct ace_info
),
1153 * Get the memory for the skb rings.
1155 if (!(ap
->skb
= kmalloc(sizeof(struct ace_skb
), GFP_KERNEL
))) {
1160 ecode
= request_irq(pdev
->irq
, ace_interrupt
, IRQF_SHARED
,
1163 printk(KERN_WARNING
"%s: Requested IRQ %d is busy\n",
1164 DRV_NAME
, pdev
->irq
);
1167 dev
->irq
= pdev
->irq
;
1170 spin_lock_init(&ap
->debug_lock
);
1171 ap
->last_tx
= ACE_TX_RING_ENTRIES(ap
) - 1;
1172 ap
->last_std_rx
= 0;
1173 ap
->last_mini_rx
= 0;
1176 memset(ap
->info
, 0, sizeof(struct ace_info
));
1177 memset(ap
->skb
, 0, sizeof(struct ace_skb
));
1179 ecode
= ace_load_firmware(dev
);
1185 tmp_ptr
= ap
->info_dma
;
1186 writel(tmp_ptr
>> 32, ®s
->InfoPtrHi
);
1187 writel(tmp_ptr
& 0xffffffff, ®s
->InfoPtrLo
);
1189 memset(ap
->evt_ring
, 0, EVT_RING_ENTRIES
* sizeof(struct event
));
1191 set_aceaddr(&info
->evt_ctrl
.rngptr
, ap
->evt_ring_dma
);
1192 info
->evt_ctrl
.flags
= 0;
1196 set_aceaddr(&info
->evt_prd_ptr
, ap
->evt_prd_dma
);
1197 writel(0, ®s
->EvtCsm
);
1199 set_aceaddr(&info
->cmd_ctrl
.rngptr
, 0x100);
1200 info
->cmd_ctrl
.flags
= 0;
1201 info
->cmd_ctrl
.max_len
= 0;
1203 for (i
= 0; i
< CMD_RING_ENTRIES
; i
++)
1204 writel(0, ®s
->CmdRng
[i
]);
1206 writel(0, ®s
->CmdPrd
);
1207 writel(0, ®s
->CmdCsm
);
1209 tmp_ptr
= ap
->info_dma
;
1210 tmp_ptr
+= (unsigned long) &(((struct ace_info
*)0)->s
.stats
);
1211 set_aceaddr(&info
->stats2_ptr
, (dma_addr_t
) tmp_ptr
);
1213 set_aceaddr(&info
->rx_std_ctrl
.rngptr
, ap
->rx_ring_base_dma
);
1214 info
->rx_std_ctrl
.max_len
= ACE_STD_BUFSIZE
;
1215 info
->rx_std_ctrl
.flags
=
1216 RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| RCB_FLG_VLAN_ASSIST
;
1218 memset(ap
->rx_std_ring
, 0,
1219 RX_STD_RING_ENTRIES
* sizeof(struct rx_desc
));
1221 for (i
= 0; i
< RX_STD_RING_ENTRIES
; i
++)
1222 ap
->rx_std_ring
[i
].flags
= BD_FLG_TCP_UDP_SUM
;
1224 ap
->rx_std_skbprd
= 0;
1225 atomic_set(&ap
->cur_rx_bufs
, 0);
1227 set_aceaddr(&info
->rx_jumbo_ctrl
.rngptr
,
1228 (ap
->rx_ring_base_dma
+
1229 (sizeof(struct rx_desc
) * RX_STD_RING_ENTRIES
)));
1230 info
->rx_jumbo_ctrl
.max_len
= 0;
1231 info
->rx_jumbo_ctrl
.flags
=
1232 RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| RCB_FLG_VLAN_ASSIST
;
1234 memset(ap
->rx_jumbo_ring
, 0,
1235 RX_JUMBO_RING_ENTRIES
* sizeof(struct rx_desc
));
1237 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++)
1238 ap
->rx_jumbo_ring
[i
].flags
= BD_FLG_TCP_UDP_SUM
| BD_FLG_JUMBO
;
1240 ap
->rx_jumbo_skbprd
= 0;
1241 atomic_set(&ap
->cur_jumbo_bufs
, 0);
1243 memset(ap
->rx_mini_ring
, 0,
1244 RX_MINI_RING_ENTRIES
* sizeof(struct rx_desc
));
1246 if (ap
->version
>= 2) {
1247 set_aceaddr(&info
->rx_mini_ctrl
.rngptr
,
1248 (ap
->rx_ring_base_dma
+
1249 (sizeof(struct rx_desc
) *
1250 (RX_STD_RING_ENTRIES
+
1251 RX_JUMBO_RING_ENTRIES
))));
1252 info
->rx_mini_ctrl
.max_len
= ACE_MINI_SIZE
;
1253 info
->rx_mini_ctrl
.flags
=
1254 RCB_FLG_TCP_UDP_SUM
|RCB_FLG_NO_PSEUDO_HDR
|RCB_FLG_VLAN_ASSIST
;
1256 for (i
= 0; i
< RX_MINI_RING_ENTRIES
; i
++)
1257 ap
->rx_mini_ring
[i
].flags
=
1258 BD_FLG_TCP_UDP_SUM
| BD_FLG_MINI
;
1260 set_aceaddr(&info
->rx_mini_ctrl
.rngptr
, 0);
1261 info
->rx_mini_ctrl
.flags
= RCB_FLG_RNG_DISABLE
;
1262 info
->rx_mini_ctrl
.max_len
= 0;
1265 ap
->rx_mini_skbprd
= 0;
1266 atomic_set(&ap
->cur_mini_bufs
, 0);
1268 set_aceaddr(&info
->rx_return_ctrl
.rngptr
,
1269 (ap
->rx_ring_base_dma
+
1270 (sizeof(struct rx_desc
) *
1271 (RX_STD_RING_ENTRIES
+
1272 RX_JUMBO_RING_ENTRIES
+
1273 RX_MINI_RING_ENTRIES
))));
1274 info
->rx_return_ctrl
.flags
= 0;
1275 info
->rx_return_ctrl
.max_len
= RX_RETURN_RING_ENTRIES
;
1277 memset(ap
->rx_return_ring
, 0,
1278 RX_RETURN_RING_ENTRIES
* sizeof(struct rx_desc
));
1280 set_aceaddr(&info
->rx_ret_prd_ptr
, ap
->rx_ret_prd_dma
);
1281 *(ap
->rx_ret_prd
) = 0;
1283 writel(TX_RING_BASE
, ®s
->WinBase
);
1285 if (ACE_IS_TIGON_I(ap
)) {
1286 ap
->tx_ring
= (__force
struct tx_desc
*) regs
->Window
;
1287 for (i
= 0; i
< (TIGON_I_TX_RING_ENTRIES
1288 * sizeof(struct tx_desc
)) / sizeof(u32
); i
++)
1289 writel(0, (__force
void __iomem
*)ap
->tx_ring
+ i
* 4);
1291 set_aceaddr(&info
->tx_ctrl
.rngptr
, TX_RING_BASE
);
1293 memset(ap
->tx_ring
, 0,
1294 MAX_TX_RING_ENTRIES
* sizeof(struct tx_desc
));
1296 set_aceaddr(&info
->tx_ctrl
.rngptr
, ap
->tx_ring_dma
);
1299 info
->tx_ctrl
.max_len
= ACE_TX_RING_ENTRIES(ap
);
1300 tmp
= RCB_FLG_TCP_UDP_SUM
| RCB_FLG_NO_PSEUDO_HDR
| RCB_FLG_VLAN_ASSIST
;
1303 * The Tigon I does not like having the TX ring in host memory ;-(
1305 if (!ACE_IS_TIGON_I(ap
))
1306 tmp
|= RCB_FLG_TX_HOST_RING
;
1307 #if TX_COAL_INTS_ONLY
1308 tmp
|= RCB_FLG_COAL_INT_ONLY
;
1310 info
->tx_ctrl
.flags
= tmp
;
1312 set_aceaddr(&info
->tx_csm_ptr
, ap
->tx_csm_dma
);
1315 * Potential item for tuning parameter
1318 writel(DMA_THRESH_16W
, ®s
->DmaReadCfg
);
1319 writel(DMA_THRESH_16W
, ®s
->DmaWriteCfg
);
1321 writel(DMA_THRESH_8W
, ®s
->DmaReadCfg
);
1322 writel(DMA_THRESH_8W
, ®s
->DmaWriteCfg
);
1325 writel(0, ®s
->MaskInt
);
1326 writel(1, ®s
->IfIdx
);
1329 * McKinley boxes do not like us fiddling with AssistState
1332 writel(1, ®s
->AssistState
);
1335 writel(DEF_STAT
, ®s
->TuneStatTicks
);
1336 writel(DEF_TRACE
, ®s
->TuneTrace
);
1338 ace_set_rxtx_parms(dev
, 0);
1340 if (board_idx
== BOARD_IDX_OVERFLOW
) {
1341 printk(KERN_WARNING
"%s: more than %i NICs detected, "
1342 "ignoring module parameters!\n",
1343 ap
->name
, ACE_MAX_MOD_PARMS
);
1344 } else if (board_idx
>= 0) {
1345 if (tx_coal_tick
[board_idx
])
1346 writel(tx_coal_tick
[board_idx
],
1347 ®s
->TuneTxCoalTicks
);
1348 if (max_tx_desc
[board_idx
])
1349 writel(max_tx_desc
[board_idx
], ®s
->TuneMaxTxDesc
);
1351 if (rx_coal_tick
[board_idx
])
1352 writel(rx_coal_tick
[board_idx
],
1353 ®s
->TuneRxCoalTicks
);
1354 if (max_rx_desc
[board_idx
])
1355 writel(max_rx_desc
[board_idx
], ®s
->TuneMaxRxDesc
);
1357 if (trace
[board_idx
])
1358 writel(trace
[board_idx
], ®s
->TuneTrace
);
1360 if ((tx_ratio
[board_idx
] > 0) && (tx_ratio
[board_idx
] < 64))
1361 writel(tx_ratio
[board_idx
], ®s
->TxBufRat
);
1365 * Default link parameters
1367 tmp
= LNK_ENABLE
| LNK_FULL_DUPLEX
| LNK_1000MB
| LNK_100MB
|
1368 LNK_10MB
| LNK_RX_FLOW_CTL_Y
| LNK_NEG_FCTL
| LNK_NEGOTIATE
;
1369 if(ap
->version
>= 2)
1370 tmp
|= LNK_TX_FLOW_CTL_Y
;
1373 * Override link default parameters
1375 if ((board_idx
>= 0) && link_state
[board_idx
]) {
1376 int option
= link_state
[board_idx
];
1380 if (option
& 0x01) {
1381 printk(KERN_INFO
"%s: Setting half duplex link\n",
1383 tmp
&= ~LNK_FULL_DUPLEX
;
1386 tmp
&= ~LNK_NEGOTIATE
;
1393 if ((option
& 0x70) == 0) {
1394 printk(KERN_WARNING
"%s: No media speed specified, "
1395 "forcing auto negotiation\n", ap
->name
);
1396 tmp
|= LNK_NEGOTIATE
| LNK_1000MB
|
1397 LNK_100MB
| LNK_10MB
;
1399 if ((option
& 0x100) == 0)
1400 tmp
|= LNK_NEG_FCTL
;
1402 printk(KERN_INFO
"%s: Disabling flow control "
1403 "negotiation\n", ap
->name
);
1405 tmp
|= LNK_RX_FLOW_CTL_Y
;
1406 if ((option
& 0x400) && (ap
->version
>= 2)) {
1407 printk(KERN_INFO
"%s: Enabling TX flow control\n",
1409 tmp
|= LNK_TX_FLOW_CTL_Y
;
1414 writel(tmp
, ®s
->TuneLink
);
1415 if (ap
->version
>= 2)
1416 writel(tmp
, ®s
->TuneFastLink
);
1418 writel(ap
->firmware_start
, ®s
->Pc
);
1420 writel(0, ®s
->Mb0Lo
);
1423 * Set tx_csm before we start receiving interrupts, otherwise
1424 * the interrupt handler might think it is supposed to process
1425 * tx ints before we are up and running, which may cause a null
1426 * pointer access in the int handler.
1429 ap
->tx_prd
= *(ap
->tx_csm
) = ap
->tx_ret_csm
= 0;
1432 ace_set_txprd(regs
, ap
, 0);
1433 writel(0, ®s
->RxRetCsm
);
1436 * Enable DMA engine now.
1437 * If we do this sooner, Mckinley box pukes.
1438 * I assume it's because Tigon II DMA engine wants to check
1439 * *something* even before the CPU is started.
1441 writel(1, ®s
->AssistState
); /* enable DMA */
1446 writel(readl(®s
->CpuCtrl
) & ~(CPU_HALT
|CPU_TRACE
), ®s
->CpuCtrl
);
1447 readl(®s
->CpuCtrl
);
1450 * Wait for the firmware to spin up - max 3 seconds.
1452 myjif
= jiffies
+ 3 * HZ
;
1453 while (time_before(jiffies
, myjif
) && !ap
->fw_running
)
1456 if (!ap
->fw_running
) {
1457 printk(KERN_ERR
"%s: Firmware NOT running!\n", ap
->name
);
1460 writel(readl(®s
->CpuCtrl
) | CPU_HALT
, ®s
->CpuCtrl
);
1461 readl(®s
->CpuCtrl
);
1463 /* aman@sgi.com - account for badly behaving firmware/NIC:
1464 * - have observed that the NIC may continue to generate
1465 * interrupts for some reason; attempt to stop it - halt
1466 * second CPU for Tigon II cards, and also clear Mb0
1467 * - if we're a module, we'll fail to load if this was
1468 * the only GbE card in the system => if the kernel does
1469 * see an interrupt from the NIC, code to handle it is
1470 * gone and OOps! - so free_irq also
1472 if (ap
->version
>= 2)
1473 writel(readl(®s
->CpuBCtrl
) | CPU_HALT
,
1475 writel(0, ®s
->Mb0Lo
);
1476 readl(®s
->Mb0Lo
);
1483 * We load the ring here as there seem to be no way to tell the
1484 * firmware to wipe the ring without re-initializing it.
1486 if (!test_and_set_bit(0, &ap
->std_refill_busy
))
1487 ace_load_std_rx_ring(dev
, RX_RING_SIZE
);
1489 printk(KERN_ERR
"%s: Someone is busy refilling the RX ring\n",
1491 if (ap
->version
>= 2) {
1492 if (!test_and_set_bit(0, &ap
->mini_refill_busy
))
1493 ace_load_mini_rx_ring(dev
, RX_MINI_SIZE
);
1495 printk(KERN_ERR
"%s: Someone is busy refilling "
1496 "the RX mini ring\n", ap
->name
);
1501 ace_init_cleanup(dev
);
1506 static void ace_set_rxtx_parms(struct net_device
*dev
, int jumbo
)
1508 struct ace_private
*ap
= netdev_priv(dev
);
1509 struct ace_regs __iomem
*regs
= ap
->regs
;
1510 int board_idx
= ap
->board_idx
;
1512 if (board_idx
>= 0) {
1514 if (!tx_coal_tick
[board_idx
])
1515 writel(DEF_TX_COAL
, ®s
->TuneTxCoalTicks
);
1516 if (!max_tx_desc
[board_idx
])
1517 writel(DEF_TX_MAX_DESC
, ®s
->TuneMaxTxDesc
);
1518 if (!rx_coal_tick
[board_idx
])
1519 writel(DEF_RX_COAL
, ®s
->TuneRxCoalTicks
);
1520 if (!max_rx_desc
[board_idx
])
1521 writel(DEF_RX_MAX_DESC
, ®s
->TuneMaxRxDesc
);
1522 if (!tx_ratio
[board_idx
])
1523 writel(DEF_TX_RATIO
, ®s
->TxBufRat
);
1525 if (!tx_coal_tick
[board_idx
])
1526 writel(DEF_JUMBO_TX_COAL
,
1527 ®s
->TuneTxCoalTicks
);
1528 if (!max_tx_desc
[board_idx
])
1529 writel(DEF_JUMBO_TX_MAX_DESC
,
1530 ®s
->TuneMaxTxDesc
);
1531 if (!rx_coal_tick
[board_idx
])
1532 writel(DEF_JUMBO_RX_COAL
,
1533 ®s
->TuneRxCoalTicks
);
1534 if (!max_rx_desc
[board_idx
])
1535 writel(DEF_JUMBO_RX_MAX_DESC
,
1536 ®s
->TuneMaxRxDesc
);
1537 if (!tx_ratio
[board_idx
])
1538 writel(DEF_JUMBO_TX_RATIO
, ®s
->TxBufRat
);
1544 static void ace_watchdog(struct net_device
*data
)
1546 struct net_device
*dev
= data
;
1547 struct ace_private
*ap
= netdev_priv(dev
);
1548 struct ace_regs __iomem
*regs
= ap
->regs
;
1551 * We haven't received a stats update event for more than 2.5
1552 * seconds and there is data in the transmit queue, thus we
1553 * assume the card is stuck.
1555 if (*ap
->tx_csm
!= ap
->tx_ret_csm
) {
1556 printk(KERN_WARNING
"%s: Transmitter is stuck, %08x\n",
1557 dev
->name
, (unsigned int)readl(®s
->HostCtrl
));
1558 /* This can happen due to ieee flow control. */
1560 printk(KERN_DEBUG
"%s: BUG... transmitter died. Kicking it.\n",
1563 netif_wake_queue(dev
);
1569 static void ace_tasklet(unsigned long arg
)
1571 struct net_device
*dev
= (struct net_device
*) arg
;
1572 struct ace_private
*ap
= netdev_priv(dev
);
1575 cur_size
= atomic_read(&ap
->cur_rx_bufs
);
1576 if ((cur_size
< RX_LOW_STD_THRES
) &&
1577 !test_and_set_bit(0, &ap
->std_refill_busy
)) {
1579 printk("refilling buffers (current %i)\n", cur_size
);
1581 ace_load_std_rx_ring(dev
, RX_RING_SIZE
- cur_size
);
1584 if (ap
->version
>= 2) {
1585 cur_size
= atomic_read(&ap
->cur_mini_bufs
);
1586 if ((cur_size
< RX_LOW_MINI_THRES
) &&
1587 !test_and_set_bit(0, &ap
->mini_refill_busy
)) {
1589 printk("refilling mini buffers (current %i)\n",
1592 ace_load_mini_rx_ring(dev
, RX_MINI_SIZE
- cur_size
);
1596 cur_size
= atomic_read(&ap
->cur_jumbo_bufs
);
1597 if (ap
->jumbo
&& (cur_size
< RX_LOW_JUMBO_THRES
) &&
1598 !test_and_set_bit(0, &ap
->jumbo_refill_busy
)) {
1600 printk("refilling jumbo buffers (current %i)\n", cur_size
);
1602 ace_load_jumbo_rx_ring(dev
, RX_JUMBO_SIZE
- cur_size
);
1604 ap
->tasklet_pending
= 0;
1609 * Copy the contents of the NIC's trace buffer to kernel memory.
1611 static void ace_dump_trace(struct ace_private
*ap
)
1615 if (!(ap
->trace_buf
= kmalloc(ACE_TRACE_SIZE
, GFP_KERNEL
)))
1622 * Load the standard rx ring.
1624 * Loading rings is safe without holding the spin lock since this is
1625 * done only before the device is enabled, thus no interrupts are
1626 * generated and by the interrupt handler/tasklet handler.
1628 static void ace_load_std_rx_ring(struct net_device
*dev
, int nr_bufs
)
1630 struct ace_private
*ap
= netdev_priv(dev
);
1631 struct ace_regs __iomem
*regs
= ap
->regs
;
1635 prefetchw(&ap
->cur_rx_bufs
);
1637 idx
= ap
->rx_std_skbprd
;
1639 for (i
= 0; i
< nr_bufs
; i
++) {
1640 struct sk_buff
*skb
;
1644 skb
= netdev_alloc_skb_ip_align(dev
, ACE_STD_BUFSIZE
);
1648 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1649 offset_in_page(skb
->data
),
1651 PCI_DMA_FROMDEVICE
);
1652 ap
->skb
->rx_std_skbuff
[idx
].skb
= skb
;
1653 dma_unmap_addr_set(&ap
->skb
->rx_std_skbuff
[idx
],
1656 rd
= &ap
->rx_std_ring
[idx
];
1657 set_aceaddr(&rd
->addr
, mapping
);
1658 rd
->size
= ACE_STD_BUFSIZE
;
1660 idx
= (idx
+ 1) % RX_STD_RING_ENTRIES
;
1666 atomic_add(i
, &ap
->cur_rx_bufs
);
1667 ap
->rx_std_skbprd
= idx
;
1669 if (ACE_IS_TIGON_I(ap
)) {
1671 cmd
.evt
= C_SET_RX_PRD_IDX
;
1673 cmd
.idx
= ap
->rx_std_skbprd
;
1674 ace_issue_cmd(regs
, &cmd
);
1676 writel(idx
, ®s
->RxStdPrd
);
1681 clear_bit(0, &ap
->std_refill_busy
);
1685 printk(KERN_INFO
"Out of memory when allocating "
1686 "standard receive buffers\n");
1691 static void ace_load_mini_rx_ring(struct net_device
*dev
, int nr_bufs
)
1693 struct ace_private
*ap
= netdev_priv(dev
);
1694 struct ace_regs __iomem
*regs
= ap
->regs
;
1697 prefetchw(&ap
->cur_mini_bufs
);
1699 idx
= ap
->rx_mini_skbprd
;
1700 for (i
= 0; i
< nr_bufs
; i
++) {
1701 struct sk_buff
*skb
;
1705 skb
= netdev_alloc_skb_ip_align(dev
, ACE_MINI_BUFSIZE
);
1709 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1710 offset_in_page(skb
->data
),
1712 PCI_DMA_FROMDEVICE
);
1713 ap
->skb
->rx_mini_skbuff
[idx
].skb
= skb
;
1714 dma_unmap_addr_set(&ap
->skb
->rx_mini_skbuff
[idx
],
1717 rd
= &ap
->rx_mini_ring
[idx
];
1718 set_aceaddr(&rd
->addr
, mapping
);
1719 rd
->size
= ACE_MINI_BUFSIZE
;
1721 idx
= (idx
+ 1) % RX_MINI_RING_ENTRIES
;
1727 atomic_add(i
, &ap
->cur_mini_bufs
);
1729 ap
->rx_mini_skbprd
= idx
;
1731 writel(idx
, ®s
->RxMiniPrd
);
1735 clear_bit(0, &ap
->mini_refill_busy
);
1738 printk(KERN_INFO
"Out of memory when allocating "
1739 "mini receive buffers\n");
1745 * Load the jumbo rx ring, this may happen at any time if the MTU
1746 * is changed to a value > 1500.
1748 static void ace_load_jumbo_rx_ring(struct net_device
*dev
, int nr_bufs
)
1750 struct ace_private
*ap
= netdev_priv(dev
);
1751 struct ace_regs __iomem
*regs
= ap
->regs
;
1754 idx
= ap
->rx_jumbo_skbprd
;
1756 for (i
= 0; i
< nr_bufs
; i
++) {
1757 struct sk_buff
*skb
;
1761 skb
= netdev_alloc_skb_ip_align(dev
, ACE_JUMBO_BUFSIZE
);
1765 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
1766 offset_in_page(skb
->data
),
1768 PCI_DMA_FROMDEVICE
);
1769 ap
->skb
->rx_jumbo_skbuff
[idx
].skb
= skb
;
1770 dma_unmap_addr_set(&ap
->skb
->rx_jumbo_skbuff
[idx
],
1773 rd
= &ap
->rx_jumbo_ring
[idx
];
1774 set_aceaddr(&rd
->addr
, mapping
);
1775 rd
->size
= ACE_JUMBO_BUFSIZE
;
1777 idx
= (idx
+ 1) % RX_JUMBO_RING_ENTRIES
;
1783 atomic_add(i
, &ap
->cur_jumbo_bufs
);
1784 ap
->rx_jumbo_skbprd
= idx
;
1786 if (ACE_IS_TIGON_I(ap
)) {
1788 cmd
.evt
= C_SET_RX_JUMBO_PRD_IDX
;
1790 cmd
.idx
= ap
->rx_jumbo_skbprd
;
1791 ace_issue_cmd(regs
, &cmd
);
1793 writel(idx
, ®s
->RxJumboPrd
);
1798 clear_bit(0, &ap
->jumbo_refill_busy
);
1801 if (net_ratelimit())
1802 printk(KERN_INFO
"Out of memory when allocating "
1803 "jumbo receive buffers\n");
1809 * All events are considered to be slow (RX/TX ints do not generate
1810 * events) and are handled here, outside the main interrupt handler,
1811 * to reduce the size of the handler.
1813 static u32
ace_handle_event(struct net_device
*dev
, u32 evtcsm
, u32 evtprd
)
1815 struct ace_private
*ap
;
1817 ap
= netdev_priv(dev
);
1819 while (evtcsm
!= evtprd
) {
1820 switch (ap
->evt_ring
[evtcsm
].evt
) {
1822 printk(KERN_INFO
"%s: Firmware up and running\n",
1827 case E_STATS_UPDATED
:
1831 u16 code
= ap
->evt_ring
[evtcsm
].code
;
1835 u32 state
= readl(&ap
->regs
->GigLnkState
);
1836 printk(KERN_WARNING
"%s: Optical link UP "
1837 "(%s Duplex, Flow Control: %s%s)\n",
1839 state
& LNK_FULL_DUPLEX
? "Full":"Half",
1840 state
& LNK_TX_FLOW_CTL_Y
? "TX " : "",
1841 state
& LNK_RX_FLOW_CTL_Y
? "RX" : "");
1845 printk(KERN_WARNING
"%s: Optical link DOWN\n",
1848 case E_C_LINK_10_100
:
1849 printk(KERN_WARNING
"%s: 10/100BaseT link "
1853 printk(KERN_ERR
"%s: Unknown optical link "
1854 "state %02x\n", ap
->name
, code
);
1859 switch(ap
->evt_ring
[evtcsm
].code
) {
1860 case E_C_ERR_INVAL_CMD
:
1861 printk(KERN_ERR
"%s: invalid command error\n",
1864 case E_C_ERR_UNIMP_CMD
:
1865 printk(KERN_ERR
"%s: unimplemented command "
1866 "error\n", ap
->name
);
1868 case E_C_ERR_BAD_CFG
:
1869 printk(KERN_ERR
"%s: bad config error\n",
1873 printk(KERN_ERR
"%s: unknown error %02x\n",
1874 ap
->name
, ap
->evt_ring
[evtcsm
].code
);
1877 case E_RESET_JUMBO_RNG
:
1880 for (i
= 0; i
< RX_JUMBO_RING_ENTRIES
; i
++) {
1881 if (ap
->skb
->rx_jumbo_skbuff
[i
].skb
) {
1882 ap
->rx_jumbo_ring
[i
].size
= 0;
1883 set_aceaddr(&ap
->rx_jumbo_ring
[i
].addr
, 0);
1884 dev_kfree_skb(ap
->skb
->rx_jumbo_skbuff
[i
].skb
);
1885 ap
->skb
->rx_jumbo_skbuff
[i
].skb
= NULL
;
1889 if (ACE_IS_TIGON_I(ap
)) {
1891 cmd
.evt
= C_SET_RX_JUMBO_PRD_IDX
;
1894 ace_issue_cmd(ap
->regs
, &cmd
);
1896 writel(0, &((ap
->regs
)->RxJumboPrd
));
1901 ap
->rx_jumbo_skbprd
= 0;
1902 printk(KERN_INFO
"%s: Jumbo ring flushed\n",
1904 clear_bit(0, &ap
->jumbo_refill_busy
);
1908 printk(KERN_ERR
"%s: Unhandled event 0x%02x\n",
1909 ap
->name
, ap
->evt_ring
[evtcsm
].evt
);
1911 evtcsm
= (evtcsm
+ 1) % EVT_RING_ENTRIES
;
1918 static void ace_rx_int(struct net_device
*dev
, u32 rxretprd
, u32 rxretcsm
)
1920 struct ace_private
*ap
= netdev_priv(dev
);
1922 int mini_count
= 0, std_count
= 0;
1926 prefetchw(&ap
->cur_rx_bufs
);
1927 prefetchw(&ap
->cur_mini_bufs
);
1929 while (idx
!= rxretprd
) {
1930 struct ring_info
*rip
;
1931 struct sk_buff
*skb
;
1932 struct rx_desc
*rxdesc
, *retdesc
;
1934 int bd_flags
, desc_type
, mapsize
;
1938 /* make sure the rx descriptor isn't read before rxretprd */
1939 if (idx
== rxretcsm
)
1942 retdesc
= &ap
->rx_return_ring
[idx
];
1943 skbidx
= retdesc
->idx
;
1944 bd_flags
= retdesc
->flags
;
1945 desc_type
= bd_flags
& (BD_FLG_JUMBO
| BD_FLG_MINI
);
1949 * Normal frames do not have any flags set
1951 * Mini and normal frames arrive frequently,
1952 * so use a local counter to avoid doing
1953 * atomic operations for each packet arriving.
1956 rip
= &ap
->skb
->rx_std_skbuff
[skbidx
];
1957 mapsize
= ACE_STD_BUFSIZE
;
1958 rxdesc
= &ap
->rx_std_ring
[skbidx
];
1962 rip
= &ap
->skb
->rx_jumbo_skbuff
[skbidx
];
1963 mapsize
= ACE_JUMBO_BUFSIZE
;
1964 rxdesc
= &ap
->rx_jumbo_ring
[skbidx
];
1965 atomic_dec(&ap
->cur_jumbo_bufs
);
1968 rip
= &ap
->skb
->rx_mini_skbuff
[skbidx
];
1969 mapsize
= ACE_MINI_BUFSIZE
;
1970 rxdesc
= &ap
->rx_mini_ring
[skbidx
];
1974 printk(KERN_INFO
"%s: unknown frame type (0x%02x) "
1975 "returned by NIC\n", dev
->name
,
1982 pci_unmap_page(ap
->pdev
,
1983 dma_unmap_addr(rip
, mapping
),
1985 PCI_DMA_FROMDEVICE
);
1986 skb_put(skb
, retdesc
->size
);
1991 csum
= retdesc
->tcp_udp_csum
;
1993 skb
->protocol
= eth_type_trans(skb
, dev
);
1996 * Instead of forcing the poor tigon mips cpu to calculate
1997 * pseudo hdr checksum, we do this ourselves.
1999 if (bd_flags
& BD_FLG_TCP_UDP_SUM
) {
2000 skb
->csum
= htons(csum
);
2001 skb
->ip_summed
= CHECKSUM_COMPLETE
;
2003 skb_checksum_none_assert(skb
);
2007 if ((bd_flags
& BD_FLG_VLAN_TAG
))
2008 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), retdesc
->vlan
);
2011 dev
->stats
.rx_packets
++;
2012 dev
->stats
.rx_bytes
+= retdesc
->size
;
2014 idx
= (idx
+ 1) % RX_RETURN_RING_ENTRIES
;
2017 atomic_sub(std_count
, &ap
->cur_rx_bufs
);
2018 if (!ACE_IS_TIGON_I(ap
))
2019 atomic_sub(mini_count
, &ap
->cur_mini_bufs
);
2023 * According to the documentation RxRetCsm is obsolete with
2024 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2026 if (ACE_IS_TIGON_I(ap
)) {
2027 writel(idx
, &ap
->regs
->RxRetCsm
);
2038 static inline void ace_tx_int(struct net_device
*dev
,
2041 struct ace_private
*ap
= netdev_priv(dev
);
2044 struct sk_buff
*skb
;
2045 struct tx_ring_info
*info
;
2047 info
= ap
->skb
->tx_skbuff
+ idx
;
2050 if (dma_unmap_len(info
, maplen
)) {
2051 pci_unmap_page(ap
->pdev
, dma_unmap_addr(info
, mapping
),
2052 dma_unmap_len(info
, maplen
),
2054 dma_unmap_len_set(info
, maplen
, 0);
2058 dev
->stats
.tx_packets
++;
2059 dev
->stats
.tx_bytes
+= skb
->len
;
2060 dev_kfree_skb_irq(skb
);
2064 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2065 } while (idx
!= txcsm
);
2067 if (netif_queue_stopped(dev
))
2068 netif_wake_queue(dev
);
2071 ap
->tx_ret_csm
= txcsm
;
2073 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2075 * We could try to make it before. In this case we would get
2076 * the following race condition: hard_start_xmit on other cpu
2077 * enters after we advanced tx_ret_csm and fills space,
2078 * which we have just freed, so that we make illegal device wakeup.
2079 * There is no good way to workaround this (at entry
2080 * to ace_start_xmit detects this condition and prevents
2081 * ring corruption, but it is not a good workaround.)
2083 * When tx_ret_csm is advanced after, we wake up device _only_
2084 * if we really have some space in ring (though the core doing
2085 * hard_start_xmit can see full ring for some period and has to
2086 * synchronize.) Superb.
2087 * BUT! We get another subtle race condition. hard_start_xmit
2088 * may think that ring is full between wakeup and advancing
2089 * tx_ret_csm and will stop device instantly! It is not so bad.
2090 * We are guaranteed that there is something in ring, so that
2091 * the next irq will resume transmission. To speedup this we could
2092 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2093 * (see ace_start_xmit).
2095 * Well, this dilemma exists in all lock-free devices.
2096 * We, following scheme used in drivers by Donald Becker,
2097 * select the least dangerous.
2103 static irqreturn_t
ace_interrupt(int irq
, void *dev_id
)
2105 struct net_device
*dev
= (struct net_device
*)dev_id
;
2106 struct ace_private
*ap
= netdev_priv(dev
);
2107 struct ace_regs __iomem
*regs
= ap
->regs
;
2109 u32 txcsm
, rxretcsm
, rxretprd
;
2113 * In case of PCI shared interrupts or spurious interrupts,
2114 * we want to make sure it is actually our interrupt before
2115 * spending any time in here.
2117 if (!(readl(®s
->HostCtrl
) & IN_INT
))
2121 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2122 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2123 * writel(0, ®s->Mb0Lo).
2125 * "IRQ avoidance" recommended in docs applies to IRQs served
2126 * threads and it is wrong even for that case.
2128 writel(0, ®s
->Mb0Lo
);
2129 readl(®s
->Mb0Lo
);
2132 * There is no conflict between transmit handling in
2133 * start_xmit and receive processing, thus there is no reason
2134 * to take a spin lock for RX handling. Wait until we start
2135 * working on the other stuff - hey we don't need a spin lock
2138 rxretprd
= *ap
->rx_ret_prd
;
2139 rxretcsm
= ap
->cur_rx
;
2141 if (rxretprd
!= rxretcsm
)
2142 ace_rx_int(dev
, rxretprd
, rxretcsm
);
2144 txcsm
= *ap
->tx_csm
;
2145 idx
= ap
->tx_ret_csm
;
2149 * If each skb takes only one descriptor this check degenerates
2150 * to identity, because new space has just been opened.
2151 * But if skbs are fragmented we must check that this index
2152 * update releases enough of space, otherwise we just
2153 * wait for device to make more work.
2155 if (!tx_ring_full(ap
, txcsm
, ap
->tx_prd
))
2156 ace_tx_int(dev
, txcsm
, idx
);
2159 evtcsm
= readl(®s
->EvtCsm
);
2160 evtprd
= *ap
->evt_prd
;
2162 if (evtcsm
!= evtprd
) {
2163 evtcsm
= ace_handle_event(dev
, evtcsm
, evtprd
);
2164 writel(evtcsm
, ®s
->EvtCsm
);
2168 * This has to go last in the interrupt handler and run with
2169 * the spin lock released ... what lock?
2171 if (netif_running(dev
)) {
2173 int run_tasklet
= 0;
2175 cur_size
= atomic_read(&ap
->cur_rx_bufs
);
2176 if (cur_size
< RX_LOW_STD_THRES
) {
2177 if ((cur_size
< RX_PANIC_STD_THRES
) &&
2178 !test_and_set_bit(0, &ap
->std_refill_busy
)) {
2180 printk("low on std buffers %i\n", cur_size
);
2182 ace_load_std_rx_ring(dev
,
2183 RX_RING_SIZE
- cur_size
);
2188 if (!ACE_IS_TIGON_I(ap
)) {
2189 cur_size
= atomic_read(&ap
->cur_mini_bufs
);
2190 if (cur_size
< RX_LOW_MINI_THRES
) {
2191 if ((cur_size
< RX_PANIC_MINI_THRES
) &&
2192 !test_and_set_bit(0,
2193 &ap
->mini_refill_busy
)) {
2195 printk("low on mini buffers %i\n",
2198 ace_load_mini_rx_ring(dev
,
2199 RX_MINI_SIZE
- cur_size
);
2206 cur_size
= atomic_read(&ap
->cur_jumbo_bufs
);
2207 if (cur_size
< RX_LOW_JUMBO_THRES
) {
2208 if ((cur_size
< RX_PANIC_JUMBO_THRES
) &&
2209 !test_and_set_bit(0,
2210 &ap
->jumbo_refill_busy
)){
2212 printk("low on jumbo buffers %i\n",
2215 ace_load_jumbo_rx_ring(dev
,
2216 RX_JUMBO_SIZE
- cur_size
);
2221 if (run_tasklet
&& !ap
->tasklet_pending
) {
2222 ap
->tasklet_pending
= 1;
2223 tasklet_schedule(&ap
->ace_tasklet
);
2230 static int ace_open(struct net_device
*dev
)
2232 struct ace_private
*ap
= netdev_priv(dev
);
2233 struct ace_regs __iomem
*regs
= ap
->regs
;
2236 if (!(ap
->fw_running
)) {
2237 printk(KERN_WARNING
"%s: Firmware not running!\n", dev
->name
);
2241 writel(dev
->mtu
+ ETH_HLEN
+ 4, ®s
->IfMtu
);
2243 cmd
.evt
= C_CLEAR_STATS
;
2246 ace_issue_cmd(regs
, &cmd
);
2248 cmd
.evt
= C_HOST_STATE
;
2249 cmd
.code
= C_C_STACK_UP
;
2251 ace_issue_cmd(regs
, &cmd
);
2254 !test_and_set_bit(0, &ap
->jumbo_refill_busy
))
2255 ace_load_jumbo_rx_ring(dev
, RX_JUMBO_SIZE
);
2257 if (dev
->flags
& IFF_PROMISC
) {
2258 cmd
.evt
= C_SET_PROMISC_MODE
;
2259 cmd
.code
= C_C_PROMISC_ENABLE
;
2261 ace_issue_cmd(regs
, &cmd
);
2269 cmd
.evt
= C_LNK_NEGOTIATION
;
2272 ace_issue_cmd(regs
, &cmd
);
2275 netif_start_queue(dev
);
2278 * Setup the bottom half rx ring refill handler
2280 tasklet_init(&ap
->ace_tasklet
, ace_tasklet
, (unsigned long)dev
);
2285 static int ace_close(struct net_device
*dev
)
2287 struct ace_private
*ap
= netdev_priv(dev
);
2288 struct ace_regs __iomem
*regs
= ap
->regs
;
2290 unsigned long flags
;
2294 * Without (or before) releasing irq and stopping hardware, this
2295 * is an absolute non-sense, by the way. It will be reset instantly
2298 netif_stop_queue(dev
);
2302 cmd
.evt
= C_SET_PROMISC_MODE
;
2303 cmd
.code
= C_C_PROMISC_DISABLE
;
2305 ace_issue_cmd(regs
, &cmd
);
2309 cmd
.evt
= C_HOST_STATE
;
2310 cmd
.code
= C_C_STACK_DOWN
;
2312 ace_issue_cmd(regs
, &cmd
);
2314 tasklet_kill(&ap
->ace_tasklet
);
2317 * Make sure one CPU is not processing packets while
2318 * buffers are being released by another.
2321 local_irq_save(flags
);
2324 for (i
= 0; i
< ACE_TX_RING_ENTRIES(ap
); i
++) {
2325 struct sk_buff
*skb
;
2326 struct tx_ring_info
*info
;
2328 info
= ap
->skb
->tx_skbuff
+ i
;
2331 if (dma_unmap_len(info
, maplen
)) {
2332 if (ACE_IS_TIGON_I(ap
)) {
2333 /* NB: TIGON_1 is special, tx_ring is in io space */
2334 struct tx_desc __iomem
*tx
;
2335 tx
= (__force
struct tx_desc __iomem
*) &ap
->tx_ring
[i
];
2336 writel(0, &tx
->addr
.addrhi
);
2337 writel(0, &tx
->addr
.addrlo
);
2338 writel(0, &tx
->flagsize
);
2340 memset(ap
->tx_ring
+ i
, 0,
2341 sizeof(struct tx_desc
));
2342 pci_unmap_page(ap
->pdev
, dma_unmap_addr(info
, mapping
),
2343 dma_unmap_len(info
, maplen
),
2345 dma_unmap_len_set(info
, maplen
, 0);
2354 cmd
.evt
= C_RESET_JUMBO_RNG
;
2357 ace_issue_cmd(regs
, &cmd
);
2360 ace_unmask_irq(dev
);
2361 local_irq_restore(flags
);
2367 static inline dma_addr_t
2368 ace_map_tx_skb(struct ace_private
*ap
, struct sk_buff
*skb
,
2369 struct sk_buff
*tail
, u32 idx
)
2372 struct tx_ring_info
*info
;
2374 mapping
= pci_map_page(ap
->pdev
, virt_to_page(skb
->data
),
2375 offset_in_page(skb
->data
),
2376 skb
->len
, PCI_DMA_TODEVICE
);
2378 info
= ap
->skb
->tx_skbuff
+ idx
;
2380 dma_unmap_addr_set(info
, mapping
, mapping
);
2381 dma_unmap_len_set(info
, maplen
, skb
->len
);
2387 ace_load_tx_bd(struct ace_private
*ap
, struct tx_desc
*desc
, u64 addr
,
2388 u32 flagsize
, u32 vlan_tag
)
2390 #if !USE_TX_COAL_NOW
2391 flagsize
&= ~BD_FLG_COAL_NOW
;
2394 if (ACE_IS_TIGON_I(ap
)) {
2395 struct tx_desc __iomem
*io
= (__force
struct tx_desc __iomem
*) desc
;
2396 writel(addr
>> 32, &io
->addr
.addrhi
);
2397 writel(addr
& 0xffffffff, &io
->addr
.addrlo
);
2398 writel(flagsize
, &io
->flagsize
);
2399 writel(vlan_tag
, &io
->vlanres
);
2401 desc
->addr
.addrhi
= addr
>> 32;
2402 desc
->addr
.addrlo
= addr
;
2403 desc
->flagsize
= flagsize
;
2404 desc
->vlanres
= vlan_tag
;
2409 static netdev_tx_t
ace_start_xmit(struct sk_buff
*skb
,
2410 struct net_device
*dev
)
2412 struct ace_private
*ap
= netdev_priv(dev
);
2413 struct ace_regs __iomem
*regs
= ap
->regs
;
2414 struct tx_desc
*desc
;
2416 unsigned long maxjiff
= jiffies
+ 3*HZ
;
2421 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2424 if (!skb_shinfo(skb
)->nr_frags
) {
2428 mapping
= ace_map_tx_skb(ap
, skb
, skb
, idx
);
2429 flagsize
= (skb
->len
<< 16) | (BD_FLG_END
);
2430 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2431 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2432 if (skb_vlan_tag_present(skb
)) {
2433 flagsize
|= BD_FLG_VLAN_TAG
;
2434 vlan_tag
= skb_vlan_tag_get(skb
);
2436 desc
= ap
->tx_ring
+ idx
;
2437 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2439 /* Look at ace_tx_int for explanations. */
2440 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2441 flagsize
|= BD_FLG_COAL_NOW
;
2443 ace_load_tx_bd(ap
, desc
, mapping
, flagsize
, vlan_tag
);
2449 mapping
= ace_map_tx_skb(ap
, skb
, NULL
, idx
);
2450 flagsize
= (skb_headlen(skb
) << 16);
2451 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2452 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2453 if (skb_vlan_tag_present(skb
)) {
2454 flagsize
|= BD_FLG_VLAN_TAG
;
2455 vlan_tag
= skb_vlan_tag_get(skb
);
2458 ace_load_tx_bd(ap
, ap
->tx_ring
+ idx
, mapping
, flagsize
, vlan_tag
);
2460 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2462 for (i
= 0; i
< skb_shinfo(skb
)->nr_frags
; i
++) {
2463 const skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[i
];
2464 struct tx_ring_info
*info
;
2466 len
+= skb_frag_size(frag
);
2467 info
= ap
->skb
->tx_skbuff
+ idx
;
2468 desc
= ap
->tx_ring
+ idx
;
2470 mapping
= skb_frag_dma_map(&ap
->pdev
->dev
, frag
, 0,
2471 skb_frag_size(frag
),
2474 flagsize
= skb_frag_size(frag
) << 16;
2475 if (skb
->ip_summed
== CHECKSUM_PARTIAL
)
2476 flagsize
|= BD_FLG_TCP_UDP_SUM
;
2477 idx
= (idx
+ 1) % ACE_TX_RING_ENTRIES(ap
);
2479 if (i
== skb_shinfo(skb
)->nr_frags
- 1) {
2480 flagsize
|= BD_FLG_END
;
2481 if (tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2482 flagsize
|= BD_FLG_COAL_NOW
;
2485 * Only the last fragment frees
2492 dma_unmap_addr_set(info
, mapping
, mapping
);
2493 dma_unmap_len_set(info
, maplen
, skb_frag_size(frag
));
2494 ace_load_tx_bd(ap
, desc
, mapping
, flagsize
, vlan_tag
);
2500 ace_set_txprd(regs
, ap
, idx
);
2502 if (flagsize
& BD_FLG_COAL_NOW
) {
2503 netif_stop_queue(dev
);
2506 * A TX-descriptor producer (an IRQ) might have gotten
2507 * between, making the ring free again. Since xmit is
2508 * serialized, this is the only situation we have to
2511 if (!tx_ring_full(ap
, ap
->tx_ret_csm
, idx
))
2512 netif_wake_queue(dev
);
2515 return NETDEV_TX_OK
;
2519 * This race condition is unavoidable with lock-free drivers.
2520 * We wake up the queue _before_ tx_prd is advanced, so that we can
2521 * enter hard_start_xmit too early, while tx ring still looks closed.
2522 * This happens ~1-4 times per 100000 packets, so that we can allow
2523 * to loop syncing to other CPU. Probably, we need an additional
2524 * wmb() in ace_tx_intr as well.
2526 * Note that this race is relieved by reserving one more entry
2527 * in tx ring than it is necessary (see original non-SG driver).
2528 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2529 * is already overkill.
2531 * Alternative is to return with 1 not throttling queue. In this
2532 * case loop becomes longer, no more useful effects.
2534 if (time_before(jiffies
, maxjiff
)) {
2540 /* The ring is stuck full. */
2541 printk(KERN_WARNING
"%s: Transmit ring stuck full\n", dev
->name
);
2542 return NETDEV_TX_BUSY
;
2546 static int ace_change_mtu(struct net_device
*dev
, int new_mtu
)
2548 struct ace_private
*ap
= netdev_priv(dev
);
2549 struct ace_regs __iomem
*regs
= ap
->regs
;
2551 if (new_mtu
> ACE_JUMBO_MTU
)
2554 writel(new_mtu
+ ETH_HLEN
+ 4, ®s
->IfMtu
);
2557 if (new_mtu
> ACE_STD_MTU
) {
2559 printk(KERN_INFO
"%s: Enabling Jumbo frame "
2560 "support\n", dev
->name
);
2562 if (!test_and_set_bit(0, &ap
->jumbo_refill_busy
))
2563 ace_load_jumbo_rx_ring(dev
, RX_JUMBO_SIZE
);
2564 ace_set_rxtx_parms(dev
, 1);
2567 while (test_and_set_bit(0, &ap
->jumbo_refill_busy
));
2568 ace_sync_irq(dev
->irq
);
2569 ace_set_rxtx_parms(dev
, 0);
2573 cmd
.evt
= C_RESET_JUMBO_RNG
;
2576 ace_issue_cmd(regs
, &cmd
);
2583 static int ace_get_settings(struct net_device
*dev
, struct ethtool_cmd
*ecmd
)
2585 struct ace_private
*ap
= netdev_priv(dev
);
2586 struct ace_regs __iomem
*regs
= ap
->regs
;
2589 memset(ecmd
, 0, sizeof(struct ethtool_cmd
));
2591 (SUPPORTED_10baseT_Half
| SUPPORTED_10baseT_Full
|
2592 SUPPORTED_100baseT_Half
| SUPPORTED_100baseT_Full
|
2593 SUPPORTED_1000baseT_Half
| SUPPORTED_1000baseT_Full
|
2594 SUPPORTED_Autoneg
| SUPPORTED_FIBRE
);
2596 ecmd
->port
= PORT_FIBRE
;
2597 ecmd
->transceiver
= XCVR_INTERNAL
;
2599 link
= readl(®s
->GigLnkState
);
2600 if (link
& LNK_1000MB
)
2601 ethtool_cmd_speed_set(ecmd
, SPEED_1000
);
2603 link
= readl(®s
->FastLnkState
);
2604 if (link
& LNK_100MB
)
2605 ethtool_cmd_speed_set(ecmd
, SPEED_100
);
2606 else if (link
& LNK_10MB
)
2607 ethtool_cmd_speed_set(ecmd
, SPEED_10
);
2609 ethtool_cmd_speed_set(ecmd
, 0);
2611 if (link
& LNK_FULL_DUPLEX
)
2612 ecmd
->duplex
= DUPLEX_FULL
;
2614 ecmd
->duplex
= DUPLEX_HALF
;
2616 if (link
& LNK_NEGOTIATE
)
2617 ecmd
->autoneg
= AUTONEG_ENABLE
;
2619 ecmd
->autoneg
= AUTONEG_DISABLE
;
2623 * Current struct ethtool_cmd is insufficient
2625 ecmd
->trace
= readl(®s
->TuneTrace
);
2627 ecmd
->txcoal
= readl(®s
->TuneTxCoalTicks
);
2628 ecmd
->rxcoal
= readl(®s
->TuneRxCoalTicks
);
2630 ecmd
->maxtxpkt
= readl(®s
->TuneMaxTxDesc
);
2631 ecmd
->maxrxpkt
= readl(®s
->TuneMaxRxDesc
);
2636 static int ace_set_settings(struct net_device
*dev
, struct ethtool_cmd
*ecmd
)
2638 struct ace_private
*ap
= netdev_priv(dev
);
2639 struct ace_regs __iomem
*regs
= ap
->regs
;
2642 link
= readl(®s
->GigLnkState
);
2643 if (link
& LNK_1000MB
)
2646 link
= readl(®s
->FastLnkState
);
2647 if (link
& LNK_100MB
)
2649 else if (link
& LNK_10MB
)
2655 link
= LNK_ENABLE
| LNK_1000MB
| LNK_100MB
| LNK_10MB
|
2656 LNK_RX_FLOW_CTL_Y
| LNK_NEG_FCTL
;
2657 if (!ACE_IS_TIGON_I(ap
))
2658 link
|= LNK_TX_FLOW_CTL_Y
;
2659 if (ecmd
->autoneg
== AUTONEG_ENABLE
)
2660 link
|= LNK_NEGOTIATE
;
2661 if (ethtool_cmd_speed(ecmd
) != speed
) {
2662 link
&= ~(LNK_1000MB
| LNK_100MB
| LNK_10MB
);
2663 switch (ethtool_cmd_speed(ecmd
)) {
2676 if (ecmd
->duplex
== DUPLEX_FULL
)
2677 link
|= LNK_FULL_DUPLEX
;
2679 if (link
!= ap
->link
) {
2681 printk(KERN_INFO
"%s: Renegotiating link state\n",
2685 writel(link
, ®s
->TuneLink
);
2686 if (!ACE_IS_TIGON_I(ap
))
2687 writel(link
, ®s
->TuneFastLink
);
2690 cmd
.evt
= C_LNK_NEGOTIATION
;
2693 ace_issue_cmd(regs
, &cmd
);
2698 static void ace_get_drvinfo(struct net_device
*dev
,
2699 struct ethtool_drvinfo
*info
)
2701 struct ace_private
*ap
= netdev_priv(dev
);
2703 strlcpy(info
->driver
, "acenic", sizeof(info
->driver
));
2704 snprintf(info
->version
, sizeof(info
->version
), "%i.%i.%i",
2705 ap
->firmware_major
, ap
->firmware_minor
,
2709 strlcpy(info
->bus_info
, pci_name(ap
->pdev
),
2710 sizeof(info
->bus_info
));
2715 * Set the hardware MAC address.
2717 static int ace_set_mac_addr(struct net_device
*dev
, void *p
)
2719 struct ace_private
*ap
= netdev_priv(dev
);
2720 struct ace_regs __iomem
*regs
= ap
->regs
;
2721 struct sockaddr
*addr
=p
;
2725 if(netif_running(dev
))
2728 memcpy(dev
->dev_addr
, addr
->sa_data
,dev
->addr_len
);
2730 da
= (u8
*)dev
->dev_addr
;
2732 writel(da
[0] << 8 | da
[1], ®s
->MacAddrHi
);
2733 writel((da
[2] << 24) | (da
[3] << 16) | (da
[4] << 8) | da
[5],
2736 cmd
.evt
= C_SET_MAC_ADDR
;
2739 ace_issue_cmd(regs
, &cmd
);
2745 static void ace_set_multicast_list(struct net_device
*dev
)
2747 struct ace_private
*ap
= netdev_priv(dev
);
2748 struct ace_regs __iomem
*regs
= ap
->regs
;
2751 if ((dev
->flags
& IFF_ALLMULTI
) && !(ap
->mcast_all
)) {
2752 cmd
.evt
= C_SET_MULTICAST_MODE
;
2753 cmd
.code
= C_C_MCAST_ENABLE
;
2755 ace_issue_cmd(regs
, &cmd
);
2757 } else if (ap
->mcast_all
) {
2758 cmd
.evt
= C_SET_MULTICAST_MODE
;
2759 cmd
.code
= C_C_MCAST_DISABLE
;
2761 ace_issue_cmd(regs
, &cmd
);
2765 if ((dev
->flags
& IFF_PROMISC
) && !(ap
->promisc
)) {
2766 cmd
.evt
= C_SET_PROMISC_MODE
;
2767 cmd
.code
= C_C_PROMISC_ENABLE
;
2769 ace_issue_cmd(regs
, &cmd
);
2771 }else if (!(dev
->flags
& IFF_PROMISC
) && (ap
->promisc
)) {
2772 cmd
.evt
= C_SET_PROMISC_MODE
;
2773 cmd
.code
= C_C_PROMISC_DISABLE
;
2775 ace_issue_cmd(regs
, &cmd
);
2780 * For the time being multicast relies on the upper layers
2781 * filtering it properly. The Firmware does not allow one to
2782 * set the entire multicast list at a time and keeping track of
2783 * it here is going to be messy.
2785 if (!netdev_mc_empty(dev
) && !ap
->mcast_all
) {
2786 cmd
.evt
= C_SET_MULTICAST_MODE
;
2787 cmd
.code
= C_C_MCAST_ENABLE
;
2789 ace_issue_cmd(regs
, &cmd
);
2790 }else if (!ap
->mcast_all
) {
2791 cmd
.evt
= C_SET_MULTICAST_MODE
;
2792 cmd
.code
= C_C_MCAST_DISABLE
;
2794 ace_issue_cmd(regs
, &cmd
);
2799 static struct net_device_stats
*ace_get_stats(struct net_device
*dev
)
2801 struct ace_private
*ap
= netdev_priv(dev
);
2802 struct ace_mac_stats __iomem
*mac_stats
=
2803 (struct ace_mac_stats __iomem
*)ap
->regs
->Stats
;
2805 dev
->stats
.rx_missed_errors
= readl(&mac_stats
->drop_space
);
2806 dev
->stats
.multicast
= readl(&mac_stats
->kept_mc
);
2807 dev
->stats
.collisions
= readl(&mac_stats
->coll
);
2813 static void ace_copy(struct ace_regs __iomem
*regs
, const __be32
*src
,
2816 void __iomem
*tdest
;
2823 tsize
= min_t(u32
, ((~dest
& (ACE_WINDOW_SIZE
- 1)) + 1),
2824 min_t(u32
, size
, ACE_WINDOW_SIZE
));
2825 tdest
= (void __iomem
*) ®s
->Window
+
2826 (dest
& (ACE_WINDOW_SIZE
- 1));
2827 writel(dest
& ~(ACE_WINDOW_SIZE
- 1), ®s
->WinBase
);
2828 for (i
= 0; i
< (tsize
/ 4); i
++) {
2829 /* Firmware is big-endian */
2830 writel(be32_to_cpup(src
), tdest
);
2840 static void ace_clear(struct ace_regs __iomem
*regs
, u32 dest
, int size
)
2842 void __iomem
*tdest
;
2849 tsize
= min_t(u32
, ((~dest
& (ACE_WINDOW_SIZE
- 1)) + 1),
2850 min_t(u32
, size
, ACE_WINDOW_SIZE
));
2851 tdest
= (void __iomem
*) ®s
->Window
+
2852 (dest
& (ACE_WINDOW_SIZE
- 1));
2853 writel(dest
& ~(ACE_WINDOW_SIZE
- 1), ®s
->WinBase
);
2855 for (i
= 0; i
< (tsize
/ 4); i
++) {
2856 writel(0, tdest
+ i
*4);
2866 * Download the firmware into the SRAM on the NIC
2868 * This operation requires the NIC to be halted and is performed with
2869 * interrupts disabled and with the spinlock hold.
2871 static int ace_load_firmware(struct net_device
*dev
)
2873 const struct firmware
*fw
;
2874 const char *fw_name
= "acenic/tg2.bin";
2875 struct ace_private
*ap
= netdev_priv(dev
);
2876 struct ace_regs __iomem
*regs
= ap
->regs
;
2877 const __be32
*fw_data
;
2881 if (!(readl(®s
->CpuCtrl
) & CPU_HALTED
)) {
2882 printk(KERN_ERR
"%s: trying to download firmware while the "
2883 "CPU is running!\n", ap
->name
);
2887 if (ACE_IS_TIGON_I(ap
))
2888 fw_name
= "acenic/tg1.bin";
2890 ret
= request_firmware(&fw
, fw_name
, &ap
->pdev
->dev
);
2892 printk(KERN_ERR
"%s: Failed to load firmware \"%s\"\n",
2897 fw_data
= (void *)fw
->data
;
2899 /* Firmware blob starts with version numbers, followed by
2900 load and start address. Remainder is the blob to be loaded
2901 contiguously from load address. We don't bother to represent
2902 the BSS/SBSS sections any more, since we were clearing the
2903 whole thing anyway. */
2904 ap
->firmware_major
= fw
->data
[0];
2905 ap
->firmware_minor
= fw
->data
[1];
2906 ap
->firmware_fix
= fw
->data
[2];
2908 ap
->firmware_start
= be32_to_cpu(fw_data
[1]);
2909 if (ap
->firmware_start
< 0x4000 || ap
->firmware_start
>= 0x80000) {
2910 printk(KERN_ERR
"%s: bogus load address %08x in \"%s\"\n",
2911 ap
->name
, ap
->firmware_start
, fw_name
);
2916 load_addr
= be32_to_cpu(fw_data
[2]);
2917 if (load_addr
< 0x4000 || load_addr
>= 0x80000) {
2918 printk(KERN_ERR
"%s: bogus load address %08x in \"%s\"\n",
2919 ap
->name
, load_addr
, fw_name
);
2925 * Do not try to clear more than 512KiB or we end up seeing
2926 * funny things on NICs with only 512KiB SRAM
2928 ace_clear(regs
, 0x2000, 0x80000-0x2000);
2929 ace_copy(regs
, &fw_data
[3], load_addr
, fw
->size
-12);
2931 release_firmware(fw
);
2937 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
2939 * Accessing the EEPROM is `interesting' to say the least - don't read
2940 * this code right after dinner.
2942 * This is all about black magic and bit-banging the device .... I
2943 * wonder in what hospital they have put the guy who designed the i2c
2946 * Oh yes, this is only the beginning!
2948 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
2949 * code i2c readout code by beta testing all my hacks.
2951 static void eeprom_start(struct ace_regs __iomem
*regs
)
2955 readl(®s
->LocalCtrl
);
2956 udelay(ACE_SHORT_DELAY
);
2957 local
= readl(®s
->LocalCtrl
);
2958 local
|= EEPROM_DATA_OUT
| EEPROM_WRITE_ENABLE
;
2959 writel(local
, ®s
->LocalCtrl
);
2960 readl(®s
->LocalCtrl
);
2962 udelay(ACE_SHORT_DELAY
);
2963 local
|= EEPROM_CLK_OUT
;
2964 writel(local
, ®s
->LocalCtrl
);
2965 readl(®s
->LocalCtrl
);
2967 udelay(ACE_SHORT_DELAY
);
2968 local
&= ~EEPROM_DATA_OUT
;
2969 writel(local
, ®s
->LocalCtrl
);
2970 readl(®s
->LocalCtrl
);
2972 udelay(ACE_SHORT_DELAY
);
2973 local
&= ~EEPROM_CLK_OUT
;
2974 writel(local
, ®s
->LocalCtrl
);
2975 readl(®s
->LocalCtrl
);
2980 static void eeprom_prep(struct ace_regs __iomem
*regs
, u8 magic
)
2985 udelay(ACE_SHORT_DELAY
);
2986 local
= readl(®s
->LocalCtrl
);
2987 local
&= ~EEPROM_DATA_OUT
;
2988 local
|= EEPROM_WRITE_ENABLE
;
2989 writel(local
, ®s
->LocalCtrl
);
2990 readl(®s
->LocalCtrl
);
2993 for (i
= 0; i
< 8; i
++, magic
<<= 1) {
2994 udelay(ACE_SHORT_DELAY
);
2996 local
|= EEPROM_DATA_OUT
;
2998 local
&= ~EEPROM_DATA_OUT
;
2999 writel(local
, ®s
->LocalCtrl
);
3000 readl(®s
->LocalCtrl
);
3003 udelay(ACE_SHORT_DELAY
);
3004 local
|= EEPROM_CLK_OUT
;
3005 writel(local
, ®s
->LocalCtrl
);
3006 readl(®s
->LocalCtrl
);
3008 udelay(ACE_SHORT_DELAY
);
3009 local
&= ~(EEPROM_CLK_OUT
| EEPROM_DATA_OUT
);
3010 writel(local
, ®s
->LocalCtrl
);
3011 readl(®s
->LocalCtrl
);
3017 static int eeprom_check_ack(struct ace_regs __iomem
*regs
)
3022 local
= readl(®s
->LocalCtrl
);
3023 local
&= ~EEPROM_WRITE_ENABLE
;
3024 writel(local
, ®s
->LocalCtrl
);
3025 readl(®s
->LocalCtrl
);
3027 udelay(ACE_LONG_DELAY
);
3028 local
|= EEPROM_CLK_OUT
;
3029 writel(local
, ®s
->LocalCtrl
);
3030 readl(®s
->LocalCtrl
);
3032 udelay(ACE_SHORT_DELAY
);
3033 /* sample data in middle of high clk */
3034 state
= (readl(®s
->LocalCtrl
) & EEPROM_DATA_IN
) != 0;
3035 udelay(ACE_SHORT_DELAY
);
3037 writel(readl(®s
->LocalCtrl
) & ~EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3038 readl(®s
->LocalCtrl
);
3045 static void eeprom_stop(struct ace_regs __iomem
*regs
)
3049 udelay(ACE_SHORT_DELAY
);
3050 local
= readl(®s
->LocalCtrl
);
3051 local
|= EEPROM_WRITE_ENABLE
;
3052 writel(local
, ®s
->LocalCtrl
);
3053 readl(®s
->LocalCtrl
);
3055 udelay(ACE_SHORT_DELAY
);
3056 local
&= ~EEPROM_DATA_OUT
;
3057 writel(local
, ®s
->LocalCtrl
);
3058 readl(®s
->LocalCtrl
);
3060 udelay(ACE_SHORT_DELAY
);
3061 local
|= EEPROM_CLK_OUT
;
3062 writel(local
, ®s
->LocalCtrl
);
3063 readl(®s
->LocalCtrl
);
3065 udelay(ACE_SHORT_DELAY
);
3066 local
|= EEPROM_DATA_OUT
;
3067 writel(local
, ®s
->LocalCtrl
);
3068 readl(®s
->LocalCtrl
);
3070 udelay(ACE_LONG_DELAY
);
3071 local
&= ~EEPROM_CLK_OUT
;
3072 writel(local
, ®s
->LocalCtrl
);
3078 * Read a whole byte from the EEPROM.
3080 static int read_eeprom_byte(struct net_device
*dev
, unsigned long offset
)
3082 struct ace_private
*ap
= netdev_priv(dev
);
3083 struct ace_regs __iomem
*regs
= ap
->regs
;
3084 unsigned long flags
;
3090 * Don't take interrupts on this CPU will bit banging
3091 * the %#%#@$ I2C device
3093 local_irq_save(flags
);
3097 eeprom_prep(regs
, EEPROM_WRITE_SELECT
);
3098 if (eeprom_check_ack(regs
)) {
3099 local_irq_restore(flags
);
3100 printk(KERN_ERR
"%s: Unable to sync eeprom\n", ap
->name
);
3102 goto eeprom_read_error
;
3105 eeprom_prep(regs
, (offset
>> 8) & 0xff);
3106 if (eeprom_check_ack(regs
)) {
3107 local_irq_restore(flags
);
3108 printk(KERN_ERR
"%s: Unable to set address byte 0\n",
3111 goto eeprom_read_error
;
3114 eeprom_prep(regs
, offset
& 0xff);
3115 if (eeprom_check_ack(regs
)) {
3116 local_irq_restore(flags
);
3117 printk(KERN_ERR
"%s: Unable to set address byte 1\n",
3120 goto eeprom_read_error
;
3124 eeprom_prep(regs
, EEPROM_READ_SELECT
);
3125 if (eeprom_check_ack(regs
)) {
3126 local_irq_restore(flags
);
3127 printk(KERN_ERR
"%s: Unable to set READ_SELECT\n",
3130 goto eeprom_read_error
;
3133 for (i
= 0; i
< 8; i
++) {
3134 local
= readl(®s
->LocalCtrl
);
3135 local
&= ~EEPROM_WRITE_ENABLE
;
3136 writel(local
, ®s
->LocalCtrl
);
3137 readl(®s
->LocalCtrl
);
3138 udelay(ACE_LONG_DELAY
);
3140 local
|= EEPROM_CLK_OUT
;
3141 writel(local
, ®s
->LocalCtrl
);
3142 readl(®s
->LocalCtrl
);
3144 udelay(ACE_SHORT_DELAY
);
3145 /* sample data mid high clk */
3146 result
= (result
<< 1) |
3147 ((readl(®s
->LocalCtrl
) & EEPROM_DATA_IN
) != 0);
3148 udelay(ACE_SHORT_DELAY
);
3150 local
= readl(®s
->LocalCtrl
);
3151 local
&= ~EEPROM_CLK_OUT
;
3152 writel(local
, ®s
->LocalCtrl
);
3153 readl(®s
->LocalCtrl
);
3154 udelay(ACE_SHORT_DELAY
);
3157 local
|= EEPROM_WRITE_ENABLE
;
3158 writel(local
, ®s
->LocalCtrl
);
3159 readl(®s
->LocalCtrl
);
3161 udelay(ACE_SHORT_DELAY
);
3165 local
|= EEPROM_DATA_OUT
;
3166 writel(local
, ®s
->LocalCtrl
);
3167 readl(®s
->LocalCtrl
);
3169 udelay(ACE_SHORT_DELAY
);
3170 writel(readl(®s
->LocalCtrl
) | EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3171 readl(®s
->LocalCtrl
);
3172 udelay(ACE_LONG_DELAY
);
3173 writel(readl(®s
->LocalCtrl
) & ~EEPROM_CLK_OUT
, ®s
->LocalCtrl
);
3174 readl(®s
->LocalCtrl
);
3176 udelay(ACE_SHORT_DELAY
);
3179 local_irq_restore(flags
);
3184 printk(KERN_ERR
"%s: Unable to read eeprom byte 0x%02lx\n",
3189 module_pci_driver(acenic_pci_driver
);