drivers/net/ethernet/hisilicon/hns/hns_dsaf_ppe.h

   1 /*
   2  * Copyright (c) 2014-2015 Hisilicon Limited.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #ifndef _HNS_DSAF_PPE_H
  11 #define _HNS_DSAF_PPE_H
  12
  13 #include <linux/platform_device.h>
  14
  15 #include "hns_dsaf_main.h"
  16 #include "hns_dsaf_mac.h"
  17 #include "hns_dsaf_rcb.h"
  18
  19 #define HNS_PPE_SERVICE_NW_ENGINE_NUM DSAF_COMM_CHN
  20 #define HNS_PPE_DEBUG_NW_ENGINE_NUM 1
  21 #define HNS_PPE_COM_NUM DSAF_COMM_DEV_NUM
  22
  23 #define PPE_COMMON_REG_OFFSET 0x70000
  24 #define PPE_REG_OFFSET 0x10000
  25
  26 #define ETH_PPE_DUMP_NUM 576
  27 #define ETH_PPE_STATIC_NUM 12
  28
  29 #define HNS_PPEV2_RSS_IND_TBL_SIZE 256
  30 #define HNS_PPEV2_RSS_KEY_SIZE 40 /* in bytes or 320 bits */
  31 #define HNS_PPEV2_RSS_KEY_NUM (HNS_PPEV2_RSS_KEY_SIZE / sizeof(u32))
  32
  33 #define HNS_PPEV2_MAX_FRAME_LEN 0X980
  34
  35 enum ppe_qid_mode {
  36         PPE_QID_MODE0 = 0, /* fixed queue id mode */
  37         PPE_QID_MODE1,     /* switch:128VM non switch:6Port/4VM/4TC */
  38         PPE_QID_MODE2,     /* switch:32VM/4TC non switch:6Port/16VM */
  39         PPE_QID_MODE3,     /* switch:4TC/8RSS non switch:2Port/64VM */
  40         PPE_QID_MODE4,     /* switch:8VM/16RSS non switch:2Port/16VM/4TC */
  41         PPE_QID_MODE5,     /* switch:16VM/8TC non switch:6Port/16RSS */
  42         PPE_QID_MODE6,     /* switch:32VM/4RSS non switch:6Port/2VM/8TC */
  43         PPE_QID_MODE7,     /* switch:32RSS non switch:2Port/8VM/8TC */
  44         PPE_QID_MODE8,     /* switch:6VM/4TC/4RSS non switch:2Port/16VM/4RSS */
  45         PPE_QID_MODE9,     /* non switch:2Port/32VM/2RSS */
  46         PPE_QID_MODE10,    /* non switch:2Port/32RSS */
  47         PPE_QID_MODE11,    /* non switch:2Port/4TC/16RSS */
  48 };
  49
  50 enum ppe_port_mode {
  51         PPE_MODE_GE = 0,
  52         PPE_MODE_XGE,
  53 };
  54
  55 enum ppe_common_mode {
  56         PPE_COMMON_MODE_DEBUG = 0,
  57         PPE_COMMON_MODE_SERVICE,
  58         PPE_COMMON_MODE_MAX
  59 };
  60
  61 struct hns_ppe_hw_stats {
  62         u64 rx_pkts_from_sw;
  63         u64 rx_pkts;
  64         u64 rx_drop_no_bd;
  65         u64 rx_alloc_buf_fail;
  66         u64 rx_alloc_buf_wait;
  67         u64 rx_drop_no_buf;
  68         u64 rx_err_fifo_full;
  69         u64 tx_bd_form_rcb;
  70         u64 tx_pkts_from_rcb;
  71         u64 tx_pkts;
  72         u64 tx_err_fifo_empty;
  73         u64 tx_err_checksum;
  74 };
  75
  76 struct hns_ppe_cb {
  77         struct device *dev;
  78         struct hns_ppe_cb *next;        /* pointer to next ppe device */
  79         struct ppe_common_cb *ppe_common_cb; /* belong to */
  80         struct hns_ppe_hw_stats hw_stats;
  81
  82         u8 index;       /* index in a ppe common device */
  83         void __iomem *io_base;
  84         int virq;
  85         u32 rss_indir_table[HNS_PPEV2_RSS_IND_TBL_SIZE]; /*shadow indir tab */
  86         u32 rss_key[HNS_PPEV2_RSS_KEY_NUM]; /* rss hash key */
  87 };
  88
  89 struct ppe_common_cb {
  90         struct device *dev;
  91         struct dsaf_device *dsaf_dev;
  92         void __iomem *io_base;
  93
  94         enum ppe_common_mode ppe_mode;
  95
  96         u8 comm_index;   /*ppe_common index*/
  97
  98         u32 ppe_num;
  99         struct hns_ppe_cb ppe_cb[0];
 100
 101 };
 102
 103 int hns_ppe_init(struct dsaf_device *dsaf_dev);
 104
 105 void hns_ppe_uninit(struct dsaf_device *dsaf_dev);
 106
 107 void hns_ppe_reset_common(struct dsaf_device *dsaf_dev, u8 ppe_common_index);
 108
 109 void hns_ppe_update_stats(struct hns_ppe_cb *ppe_cb);
 110
 111 int hns_ppe_get_sset_count(int stringset);
 112 int hns_ppe_get_regs_count(void);
 113 void hns_ppe_get_regs(struct hns_ppe_cb *ppe_cb, void *data);
 114
 115 void hns_ppe_get_strings(struct hns_ppe_cb *ppe_cb, int stringset, u8 *data);
 116 void hns_ppe_get_stats(struct hns_ppe_cb *ppe_cb, u64 *data);
 117 void hns_ppe_set_tso_enable(struct hns_ppe_cb *ppe_cb, u32 value);
 118 void hns_ppe_set_rss_key(struct hns_ppe_cb *ppe_cb,
 119                          const u32 rss_key[HNS_PPEV2_RSS_KEY_NUM]);
 120 void hns_ppe_set_indir_table(struct hns_ppe_cb *ppe_cb,
 121                              const u32 rss_tab[HNS_PPEV2_RSS_IND_TBL_SIZE]);
 122 #endif /* _HNS_DSAF_PPE_H */