2 * Copyright (c) 2014-2015 Hisilicon Limited.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include <linux/io-64-nonatomic-hi-lo.h>
11 #include <linux/of_mdio.h>
12 #include "hns_dsaf_main.h"
13 #include "hns_dsaf_mac.h"
14 #include "hns_dsaf_xgmac.h"
15 #include "hns_dsaf_reg.h"
17 static const struct mac_stats_string g_xgmac_stats_string
[] = {
18 {"xgmac_tx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(tx_fragment_err
)},
19 {"xgmac_tx_good_pkts_minto64", MAC_STATS_FIELD_OFF(tx_undersize
)},
20 {"xgmac_tx_total_pkts_minto64", MAC_STATS_FIELD_OFF(tx_under_min_pkts
)},
21 {"xgmac_tx_pkts_64", MAC_STATS_FIELD_OFF(tx_64bytes
)},
22 {"xgmac_tx_pkts_65to127", MAC_STATS_FIELD_OFF(tx_65to127
)},
23 {"xgmac_tx_pkts_128to255", MAC_STATS_FIELD_OFF(tx_128to255
)},
24 {"xgmac_tx_pkts_256to511", MAC_STATS_FIELD_OFF(tx_256to511
)},
25 {"xgmac_tx_pkts_512to1023", MAC_STATS_FIELD_OFF(tx_512to1023
)},
26 {"xgmac_tx_pkts_1024to1518", MAC_STATS_FIELD_OFF(tx_1024to1518
)},
27 {"xgmac_tx_pkts_1519tomax", MAC_STATS_FIELD_OFF(tx_1519tomax
)},
28 {"xgmac_tx_good_pkts_1519tomax",
29 MAC_STATS_FIELD_OFF(tx_1519tomax_good
)},
30 {"xgmac_tx_good_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_oversize
)},
31 {"xgmac_tx_bad_pkts_untralmax", MAC_STATS_FIELD_OFF(tx_jabber_err
)},
32 {"xgmac_tx_good_pkts_all", MAC_STATS_FIELD_OFF(tx_good_pkts
)},
33 {"xgmac_tx_good_byte_all", MAC_STATS_FIELD_OFF(tx_good_bytes
)},
34 {"xgmac_tx_total_pkt", MAC_STATS_FIELD_OFF(tx_total_pkts
)},
35 {"xgmac_tx_total_byt", MAC_STATS_FIELD_OFF(tx_total_bytes
)},
36 {"xgmac_tx_uc_pkt", MAC_STATS_FIELD_OFF(tx_uc_pkts
)},
37 {"xgmac_tx_mc_pkt", MAC_STATS_FIELD_OFF(tx_mc_pkts
)},
38 {"xgmac_tx_bc_pkt", MAC_STATS_FIELD_OFF(tx_bc_pkts
)},
39 {"xgmac_tx_pause_frame_num", MAC_STATS_FIELD_OFF(tx_pfc_tc0
)},
40 {"xgmac_tx_pfc_per_1pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc1
)},
41 {"xgmac_tx_pfc_per_2pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc2
)},
42 {"xgmac_tx_pfc_per_3pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc3
)},
43 {"xgmac_tx_pfc_per_4pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc4
)},
44 {"xgmac_tx_pfc_per_5pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc5
)},
45 {"xgmac_tx_pfc_per_6pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc6
)},
46 {"xgmac_tx_pfc_per_7pause_framer", MAC_STATS_FIELD_OFF(tx_pfc_tc7
)},
47 {"xgmac_tx_mac_ctrol_frame", MAC_STATS_FIELD_OFF(tx_ctrl
)},
48 {"xgmac_tx_1731_pkts", MAC_STATS_FIELD_OFF(tx_1731_pkts
)},
49 {"xgmac_tx_1588_pkts", MAC_STATS_FIELD_OFF(tx_1588_pkts
)},
50 {"xgmac_rx_good_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_good_from_sw
)},
51 {"xgmac_rx_bad_pkt_from_dsaf", MAC_STATS_FIELD_OFF(rx_bad_from_sw
)},
52 {"xgmac_tx_bad_pkt_64tomax", MAC_STATS_FIELD_OFF(tx_bad_pkts
)},
54 {"xgmac_rx_bad_pkts_minto64", MAC_STATS_FIELD_OFF(rx_fragment_err
)},
55 {"xgmac_rx_good_pkts_minto64", MAC_STATS_FIELD_OFF(rx_undersize
)},
56 {"xgmac_rx_total_pkts_minto64", MAC_STATS_FIELD_OFF(rx_under_min
)},
57 {"xgmac_rx_pkt_64", MAC_STATS_FIELD_OFF(rx_64bytes
)},
58 {"xgmac_rx_pkt_65to127", MAC_STATS_FIELD_OFF(rx_65to127
)},
59 {"xgmac_rx_pkt_128to255", MAC_STATS_FIELD_OFF(rx_128to255
)},
60 {"xgmac_rx_pkt_256to511", MAC_STATS_FIELD_OFF(rx_256to511
)},
61 {"xgmac_rx_pkt_512to1023", MAC_STATS_FIELD_OFF(rx_512to1023
)},
62 {"xgmac_rx_pkt_1024to1518", MAC_STATS_FIELD_OFF(rx_1024to1518
)},
63 {"xgmac_rx_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax
)},
64 {"xgmac_rx_good_pkt_1519tomax", MAC_STATS_FIELD_OFF(rx_1519tomax_good
)},
65 {"xgmac_rx_good_pkt_untramax", MAC_STATS_FIELD_OFF(rx_oversize
)},
66 {"xgmac_rx_bad_pkt_untramax", MAC_STATS_FIELD_OFF(rx_jabber_err
)},
67 {"xgmac_rx_good_pkt", MAC_STATS_FIELD_OFF(rx_good_pkts
)},
68 {"xgmac_rx_good_byt", MAC_STATS_FIELD_OFF(rx_good_bytes
)},
69 {"xgmac_rx_pkt", MAC_STATS_FIELD_OFF(rx_total_pkts
)},
70 {"xgmac_rx_byt", MAC_STATS_FIELD_OFF(rx_total_bytes
)},
71 {"xgmac_rx_uc_pkt", MAC_STATS_FIELD_OFF(rx_uc_pkts
)},
72 {"xgmac_rx_mc_pkt", MAC_STATS_FIELD_OFF(rx_mc_pkts
)},
73 {"xgmac_rx_bc_pkt", MAC_STATS_FIELD_OFF(rx_bc_pkts
)},
74 {"xgmac_rx_pause_frame_num", MAC_STATS_FIELD_OFF(rx_pfc_tc0
)},
75 {"xgmac_rx_pfc_per_1pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc1
)},
76 {"xgmac_rx_pfc_per_2pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc2
)},
77 {"xgmac_rx_pfc_per_3pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc3
)},
78 {"xgmac_rx_pfc_per_4pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc4
)},
79 {"xgmac_rx_pfc_per_5pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc5
)},
80 {"xgmac_rx_pfc_per_6pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc6
)},
81 {"xgmac_rx_pfc_per_7pause_frame", MAC_STATS_FIELD_OFF(rx_pfc_tc7
)},
82 {"xgmac_rx_mac_control", MAC_STATS_FIELD_OFF(rx_unknown_ctrl
)},
83 {"xgmac_tx_good_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_good_to_sw
)},
84 {"xgmac_tx_bad_pkt_todsaf", MAC_STATS_FIELD_OFF(tx_bad_to_sw
)},
85 {"xgmac_rx_1731_pkt", MAC_STATS_FIELD_OFF(rx_1731_pkts
)},
86 {"xgmac_rx_symbol_err_pkt", MAC_STATS_FIELD_OFF(rx_symbol_err
)},
87 {"xgmac_rx_fcs_pkt", MAC_STATS_FIELD_OFF(rx_fcs_err
)}
91 *hns_xgmac_tx_enable - xgmac port tx enable
93 *@value: value of enable
95 static void hns_xgmac_tx_enable(struct mac_driver
*drv
, u32 value
)
97 dsaf_set_dev_bit(drv
, XGMAC_MAC_ENABLE_REG
, XGMAC_ENABLE_TX_B
, !!value
);
101 *hns_xgmac_rx_enable - xgmac port rx enable
103 *@value: value of enable
105 static void hns_xgmac_rx_enable(struct mac_driver
*drv
, u32 value
)
107 dsaf_set_dev_bit(drv
, XGMAC_MAC_ENABLE_REG
, XGMAC_ENABLE_RX_B
, !!value
);
111 *hns_xgmac_enable - enable xgmac port
113 *@mode: mode of mac port
115 static void hns_xgmac_enable(void *mac_drv
, enum mac_commom_mode mode
)
117 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
118 struct dsaf_device
*dsaf_dev
119 = (struct dsaf_device
*)dev_get_drvdata(drv
->dev
);
120 u32 port
= drv
->mac_id
;
122 dsaf_dev
->misc_op
->xge_core_srst(dsaf_dev
, port
, 1);
125 /*enable XGE rX/tX */
126 if (mode
== MAC_COMM_MODE_TX
) {
127 hns_xgmac_tx_enable(drv
, 1);
128 } else if (mode
== MAC_COMM_MODE_RX
) {
129 hns_xgmac_rx_enable(drv
, 1);
130 } else if (mode
== MAC_COMM_MODE_RX_AND_TX
) {
131 hns_xgmac_tx_enable(drv
, 1);
132 hns_xgmac_rx_enable(drv
, 1);
134 dev_err(drv
->dev
, "error mac mode:%d\n", mode
);
139 *hns_xgmac_disable - disable xgmac port
140 *@mac_drv: mac driver
141 *@mode: mode of mac port
143 static void hns_xgmac_disable(void *mac_drv
, enum mac_commom_mode mode
)
145 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
146 struct dsaf_device
*dsaf_dev
147 = (struct dsaf_device
*)dev_get_drvdata(drv
->dev
);
148 u32 port
= drv
->mac_id
;
150 if (mode
== MAC_COMM_MODE_TX
) {
151 hns_xgmac_tx_enable(drv
, 0);
152 } else if (mode
== MAC_COMM_MODE_RX
) {
153 hns_xgmac_rx_enable(drv
, 0);
154 } else if (mode
== MAC_COMM_MODE_RX_AND_TX
) {
155 hns_xgmac_tx_enable(drv
, 0);
156 hns_xgmac_rx_enable(drv
, 0);
160 dsaf_dev
->misc_op
->xge_core_srst(dsaf_dev
, port
, 0);
164 *hns_xgmac_pma_fec_enable - xgmac PMA FEC enable
170 static void hns_xgmac_pma_fec_enable(struct mac_driver
*drv
, u32 tx_value
,
173 u32 origin
= dsaf_read_dev(drv
, XGMAC_PMA_FEC_CONTROL_REG
);
175 dsaf_set_bit(origin
, XGMAC_PMA_FEC_CTL_TX_B
, !!tx_value
);
176 dsaf_set_bit(origin
, XGMAC_PMA_FEC_CTL_RX_B
, !!rx_value
);
177 dsaf_write_dev(drv
, XGMAC_PMA_FEC_CONTROL_REG
, origin
);
180 /* clr exc irq for xge*/
181 static void hns_xgmac_exc_irq_en(struct mac_driver
*drv
, u32 en
)
183 u32 clr_vlue
= 0xfffffffful
;
184 u32 msk_vlue
= en
? 0xfffffffful
: 0; /*1 is en, 0 is dis*/
186 dsaf_write_dev(drv
, XGMAC_INT_STATUS_REG
, clr_vlue
);
187 dsaf_write_dev(drv
, XGMAC_INT_ENABLE_REG
, msk_vlue
);
191 *hns_xgmac_init - initialize XGE
192 *@mac_drv: mac driver
194 static void hns_xgmac_init(void *mac_drv
)
196 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
197 struct dsaf_device
*dsaf_dev
198 = (struct dsaf_device
*)dev_get_drvdata(drv
->dev
);
199 u32 port
= drv
->mac_id
;
201 dsaf_dev
->misc_op
->xge_srst(dsaf_dev
, port
, 0);
203 dsaf_dev
->misc_op
->xge_srst(dsaf_dev
, port
, 1);
206 hns_xgmac_exc_irq_en(drv
, 0);
208 hns_xgmac_pma_fec_enable(drv
, 0x0, 0x0);
210 hns_xgmac_disable(mac_drv
, MAC_COMM_MODE_RX_AND_TX
);
214 *hns_xgmac_config_pad_and_crc - set xgmac pad and crc enable the same time
215 *@mac_drv: mac driver
216 *@newval:enable of pad and crc
218 static void hns_xgmac_config_pad_and_crc(void *mac_drv
, u8 newval
)
220 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
221 u32 origin
= dsaf_read_dev(drv
, XGMAC_MAC_CONTROL_REG
);
223 dsaf_set_bit(origin
, XGMAC_CTL_TX_PAD_B
, !!newval
);
224 dsaf_set_bit(origin
, XGMAC_CTL_TX_FCS_B
, !!newval
);
225 dsaf_set_bit(origin
, XGMAC_CTL_RX_FCS_B
, !!newval
);
226 dsaf_write_dev(drv
, XGMAC_MAC_CONTROL_REG
, origin
);
230 *hns_xgmac_pausefrm_cfg - set pause param about xgmac
231 *@mac_drv: mac driver
232 *@newval:enable of pad and crc
234 static void hns_xgmac_pausefrm_cfg(void *mac_drv
, u32 rx_en
, u32 tx_en
)
236 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
237 u32 origin
= dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_CTRL_REG
);
239 dsaf_set_bit(origin
, XGMAC_PAUSE_CTL_TX_B
, !!tx_en
);
240 dsaf_set_bit(origin
, XGMAC_PAUSE_CTL_RX_B
, !!rx_en
);
241 dsaf_write_dev(drv
, XGMAC_MAC_PAUSE_CTRL_REG
, origin
);
244 static void hns_xgmac_set_pausefrm_mac_addr(void *mac_drv
, char *mac_addr
)
246 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
248 u32 high_val
= mac_addr
[1] | (mac_addr
[0] << 8);
249 u32 low_val
= mac_addr
[5] | (mac_addr
[4] << 8)
250 | (mac_addr
[3] << 16) | (mac_addr
[2] << 24);
251 dsaf_write_dev(drv
, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG
, low_val
);
252 dsaf_write_dev(drv
, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG
, high_val
);
256 *hns_xgmac_set_rx_ignore_pause_frames - set rx pause param about xgmac
257 *@mac_drv: mac driver
258 *@enable:enable rx pause param
260 static void hns_xgmac_set_rx_ignore_pause_frames(void *mac_drv
, u32 enable
)
262 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
264 dsaf_set_dev_bit(drv
, XGMAC_MAC_PAUSE_CTRL_REG
,
265 XGMAC_PAUSE_CTL_RX_B
, !!enable
);
269 *hns_xgmac_set_tx_auto_pause_frames - set tx pause param about xgmac
270 *@mac_drv: mac driver
271 *@enable:enable tx pause param
273 static void hns_xgmac_set_tx_auto_pause_frames(void *mac_drv
, u16 enable
)
275 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
277 dsaf_set_dev_bit(drv
, XGMAC_MAC_PAUSE_CTRL_REG
,
278 XGMAC_PAUSE_CTL_TX_B
, !!enable
);
280 /*if enable is not zero ,set tx pause time */
282 dsaf_write_dev(drv
, XGMAC_MAC_PAUSE_TIME_REG
, enable
);
286 *hns_xgmac_get_id - get xgmac port id
287 *@mac_drv: mac driver
288 *@newval:xgmac max frame length
290 static void hns_xgmac_get_id(void *mac_drv
, u8
*mac_id
)
292 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
294 *mac_id
= drv
->mac_id
;
298 *hns_xgmac_config_max_frame_length - set xgmac max frame length
299 *@mac_drv: mac driver
300 *@newval:xgmac max frame length
302 static void hns_xgmac_config_max_frame_length(void *mac_drv
, u16 newval
)
304 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
306 dsaf_write_dev(drv
, XGMAC_MAC_MAX_PKT_SIZE_REG
, newval
);
309 void hns_xgmac_update_stats(void *mac_drv
)
311 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
312 struct mac_hw_stats
*hw_stats
= &drv
->mac_cb
->hw_stats
;
315 hw_stats
->tx_fragment_err
316 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_FRAGMENT
);
317 hw_stats
->tx_undersize
318 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_UNDERSIZE
);
319 hw_stats
->tx_under_min_pkts
320 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_UNDERMIN
);
321 hw_stats
->tx_64bytes
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_64OCTETS
);
323 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_65TO127OCTETS
);
324 hw_stats
->tx_128to255
325 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_128TO255OCTETS
);
326 hw_stats
->tx_256to511
327 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_256TO511OCTETS
);
328 hw_stats
->tx_512to1023
329 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_512TO1023OCTETS
);
330 hw_stats
->tx_1024to1518
331 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_1024TO1518OCTETS
);
332 hw_stats
->tx_1519tomax
333 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_1519TOMAXOCTETS
);
334 hw_stats
->tx_1519tomax_good
335 = hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_1519TOMAXOCTETSOK
);
336 hw_stats
->tx_oversize
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_OVERSIZE
);
337 hw_stats
->tx_jabber_err
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_JABBER
);
338 hw_stats
->tx_good_pkts
= hns_mac_reg_read64(drv
, XGMAC_TX_GOODPKTS
);
339 hw_stats
->tx_good_bytes
= hns_mac_reg_read64(drv
, XGMAC_TX_GOODOCTETS
);
340 hw_stats
->tx_total_pkts
= hns_mac_reg_read64(drv
, XGMAC_TX_TOTAL_PKTS
);
341 hw_stats
->tx_total_bytes
342 = hns_mac_reg_read64(drv
, XGMAC_TX_TOTALOCTETS
);
343 hw_stats
->tx_uc_pkts
= hns_mac_reg_read64(drv
, XGMAC_TX_UNICASTPKTS
);
344 hw_stats
->tx_mc_pkts
= hns_mac_reg_read64(drv
, XGMAC_TX_MULTICASTPKTS
);
345 hw_stats
->tx_bc_pkts
= hns_mac_reg_read64(drv
, XGMAC_TX_BROADCASTPKTS
);
346 hw_stats
->tx_pfc_tc0
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI0PAUSEPKTS
);
347 hw_stats
->tx_pfc_tc1
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI1PAUSEPKTS
);
348 hw_stats
->tx_pfc_tc2
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI2PAUSEPKTS
);
349 hw_stats
->tx_pfc_tc3
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI3PAUSEPKTS
);
350 hw_stats
->tx_pfc_tc4
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI4PAUSEPKTS
);
351 hw_stats
->tx_pfc_tc5
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI5PAUSEPKTS
);
352 hw_stats
->tx_pfc_tc6
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI6PAUSEPKTS
);
353 hw_stats
->tx_pfc_tc7
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI7PAUSEPKTS
);
354 hw_stats
->tx_ctrl
= hns_mac_reg_read64(drv
, XGMAC_TX_MACCTRLPKTS
);
355 hw_stats
->tx_1731_pkts
= hns_mac_reg_read64(drv
, XGMAC_TX_1731PKTS
);
356 hw_stats
->tx_1588_pkts
= hns_mac_reg_read64(drv
, XGMAC_TX_1588PKTS
);
357 hw_stats
->rx_good_from_sw
358 = hns_mac_reg_read64(drv
, XGMAC_RX_FROMAPPGOODPKTS
);
359 hw_stats
->rx_bad_from_sw
360 = hns_mac_reg_read64(drv
, XGMAC_RX_FROMAPPBADPKTS
);
361 hw_stats
->tx_bad_pkts
= hns_mac_reg_read64(drv
, XGMAC_TX_ERRALLPKTS
);
364 hw_stats
->rx_fragment_err
365 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_FRAGMENT
);
366 hw_stats
->rx_undersize
367 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTSUNDERSIZE
);
368 hw_stats
->rx_under_min
369 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_UNDERMIN
);
370 hw_stats
->rx_64bytes
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_64OCTETS
);
372 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_65TO127OCTETS
);
373 hw_stats
->rx_128to255
374 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_128TO255OCTETS
);
375 hw_stats
->rx_256to511
376 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_256TO511OCTETS
);
377 hw_stats
->rx_512to1023
378 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_512TO1023OCTETS
);
379 hw_stats
->rx_1024to1518
380 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_1024TO1518OCTETS
);
381 hw_stats
->rx_1519tomax
382 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_1519TOMAXOCTETS
);
383 hw_stats
->rx_1519tomax_good
384 = hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_1519TOMAXOCTETSOK
);
385 hw_stats
->rx_oversize
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_OVERSIZE
);
386 hw_stats
->rx_jabber_err
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_JABBER
);
387 hw_stats
->rx_good_pkts
= hns_mac_reg_read64(drv
, XGMAC_RX_GOODPKTS
);
388 hw_stats
->rx_good_bytes
= hns_mac_reg_read64(drv
, XGMAC_RX_GOODOCTETS
);
389 hw_stats
->rx_total_pkts
= hns_mac_reg_read64(drv
, XGMAC_RX_TOTAL_PKTS
);
390 hw_stats
->rx_total_bytes
391 = hns_mac_reg_read64(drv
, XGMAC_RX_TOTALOCTETS
);
392 hw_stats
->rx_uc_pkts
= hns_mac_reg_read64(drv
, XGMAC_RX_UNICASTPKTS
);
393 hw_stats
->rx_mc_pkts
= hns_mac_reg_read64(drv
, XGMAC_RX_MULTICASTPKTS
);
394 hw_stats
->rx_bc_pkts
= hns_mac_reg_read64(drv
, XGMAC_RX_BROADCASTPKTS
);
395 hw_stats
->rx_pfc_tc0
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI0PAUSEPKTS
);
396 hw_stats
->rx_pfc_tc1
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI1PAUSEPKTS
);
397 hw_stats
->rx_pfc_tc2
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI2PAUSEPKTS
);
398 hw_stats
->rx_pfc_tc3
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI3PAUSEPKTS
);
399 hw_stats
->rx_pfc_tc4
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI4PAUSEPKTS
);
400 hw_stats
->rx_pfc_tc5
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI5PAUSEPKTS
);
401 hw_stats
->rx_pfc_tc6
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI6PAUSEPKTS
);
402 hw_stats
->rx_pfc_tc7
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI7PAUSEPKTS
);
404 hw_stats
->rx_unknown_ctrl
405 = hns_mac_reg_read64(drv
, XGMAC_RX_MACCTRLPKTS
);
406 hw_stats
->tx_good_to_sw
407 = hns_mac_reg_read64(drv
, XGMAC_TX_SENDAPPGOODPKTS
);
408 hw_stats
->tx_bad_to_sw
409 = hns_mac_reg_read64(drv
, XGMAC_TX_SENDAPPBADPKTS
);
410 hw_stats
->rx_1731_pkts
= hns_mac_reg_read64(drv
, XGMAC_RX_1731PKTS
);
411 hw_stats
->rx_symbol_err
412 = hns_mac_reg_read64(drv
, XGMAC_RX_SYMBOLERRPKTS
);
413 hw_stats
->rx_fcs_err
= hns_mac_reg_read64(drv
, XGMAC_RX_FCSERRPKTS
);
417 *hns_xgmac_free - free xgmac driver
418 *@mac_drv: mac driver
420 static void hns_xgmac_free(void *mac_drv
)
422 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
423 struct dsaf_device
*dsaf_dev
424 = (struct dsaf_device
*)dev_get_drvdata(drv
->dev
);
426 u32 mac_id
= drv
->mac_id
;
428 dsaf_dev
->misc_op
->xge_srst(dsaf_dev
, mac_id
, 0);
432 *hns_xgmac_get_info - get xgmac information
433 *@mac_drv: mac driver
434 *@mac_info:mac information
436 static void hns_xgmac_get_info(void *mac_drv
, struct mac_info
*mac_info
)
438 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
439 u32 pause_time
, pause_ctrl
, port_mode
, ctrl_val
;
441 ctrl_val
= dsaf_read_dev(drv
, XGMAC_MAC_CONTROL_REG
);
442 mac_info
->pad_and_crc_en
= dsaf_get_bit(ctrl_val
, XGMAC_CTL_TX_PAD_B
);
443 mac_info
->auto_neg
= 0;
445 pause_time
= dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_TIME_REG
);
446 mac_info
->tx_pause_time
= pause_time
;
448 port_mode
= dsaf_read_dev(drv
, XGMAC_PORT_MODE_REG
);
449 mac_info
->port_en
= dsaf_get_field(port_mode
, XGMAC_PORT_MODE_TX_M
,
450 XGMAC_PORT_MODE_TX_S
) &&
451 dsaf_get_field(port_mode
, XGMAC_PORT_MODE_RX_M
,
452 XGMAC_PORT_MODE_RX_S
);
453 mac_info
->duplex
= 1;
454 mac_info
->speed
= MAC_SPEED_10000
;
456 pause_ctrl
= dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_CTRL_REG
);
457 mac_info
->rx_pause_en
= dsaf_get_bit(pause_ctrl
, XGMAC_PAUSE_CTL_RX_B
);
458 mac_info
->tx_pause_en
= dsaf_get_bit(pause_ctrl
, XGMAC_PAUSE_CTL_TX_B
);
462 *hns_xgmac_get_pausefrm_cfg - get xgmac pause param
463 *@mac_drv: mac driver
464 *@rx_en:xgmac rx pause enable
465 *@tx_en:xgmac tx pause enable
467 static void hns_xgmac_get_pausefrm_cfg(void *mac_drv
, u32
*rx_en
, u32
*tx_en
)
469 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
472 pause_ctrl
= dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_CTRL_REG
);
473 *rx_en
= dsaf_get_bit(pause_ctrl
, XGMAC_PAUSE_CTL_RX_B
);
474 *tx_en
= dsaf_get_bit(pause_ctrl
, XGMAC_PAUSE_CTL_TX_B
);
478 *hns_xgmac_get_link_status - get xgmac link status
479 *@mac_drv: mac driver
480 *@link_stat: xgmac link stat
482 static void hns_xgmac_get_link_status(void *mac_drv
, u32
*link_stat
)
484 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
486 *link_stat
= dsaf_read_dev(drv
, XGMAC_LINK_STATUS_REG
);
490 *hns_xgmac_get_regs - dump xgmac regs
491 *@mac_drv: mac driver
493 *@data:data for value of regs
495 static void hns_xgmac_get_regs(void *mac_drv
, void *data
)
498 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
502 /* base config registers */
503 regs
[0] = dsaf_read_dev(drv
, XGMAC_INT_STATUS_REG
);
504 regs
[1] = dsaf_read_dev(drv
, XGMAC_INT_ENABLE_REG
);
505 regs
[2] = dsaf_read_dev(drv
, XGMAC_INT_SET_REG
);
506 regs
[3] = dsaf_read_dev(drv
, XGMAC_IERR_U_INFO_REG
);
507 regs
[4] = dsaf_read_dev(drv
, XGMAC_OVF_INFO_REG
);
508 regs
[5] = dsaf_read_dev(drv
, XGMAC_OVF_CNT_REG
);
509 regs
[6] = dsaf_read_dev(drv
, XGMAC_PORT_MODE_REG
);
510 regs
[7] = dsaf_read_dev(drv
, XGMAC_CLK_ENABLE_REG
);
511 regs
[8] = dsaf_read_dev(drv
, XGMAC_RESET_REG
);
512 regs
[9] = dsaf_read_dev(drv
, XGMAC_LINK_CONTROL_REG
);
513 regs
[10] = dsaf_read_dev(drv
, XGMAC_LINK_STATUS_REG
);
515 regs
[11] = dsaf_read_dev(drv
, XGMAC_SPARE_REG
);
516 regs
[12] = dsaf_read_dev(drv
, XGMAC_SPARE_CNT_REG
);
517 regs
[13] = dsaf_read_dev(drv
, XGMAC_MAC_ENABLE_REG
);
518 regs
[14] = dsaf_read_dev(drv
, XGMAC_MAC_CONTROL_REG
);
519 regs
[15] = dsaf_read_dev(drv
, XGMAC_MAC_IPG_REG
);
520 regs
[16] = dsaf_read_dev(drv
, XGMAC_MAC_MSG_CRC_EN_REG
);
521 regs
[17] = dsaf_read_dev(drv
, XGMAC_MAC_MSG_IMG_REG
);
522 regs
[18] = dsaf_read_dev(drv
, XGMAC_MAC_MSG_FC_CFG_REG
);
523 regs
[19] = dsaf_read_dev(drv
, XGMAC_MAC_MSG_TC_CFG_REG
);
524 regs
[20] = dsaf_read_dev(drv
, XGMAC_MAC_PAD_SIZE_REG
);
525 regs
[21] = dsaf_read_dev(drv
, XGMAC_MAC_MIN_PKT_SIZE_REG
);
526 regs
[22] = dsaf_read_dev(drv
, XGMAC_MAC_MAX_PKT_SIZE_REG
);
527 regs
[23] = dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_CTRL_REG
);
528 regs
[24] = dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_TIME_REG
);
529 regs
[25] = dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_GAP_REG
);
530 regs
[26] = dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_LOCAL_MAC_H_REG
);
531 regs
[27] = dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_LOCAL_MAC_L_REG
);
532 regs
[28] = dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_PEER_MAC_H_REG
);
533 regs
[29] = dsaf_read_dev(drv
, XGMAC_MAC_PAUSE_PEER_MAC_L_REG
);
534 regs
[30] = dsaf_read_dev(drv
, XGMAC_MAC_PFC_PRI_EN_REG
);
535 regs
[31] = dsaf_read_dev(drv
, XGMAC_MAC_1588_CTRL_REG
);
536 regs
[32] = dsaf_read_dev(drv
, XGMAC_MAC_1588_TX_PORT_DLY_REG
);
537 regs
[33] = dsaf_read_dev(drv
, XGMAC_MAC_1588_RX_PORT_DLY_REG
);
538 regs
[34] = dsaf_read_dev(drv
, XGMAC_MAC_1588_ASYM_DLY_REG
);
539 regs
[35] = dsaf_read_dev(drv
, XGMAC_MAC_1588_ADJUST_CFG_REG
);
541 regs
[36] = dsaf_read_dev(drv
, XGMAC_MAC_Y1731_ETH_TYPE_REG
);
542 regs
[37] = dsaf_read_dev(drv
, XGMAC_MAC_MIB_CONTROL_REG
);
543 regs
[38] = dsaf_read_dev(drv
, XGMAC_MAC_WAN_RATE_ADJUST_REG
);
544 regs
[39] = dsaf_read_dev(drv
, XGMAC_MAC_TX_ERR_MARK_REG
);
545 regs
[40] = dsaf_read_dev(drv
, XGMAC_MAC_TX_LF_RF_CONTROL_REG
);
546 regs
[41] = dsaf_read_dev(drv
, XGMAC_MAC_RX_LF_RF_STATUS_REG
);
547 regs
[42] = dsaf_read_dev(drv
, XGMAC_MAC_TX_RUNT_PKT_CNT_REG
);
548 regs
[43] = dsaf_read_dev(drv
, XGMAC_MAC_RX_RUNT_PKT_CNT_REG
);
549 regs
[44] = dsaf_read_dev(drv
, XGMAC_MAC_RX_PREAM_ERR_PKT_CNT_REG
);
550 regs
[45] = dsaf_read_dev(drv
, XGMAC_MAC_TX_LF_RF_TERM_PKT_CNT_REG
);
551 regs
[46] = dsaf_read_dev(drv
, XGMAC_MAC_TX_SN_MISMATCH_PKT_CNT_REG
);
552 regs
[47] = dsaf_read_dev(drv
, XGMAC_MAC_RX_ERR_MSG_CNT_REG
);
553 regs
[48] = dsaf_read_dev(drv
, XGMAC_MAC_RX_ERR_EFD_CNT_REG
);
554 regs
[49] = dsaf_read_dev(drv
, XGMAC_MAC_ERR_INFO_REG
);
555 regs
[50] = dsaf_read_dev(drv
, XGMAC_MAC_DBG_INFO_REG
);
557 regs
[51] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_SYNC_THD_REG
);
558 regs
[52] = dsaf_read_dev(drv
, XGMAC_PCS_STATUS1_REG
);
559 regs
[53] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_STATUS1_REG
);
560 regs
[54] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_STATUS2_REG
);
561 regs
[55] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_SEEDA_0_REG
);
562 regs
[56] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_SEEDA_1_REG
);
563 regs
[57] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_SEEDB_0_REG
);
564 regs
[58] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_SEEDB_1_REG
);
565 regs
[59] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_TEST_CONTROL_REG
);
566 regs
[60] = dsaf_read_dev(drv
, XGMAC_PCS_BASER_TEST_ERR_CNT_REG
);
567 regs
[61] = dsaf_read_dev(drv
, XGMAC_PCS_DBG_INFO_REG
);
568 regs
[62] = dsaf_read_dev(drv
, XGMAC_PCS_DBG_INFO1_REG
);
569 regs
[63] = dsaf_read_dev(drv
, XGMAC_PCS_DBG_INFO2_REG
);
570 regs
[64] = dsaf_read_dev(drv
, XGMAC_PCS_DBG_INFO3_REG
);
572 regs
[65] = dsaf_read_dev(drv
, XGMAC_PMA_ENABLE_REG
);
573 regs
[66] = dsaf_read_dev(drv
, XGMAC_PMA_CONTROL_REG
);
574 regs
[67] = dsaf_read_dev(drv
, XGMAC_PMA_SIGNAL_STATUS_REG
);
575 regs
[68] = dsaf_read_dev(drv
, XGMAC_PMA_DBG_INFO_REG
);
576 regs
[69] = dsaf_read_dev(drv
, XGMAC_PMA_FEC_ABILITY_REG
);
577 regs
[70] = dsaf_read_dev(drv
, XGMAC_PMA_FEC_CONTROL_REG
);
578 regs
[71] = dsaf_read_dev(drv
, XGMAC_PMA_FEC_CORR_BLOCK_CNT__REG
);
579 regs
[72] = dsaf_read_dev(drv
, XGMAC_PMA_FEC_UNCORR_BLOCK_CNT__REG
);
581 /* status registers */
582 #define hns_xgmac_cpy_q(p, q) \
585 *((p) + 1) = (u32)((q) >> 32);\
588 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_FRAGMENT
);
589 hns_xgmac_cpy_q(®s
[73], qtmp
);
590 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_UNDERSIZE
);
591 hns_xgmac_cpy_q(®s
[75], qtmp
);
592 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_UNDERMIN
);
593 hns_xgmac_cpy_q(®s
[77], qtmp
);
594 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_64OCTETS
);
595 hns_xgmac_cpy_q(®s
[79], qtmp
);
596 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_65TO127OCTETS
);
597 hns_xgmac_cpy_q(®s
[81], qtmp
);
598 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_128TO255OCTETS
);
599 hns_xgmac_cpy_q(®s
[83], qtmp
);
600 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_256TO511OCTETS
);
601 hns_xgmac_cpy_q(®s
[85], qtmp
);
602 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_512TO1023OCTETS
);
603 hns_xgmac_cpy_q(®s
[87], qtmp
);
604 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_1024TO1518OCTETS
);
605 hns_xgmac_cpy_q(®s
[89], qtmp
);
606 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_1519TOMAXOCTETS
);
607 hns_xgmac_cpy_q(®s
[91], qtmp
);
608 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_1519TOMAXOCTETSOK
);
609 hns_xgmac_cpy_q(®s
[93], qtmp
);
610 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_OVERSIZE
);
611 hns_xgmac_cpy_q(®s
[95], qtmp
);
612 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PKTS_JABBER
);
613 hns_xgmac_cpy_q(®s
[97], qtmp
);
614 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_GOODPKTS
);
615 hns_xgmac_cpy_q(®s
[99], qtmp
);
616 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_GOODOCTETS
);
617 hns_xgmac_cpy_q(®s
[101], qtmp
);
618 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_TOTAL_PKTS
);
619 hns_xgmac_cpy_q(®s
[103], qtmp
);
620 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_TOTALOCTETS
);
621 hns_xgmac_cpy_q(®s
[105], qtmp
);
622 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_UNICASTPKTS
);
623 hns_xgmac_cpy_q(®s
[107], qtmp
);
624 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_MULTICASTPKTS
);
625 hns_xgmac_cpy_q(®s
[109], qtmp
);
626 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_BROADCASTPKTS
);
627 hns_xgmac_cpy_q(®s
[111], qtmp
);
628 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI0PAUSEPKTS
);
629 hns_xgmac_cpy_q(®s
[113], qtmp
);
630 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI1PAUSEPKTS
);
631 hns_xgmac_cpy_q(®s
[115], qtmp
);
632 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI2PAUSEPKTS
);
633 hns_xgmac_cpy_q(®s
[117], qtmp
);
634 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI3PAUSEPKTS
);
635 hns_xgmac_cpy_q(®s
[119], qtmp
);
636 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI4PAUSEPKTS
);
637 hns_xgmac_cpy_q(®s
[121], qtmp
);
638 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI5PAUSEPKTS
);
639 hns_xgmac_cpy_q(®s
[123], qtmp
);
640 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI6PAUSEPKTS
);
641 hns_xgmac_cpy_q(®s
[125], qtmp
);
642 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_PRI7PAUSEPKTS
);
643 hns_xgmac_cpy_q(®s
[127], qtmp
);
644 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_MACCTRLPKTS
);
645 hns_xgmac_cpy_q(®s
[129], qtmp
);
646 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_1731PKTS
);
647 hns_xgmac_cpy_q(®s
[131], qtmp
);
648 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_1588PKTS
);
649 hns_xgmac_cpy_q(®s
[133], qtmp
);
650 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_FROMAPPGOODPKTS
);
651 hns_xgmac_cpy_q(®s
[135], qtmp
);
652 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_FROMAPPBADPKTS
);
653 hns_xgmac_cpy_q(®s
[137], qtmp
);
654 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_ERRALLPKTS
);
655 hns_xgmac_cpy_q(®s
[139], qtmp
);
658 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_FRAGMENT
);
659 hns_xgmac_cpy_q(®s
[141], qtmp
);
660 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTSUNDERSIZE
);
661 hns_xgmac_cpy_q(®s
[143], qtmp
);
662 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_UNDERMIN
);
663 hns_xgmac_cpy_q(®s
[145], qtmp
);
664 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_64OCTETS
);
665 hns_xgmac_cpy_q(®s
[147], qtmp
);
666 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_65TO127OCTETS
);
667 hns_xgmac_cpy_q(®s
[149], qtmp
);
668 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_128TO255OCTETS
);
669 hns_xgmac_cpy_q(®s
[151], qtmp
);
670 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_256TO511OCTETS
);
671 hns_xgmac_cpy_q(®s
[153], qtmp
);
672 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_512TO1023OCTETS
);
673 hns_xgmac_cpy_q(®s
[155], qtmp
);
674 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_1024TO1518OCTETS
);
675 hns_xgmac_cpy_q(®s
[157], qtmp
);
676 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_1519TOMAXOCTETS
);
677 hns_xgmac_cpy_q(®s
[159], qtmp
);
678 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_1519TOMAXOCTETSOK
);
679 hns_xgmac_cpy_q(®s
[161], qtmp
);
680 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_OVERSIZE
);
681 hns_xgmac_cpy_q(®s
[163], qtmp
);
682 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PKTS_JABBER
);
683 hns_xgmac_cpy_q(®s
[165], qtmp
);
684 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_GOODPKTS
);
685 hns_xgmac_cpy_q(®s
[167], qtmp
);
686 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_GOODOCTETS
);
687 hns_xgmac_cpy_q(®s
[169], qtmp
);
688 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_TOTAL_PKTS
);
689 hns_xgmac_cpy_q(®s
[171], qtmp
);
690 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_TOTALOCTETS
);
691 hns_xgmac_cpy_q(®s
[173], qtmp
);
692 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_UNICASTPKTS
);
693 hns_xgmac_cpy_q(®s
[175], qtmp
);
694 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_MULTICASTPKTS
);
695 hns_xgmac_cpy_q(®s
[177], qtmp
);
696 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_BROADCASTPKTS
);
697 hns_xgmac_cpy_q(®s
[179], qtmp
);
698 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI0PAUSEPKTS
);
699 hns_xgmac_cpy_q(®s
[181], qtmp
);
700 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI1PAUSEPKTS
);
701 hns_xgmac_cpy_q(®s
[183], qtmp
);
702 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI2PAUSEPKTS
);
703 hns_xgmac_cpy_q(®s
[185], qtmp
);
704 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI3PAUSEPKTS
);
705 hns_xgmac_cpy_q(®s
[187], qtmp
);
706 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI4PAUSEPKTS
);
707 hns_xgmac_cpy_q(®s
[189], qtmp
);
708 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI5PAUSEPKTS
);
709 hns_xgmac_cpy_q(®s
[191], qtmp
);
710 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI6PAUSEPKTS
);
711 hns_xgmac_cpy_q(®s
[193], qtmp
);
712 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_PRI7PAUSEPKTS
);
713 hns_xgmac_cpy_q(®s
[195], qtmp
);
715 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_MACCTRLPKTS
);
716 hns_xgmac_cpy_q(®s
[197], qtmp
);
717 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_SENDAPPGOODPKTS
);
718 hns_xgmac_cpy_q(®s
[199], qtmp
);
719 qtmp
= hns_mac_reg_read64(drv
, XGMAC_TX_SENDAPPBADPKTS
);
720 hns_xgmac_cpy_q(®s
[201], qtmp
);
721 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_1731PKTS
);
722 hns_xgmac_cpy_q(®s
[203], qtmp
);
723 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_SYMBOLERRPKTS
);
724 hns_xgmac_cpy_q(®s
[205], qtmp
);
725 qtmp
= hns_mac_reg_read64(drv
, XGMAC_RX_FCSERRPKTS
);
726 hns_xgmac_cpy_q(®s
[207], qtmp
);
728 /* mark end of mac regs */
729 for (i
= 208; i
< 214; i
++)
730 regs
[i
] = 0xaaaaaaaa;
734 *hns_xgmac_get_stats - get xgmac statistic
735 *@mac_drv: mac driver
736 *@data:data for value of stats regs
738 static void hns_xgmac_get_stats(void *mac_drv
, u64
*data
)
742 struct mac_driver
*drv
= (struct mac_driver
*)mac_drv
;
743 struct mac_hw_stats
*hw_stats
= NULL
;
745 hw_stats
= &drv
->mac_cb
->hw_stats
;
747 for (i
= 0; i
< ARRAY_SIZE(g_xgmac_stats_string
); i
++) {
748 buf
[i
] = DSAF_STATS_READ(hw_stats
,
749 g_xgmac_stats_string
[i
].offset
);
754 *hns_xgmac_get_strings - get xgmac strings name
755 *@stringset: type of values in data
756 *@data:data for value of string name
758 static void hns_xgmac_get_strings(u32 stringset
, u8
*data
)
760 char *buff
= (char *)data
;
763 if (stringset
!= ETH_SS_STATS
)
766 for (i
= 0; i
< ARRAY_SIZE(g_xgmac_stats_string
); i
++) {
767 snprintf(buff
, ETH_GSTRING_LEN
, g_xgmac_stats_string
[i
].desc
);
768 buff
= buff
+ ETH_GSTRING_LEN
;
773 *hns_xgmac_get_sset_count - get xgmac string set count
774 *@stringset: type of values in data
775 *return xgmac string set count
777 static int hns_xgmac_get_sset_count(int stringset
)
779 if (stringset
== ETH_SS_STATS
)
780 return ARRAY_SIZE(g_xgmac_stats_string
);
786 *hns_xgmac_get_regs_count - get xgmac regs count
787 *return xgmac regs count
789 static int hns_xgmac_get_regs_count(void)
791 return ETH_XGMAC_DUMP_NUM
;
794 void *hns_xgmac_config(struct hns_mac_cb
*mac_cb
, struct mac_params
*mac_param
)
796 struct mac_driver
*mac_drv
;
798 mac_drv
= devm_kzalloc(mac_cb
->dev
, sizeof(*mac_drv
), GFP_KERNEL
);
802 mac_drv
->mac_init
= hns_xgmac_init
;
803 mac_drv
->mac_enable
= hns_xgmac_enable
;
804 mac_drv
->mac_disable
= hns_xgmac_disable
;
806 mac_drv
->mac_id
= mac_param
->mac_id
;
807 mac_drv
->mac_mode
= mac_param
->mac_mode
;
808 mac_drv
->io_base
= mac_param
->vaddr
;
809 mac_drv
->dev
= mac_param
->dev
;
810 mac_drv
->mac_cb
= mac_cb
;
812 mac_drv
->set_mac_addr
= hns_xgmac_set_pausefrm_mac_addr
;
813 mac_drv
->set_an_mode
= NULL
;
814 mac_drv
->config_loopback
= NULL
;
815 mac_drv
->config_pad_and_crc
= hns_xgmac_config_pad_and_crc
;
816 mac_drv
->config_half_duplex
= NULL
;
817 mac_drv
->set_rx_ignore_pause_frames
=
818 hns_xgmac_set_rx_ignore_pause_frames
;
819 mac_drv
->mac_get_id
= hns_xgmac_get_id
;
820 mac_drv
->mac_free
= hns_xgmac_free
;
821 mac_drv
->adjust_link
= NULL
;
822 mac_drv
->set_tx_auto_pause_frames
= hns_xgmac_set_tx_auto_pause_frames
;
823 mac_drv
->config_max_frame_length
= hns_xgmac_config_max_frame_length
;
824 mac_drv
->mac_pausefrm_cfg
= hns_xgmac_pausefrm_cfg
;
825 mac_drv
->autoneg_stat
= NULL
;
826 mac_drv
->get_info
= hns_xgmac_get_info
;
827 mac_drv
->get_pause_enable
= hns_xgmac_get_pausefrm_cfg
;
828 mac_drv
->get_link_status
= hns_xgmac_get_link_status
;
829 mac_drv
->get_regs
= hns_xgmac_get_regs
;
830 mac_drv
->get_ethtool_stats
= hns_xgmac_get_stats
;
831 mac_drv
->get_sset_count
= hns_xgmac_get_sset_count
;
832 mac_drv
->get_regs_count
= hns_xgmac_get_regs_count
;
833 mac_drv
->get_strings
= hns_xgmac_get_strings
;
834 mac_drv
->update_stats
= hns_xgmac_update_stats
;
836 return (void *)mac_drv
;