drivers/net/ethernet/qualcomm/emac/emac-mac.h

   1 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
   2  *
   3  * This program is free software; you can redistribute it and/or modify
   4  * it under the terms of the GNU General Public License version 2 and
   5  * only version 2 as published by the Free Software Foundation.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  */
  12
  13 /* EMAC DMA HW engine uses three rings:
  14  * Tx:
  15  *   TPD: Transmit Packet Descriptor ring.
  16  * Rx:
  17  *   RFD: Receive Free Descriptor ring.
  18  *     Ring of descriptors with empty buffers to be filled by Rx HW.
  19  *   RRD: Receive Return Descriptor ring.
  20  *     Ring of descriptors with buffers filled with received data.
  21  */
  22
  23 #ifndef _EMAC_HW_H_
  24 #define _EMAC_HW_H_
  25
  26 /* EMAC_CSR register offsets */
  27 #define EMAC_EMAC_WRAPPER_CSR1                                0x000000
  28 #define EMAC_EMAC_WRAPPER_CSR2                                0x000004
  29 #define EMAC_EMAC_WRAPPER_TX_TS_LO                            0x000104
  30 #define EMAC_EMAC_WRAPPER_TX_TS_HI                            0x000108
  31 #define EMAC_EMAC_WRAPPER_TX_TS_INX                           0x00010c
  32
  33 /* DMA Order Settings */
  34 enum emac_dma_order {
  35         emac_dma_ord_in = 1,
  36         emac_dma_ord_enh = 2,
  37         emac_dma_ord_out = 4
  38 };
  39
  40 enum emac_dma_req_block {
  41         emac_dma_req_128 = 0,
  42         emac_dma_req_256 = 1,
  43         emac_dma_req_512 = 2,
  44         emac_dma_req_1024 = 3,
  45         emac_dma_req_2048 = 4,
  46         emac_dma_req_4096 = 5
  47 };
  48
  49 /* Returns the value of bits idx...idx+n_bits */
  50 #define BITS_GET(val, lo, hi) ((le32_to_cpu(val) & GENMASK((hi), (lo))) >> lo)
  51 #define BITS_SET(val, lo, hi, new_val) \
  52         val = cpu_to_le32((le32_to_cpu(val) & (~GENMASK((hi), (lo)))) | \
  53                 (((new_val) << (lo)) & GENMASK((hi), (lo))))
  54
  55 /* RRD (Receive Return Descriptor) */
  56 struct emac_rrd {
  57         u32     word[6];
  58
  59 /* number of RFD */
  60 #define RRD_NOR(rrd)                    BITS_GET((rrd)->word[0], 16, 19)
  61 /* start consumer index of rfd-ring */
  62 #define RRD_SI(rrd)                     BITS_GET((rrd)->word[0], 20, 31)
  63 /* vlan-tag (CVID, CFI and PRI) */
  64 #define RRD_CVALN_TAG(rrd)              BITS_GET((rrd)->word[2], 0, 15)
  65 /* length of the packet */
  66 #define RRD_PKT_SIZE(rrd)               BITS_GET((rrd)->word[3], 0, 13)
  67 /* L4(TCP/UDP) checksum failed */
  68 #define RRD_L4F(rrd)                    BITS_GET((rrd)->word[3], 14, 14)
  69 /* vlan tagged */
  70 #define RRD_CVTAG(rrd)                  BITS_GET((rrd)->word[3], 16, 16)
  71 /* When set, indicates that the descriptor is updated by the IP core.
  72  * When cleared, indicates that the descriptor is invalid.
  73  */
  74 #define RRD_UPDT(rrd)                   BITS_GET((rrd)->word[3], 31, 31)
  75 #define RRD_UPDT_SET(rrd, val)          BITS_SET((rrd)->word[3], 31, 31, val)
  76 /* timestamp low */
  77 #define RRD_TS_LOW(rrd)                 BITS_GET((rrd)->word[4], 0, 29)
  78 /* timestamp high */
  79 #define RRD_TS_HI(rrd)                  le32_to_cpu((rrd)->word[5])
  80 };
  81
  82 /* TPD (Transmit Packet Descriptor) */
  83 struct emac_tpd {
  84         u32                             word[4];
  85
  86 /* Number of bytes of the transmit packet. (include 4-byte CRC) */
  87 #define TPD_BUF_LEN_SET(tpd, val)       BITS_SET((tpd)->word[0], 0, 15, val)
  88 /* Custom Checksum Offload: When set, ask IP core to offload custom checksum */
  89 #define TPD_CSX_SET(tpd, val)           BITS_SET((tpd)->word[1], 8, 8, val)
  90 /* TCP Large Send Offload: When set, ask IP core to do offload TCP Large Send */
  91 #define TPD_LSO(tpd)                    BITS_GET((tpd)->word[1], 12, 12)
  92 #define TPD_LSO_SET(tpd, val)           BITS_SET((tpd)->word[1], 12, 12, val)
  93 /*  Large Send Offload Version: When set, indicates this is an LSOv2
  94  * (for both IPv4 and IPv6). When cleared, indicates this is an LSOv1
  95  * (only for IPv4).
  96  */
  97 #define TPD_LSOV_SET(tpd, val)          BITS_SET((tpd)->word[1], 13, 13, val)
  98 /* IPv4 packet: When set, indicates this is an  IPv4 packet, this bit is only
  99  * for LSOV2 format.
 100  */
 101 #define TPD_IPV4_SET(tpd, val)          BITS_SET((tpd)->word[1], 16, 16, val)
 102 /* 0: Ethernet   frame (DA+SA+TYPE+DATA+CRC)
 103  * 1: IEEE 802.3 frame (DA+SA+LEN+DSAP+SSAP+CTL+ORG+TYPE+DATA+CRC)
 104  */
 105 #define TPD_TYP_SET(tpd, val)           BITS_SET((tpd)->word[1], 17, 17, val)
 106 /* Low-32bit Buffer Address */
 107 #define TPD_BUFFER_ADDR_L_SET(tpd, val) ((tpd)->word[2] = cpu_to_le32(val))
 108 /* CVLAN Tag to be inserted if INS_VLAN_TAG is set, CVLAN TPID based on global
 109  * register configuration.
 110  */
 111 #define TPD_CVLAN_TAG_SET(tpd, val)     BITS_SET((tpd)->word[3], 0, 15, val)
 112 /*  Insert CVlan Tag: When set, ask MAC to insert CVLAN TAG to outgoing packet
 113  */
 114 #define TPD_INSTC_SET(tpd, val)         BITS_SET((tpd)->word[3], 17, 17, val)
 115 /* High-14bit Buffer Address, So, the 64b-bit address is
 116  * {DESC_CTRL_11_TX_DATA_HIADDR[17:0],(register) BUFFER_ADDR_H, BUFFER_ADDR_L}
 117  */
 118 #define TPD_BUFFER_ADDR_H_SET(tpd, val) BITS_SET((tpd)->word[3], 18, 30, val)
 119 /* Format D. Word offset from the 1st byte of this packet to start to calculate
 120  * the custom checksum.
 121  */
 122 #define TPD_PAYLOAD_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 0, 7, val)
 123 /*  Format D. Word offset from the 1st byte of this packet to fill the custom
 124  * checksum to
 125  */
 126 #define TPD_CXSUM_OFFSET_SET(tpd, val)  BITS_SET((tpd)->word[1], 18, 25, val)
 127
 128 /* Format C. TCP Header offset from the 1st byte of this packet. (byte unit) */
 129 #define TPD_TCPHDR_OFFSET_SET(tpd, val) BITS_SET((tpd)->word[1], 0, 7, val)
 130 /* Format C. MSS (Maximum Segment Size) got from the protocol layer. (byte unit)
 131  */
 132 #define TPD_MSS_SET(tpd, val)           BITS_SET((tpd)->word[1], 18, 30, val)
 133 /* packet length in ext tpd */
 134 #define TPD_PKT_LEN_SET(tpd, val)       ((tpd)->word[2] = cpu_to_le32(val))
 135 };
 136
 137 /* emac_ring_header represents a single, contiguous block of DMA space
 138  * mapped for the three descriptor rings (tpd, rfd, rrd)
 139  */
 140 struct emac_ring_header {
 141         void                    *v_addr;        /* virtual address */
 142         dma_addr_t              dma_addr;       /* dma address */
 143         size_t                  size;           /* length in bytes */
 144         size_t                  used;
 145 };
 146
 147 /* emac_buffer is wrapper around a pointer to a socket buffer
 148  * so a DMA handle can be stored along with the skb
 149  */
 150 struct emac_buffer {
 151         struct sk_buff          *skb;           /* socket buffer */
 152         u16                     length;         /* rx buffer length */
 153         dma_addr_t              dma_addr;       /* dma address */
 154 };
 155
 156 /* receive free descriptor (rfd) ring */
 157 struct emac_rfd_ring {
 158         struct emac_buffer      *rfbuff;
 159         u32                     *v_addr;        /* virtual address */
 160         dma_addr_t              dma_addr;       /* dma address */
 161         size_t                  size;           /* length in bytes */
 162         unsigned int            count;          /* number of desc in the ring */
 163         unsigned int            produce_idx;
 164         unsigned int            process_idx;
 165         unsigned int            consume_idx;    /* unused */
 166 };
 167
 168 /* Receive Return Desciptor (RRD) ring */
 169 struct emac_rrd_ring {
 170         u32                     *v_addr;        /* virtual address */
 171         dma_addr_t              dma_addr;       /* physical address */
 172         size_t                  size;           /* length in bytes */
 173         unsigned int            count;          /* number of desc in the ring */
 174         unsigned int            produce_idx;    /* unused */
 175         unsigned int            consume_idx;
 176 };
 177
 178 /* Rx queue */
 179 struct emac_rx_queue {
 180         struct net_device       *netdev;        /* netdev ring belongs to */
 181         struct emac_rrd_ring    rrd;
 182         struct emac_rfd_ring    rfd;
 183         struct napi_struct      napi;
 184         struct emac_irq         *irq;
 185
 186         u32                     intr;
 187         u32                     produce_mask;
 188         u32                     process_mask;
 189         u32                     consume_mask;
 190
 191         u16                     produce_reg;
 192         u16                     process_reg;
 193         u16                     consume_reg;
 194
 195         u8                      produce_shift;
 196         u8                      process_shft;
 197         u8                      consume_shift;
 198 };
 199
 200 /* Transimit Packet Descriptor (tpd) ring */
 201 struct emac_tpd_ring {
 202         struct emac_buffer      *tpbuff;
 203         u32                     *v_addr;        /* virtual address */
 204         dma_addr_t              dma_addr;       /* dma address */
 205
 206         size_t                  size;           /* length in bytes */
 207         unsigned int            count;          /* number of desc in the ring */
 208         unsigned int            produce_idx;
 209         unsigned int            consume_idx;
 210         unsigned int            last_produce_idx;
 211 };
 212
 213 /* Tx queue */
 214 struct emac_tx_queue {
 215         struct emac_tpd_ring    tpd;
 216
 217         u32                     produce_mask;
 218         u32                     consume_mask;
 219
 220         u16                     max_packets;    /* max packets per interrupt */
 221         u16                     produce_reg;
 222         u16                     consume_reg;
 223
 224         u8                      produce_shift;
 225         u8                      consume_shift;
 226 };
 227
 228 struct emac_adapter;
 229
 230 int  emac_mac_up(struct emac_adapter *adpt);
 231 void emac_mac_down(struct emac_adapter *adpt);
 232 void emac_mac_reset(struct emac_adapter *adpt);
 233 void emac_mac_start(struct emac_adapter *adpt);
 234 void emac_mac_stop(struct emac_adapter *adpt);
 235 void emac_mac_mode_config(struct emac_adapter *adpt);
 236 void emac_mac_rx_process(struct emac_adapter *adpt, struct emac_rx_queue *rx_q,
 237                          int *num_pkts, int max_pkts);
 238 int emac_mac_tx_buf_send(struct emac_adapter *adpt, struct emac_tx_queue *tx_q,
 239                          struct sk_buff *skb);
 240 void emac_mac_tx_process(struct emac_adapter *adpt, struct emac_tx_queue *tx_q);
 241 void emac_mac_rx_tx_ring_init_all(struct platform_device *pdev,
 242                                   struct emac_adapter *adpt);
 243 int  emac_mac_rx_tx_rings_alloc_all(struct emac_adapter *adpt);
 244 void emac_mac_rx_tx_rings_free_all(struct emac_adapter *adpt);
 245 void emac_mac_multicast_addr_clear(struct emac_adapter *adpt);
 246 void emac_mac_multicast_addr_set(struct emac_adapter *adpt, u8 *addr);
 247
 248 #endif /*_EMAC_HW_H_*/