1 #include <asm/asm-offsets.h>
2 #include <asm/thread_info.h>
4 #define PAGE_SIZE _PAGE_SIZE
7 * Put .bss..swapper_pg_dir as the first thing in .bss. This will
8 * ensure that it has .bss alignment (64K).
10 #define BSS_FIRST_SECTIONS *(.bss..swapper_pg_dir)
12 #include <asm-generic/vmlinux.lds.h>
19 text PT_LOAD FLAGS(7); /* RWX */
20 #ifndef CONFIG_CAVIUM_OCTEON_SOC
21 note PT_NOTE FLAGS(4); /* R__ */
22 #endif /* CAVIUM_OCTEON_SOC */
26 #ifdef CONFIG_CPU_LITTLE_ENDIAN
29 jiffies = jiffies_64 + 4;
37 #ifdef CONFIG_BOOT_ELF64
38 /* Read-only sections, merged into text segment: */
39 /* . = 0xc000000000000000; */
41 /* This is the value for an Origin kernel, taken from an IRIX kernel. */
42 /* . = 0xc00000000001c000; */
44 /* Set the vaddr for the text segment to a value
45 * >= 0xa800 0000 0001 9000 if no symmon is going to configured
46 * >= 0xa800 0000 0030 0000 otherwise
49 /* . = 0xa800000000300000; */
50 . = 0xffffffff80300000;
52 . = VMLINUX_LOAD_ADDRESS;
54 _text = .; /* Text and read-only data */
66 _etext = .; /* End of text section */
70 /* Exception table for data bus errors */
72 __start___dbe_table = .;
74 __stop___dbe_table = .;
77 #ifdef CONFIG_CAVIUM_OCTEON_SOC
79 #else /* CONFIG_CAVIUM_OCTEON_SOC */
80 #define NOTES_HEADER :note
81 #endif /* CONFIG_CAVIUM_OCTEON_SOC */
82 NOTES :text NOTES_HEADER
83 .dummy : { *(.dummy) } :text
85 _sdata = .; /* Start of data section */
90 . = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
92 INIT_TASK_DATA(THREAD_SIZE)
94 CACHELINE_ALIGNED_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
95 READ_MOSTLY_DATA(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
106 /* We want the small data sections together, so single-instruction offsets
107 can access them all, and initialized data all before uninitialized, so
108 we can shorten the on-disk segment size. */
112 _edata = .; /* End of data section */
114 /* will be freed after init */
115 . = ALIGN(PAGE_SIZE); /* Init code and data */
117 INIT_TEXT_SECTION(PAGE_SIZE)
118 INIT_DATA_SECTION(16)
121 .mips.machines.init : AT(ADDR(.mips.machines.init) - LOAD_OFFSET) {
122 __mips_machines_start = .;
123 *(.mips.machines.init)
124 __mips_machines_end = .;
127 /* .exit.text is discarded at runtime, not link time, to deal with
128 * references from .rodata
137 PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
140 #ifdef CONFIG_RELOCATABLE
144 _relocation_start = .;
146 * Space for relocation table
147 * This needs to be filled so that the
148 * relocs tool can overwrite the content.
149 * An invalid value is left at the start of the
150 * section to abort relocation if the table
151 * has not been filled in.
155 . += CONFIG_RELOCATION_TABLE_SIZE - 4;
160 #ifdef CONFIG_MIPS_RAW_APPENDED_DTB
162 /* leave space for appended DTB */
164 #elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
165 .appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
167 KEEP(*(.appended_dtb))
171 * Align to 64K in attempt to eliminate holes before the
172 * .bss..swapper_pg_dir section at the start of .bss. This
173 * also satisfies PAGE_SIZE alignment as the largest page size
178 /* freed after init ends here */
181 * Force .bss to 64K alignment so that .bss..swapper_pg_dir
182 * gets that alignment. .sbss should be empty, so there will be
183 * no holes after __init_end. */
184 BSS_SECTION(0, 0x10000, 0)
188 /* These mark the ABI of the kernel for debuggers. */
190 KEEP(*(.mdebug.abi32))
193 KEEP(*(.mdebug.abi64))
196 /* This is the MIPS specific mdebug section. */
204 /* These must appear regardless of . */
214 /* Sections to be discarded */
217 /* ABI crap starts here */