?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 4.19.133
[linux/fpc-iii.git] / drivers / acpi / pci_root.c
blobe465e720eab206305aeb89d68ccc11530d19d657
1 /*
2 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or (at
12 * your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
20 */
21
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/types.h>
26 #include <linux/mutex.h>
27 #include <linux/pm.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/pci.h>
30 #include <linux/pci-acpi.h>
31 #include <linux/pci-aspm.h>
32 #include <linux/dmar.h>
33 #include <linux/acpi.h>
34 #include <linux/slab.h>
35 #include <linux/dmi.h>
36 #include <linux/platform_data/x86/apple.h>
37 #include <acpi/apei.h> /* for acpi_hest_init() */
38
39 #include "internal.h"
40
41 #define _COMPONENT ACPI_PCI_COMPONENT
42 ACPI_MODULE_NAME("pci_root");
43 #define ACPI_PCI_ROOT_CLASS "pci_bridge"
44 #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
45 static int acpi_pci_root_add(struct acpi_device *device,
46 const struct acpi_device_id *not_used);
47 static void acpi_pci_root_remove(struct acpi_device *device);
48
49 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
50 {
51 acpiphp_check_host_bridge(adev);
52 return 0;
53 }
54
55 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
56 | OSC_PCI_ASPM_SUPPORT \
57 | OSC_PCI_CLOCK_PM_SUPPORT \
58 | OSC_PCI_MSI_SUPPORT)
59
60 static const struct acpi_device_id root_device_ids[] = {
61 {"PNP0A03", 0},
62 {"", 0},
63 };
64
65 static struct acpi_scan_handler pci_root_handler = {
66 .ids = root_device_ids,
67 .attach = acpi_pci_root_add,
68 .detach = acpi_pci_root_remove,
69 .hotplug = {
70 .enabled = true,
71 .scan_dependent = acpi_pci_root_scan_dependent,
72 },
73 };
74
75 static DEFINE_MUTEX(osc_lock);
76
77 /**
78 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
79 * @handle - the ACPI CA node in question.
80 *
81 * Note: we could make this API take a struct acpi_device * instead, but
82 * for now, it's more convenient to operate on an acpi_handle.
83 */
84 int acpi_is_root_bridge(acpi_handle handle)
85 {
86 int ret;
87 struct acpi_device *device;
88
89 ret = acpi_bus_get_device(handle, &device);
90 if (ret)
91 return 0;
92
93 ret = acpi_match_device_ids(device, root_device_ids);
94 if (ret)
95 return 0;
96 else
97 return 1;
98 }
99 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
100
101 static acpi_status
102 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
103 {
104 struct resource *res = data;
105 struct acpi_resource_address64 address;
106 acpi_status status;
107
108 status = acpi_resource_to_address64(resource, &address);
109 if (ACPI_FAILURE(status))
110 return AE_OK;
111
112 if ((address.address.address_length > 0) &&
113 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
114 res->start = address.address.minimum;
115 res->end = address.address.minimum + address.address.address_length - 1;
116 }
117
118 return AE_OK;
119 }
120
121 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
122 struct resource *res)
123 {
124 acpi_status status;
125
126 res->start = -1;
127 status =
128 acpi_walk_resources(handle, METHOD_NAME__CRS,
129 get_root_bridge_busnr_callback, res);
130 if (ACPI_FAILURE(status))
131 return status;
132 if (res->start == -1)
133 return AE_ERROR;
134 return AE_OK;
135 }
136
137 struct pci_osc_bit_struct {
138 u32 bit;
139 char *desc;
140 };
141
142 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
143 { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
144 { OSC_PCI_ASPM_SUPPORT, "ASPM" },
145 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
146 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
147 { OSC_PCI_MSI_SUPPORT, "MSI" },
148 };
149
150 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
151 { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
152 { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
153 { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
154 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
155 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
156 { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
157 };
158
159 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
160 struct pci_osc_bit_struct *table, int size)
161 {
162 char buf[80];
163 int i, len = 0;
164 struct pci_osc_bit_struct *entry;
165
166 buf[0] = '\0';
167 for (i = 0, entry = table; i < size; i++, entry++)
168 if (word & entry->bit)
169 len += snprintf(buf + len, sizeof(buf) - len, "%s%s",
170 len ? " " : "", entry->desc);
171
172 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
173 }
174
175 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
176 {
177 decode_osc_bits(root, msg, word, pci_osc_support_bit,
178 ARRAY_SIZE(pci_osc_support_bit));
179 }
180
181 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
182 {
183 decode_osc_bits(root, msg, word, pci_osc_control_bit,
184 ARRAY_SIZE(pci_osc_control_bit));
185 }
186
187 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
188
189 static acpi_status acpi_pci_run_osc(acpi_handle handle,
190 const u32 *capbuf, u32 *retval)
191 {
192 struct acpi_osc_context context = {
193 .uuid_str = pci_osc_uuid_str,
194 .rev = 1,
195 .cap.length = 12,
196 .cap.pointer = (void *)capbuf,
197 };
198 acpi_status status;
199
200 status = acpi_run_osc(handle, &context);
201 if (ACPI_SUCCESS(status)) {
202 *retval = *((u32 *)(context.ret.pointer + 8));
203 kfree(context.ret.pointer);
204 }
205 return status;
206 }
207
208 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
209 u32 support,
210 u32 *control)
211 {
212 acpi_status status;
213 u32 result, capbuf[3];
214
215 support &= OSC_PCI_SUPPORT_MASKS;
216 support |= root->osc_support_set;
217
218 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
219 capbuf[OSC_SUPPORT_DWORD] = support;
220 if (control) {
221 *control &= OSC_PCI_CONTROL_MASKS;
222 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
223 } else {
224 /* Run _OSC query only with existing controls. */
225 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
226 }
227
228 status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
229 if (ACPI_SUCCESS(status)) {
230 root->osc_support_set = support;
231 if (control)
232 *control = result;
233 }
234 return status;
235 }
236
237 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
238 {
239 acpi_status status;
240
241 mutex_lock(&osc_lock);
242 status = acpi_pci_query_osc(root, flags, NULL);
243 mutex_unlock(&osc_lock);
244 return status;
245 }
246
247 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
248 {
249 struct acpi_pci_root *root;
250 struct acpi_device *device;
251
252 if (acpi_bus_get_device(handle, &device) ||
253 acpi_match_device_ids(device, root_device_ids))
254 return NULL;
255
256 root = acpi_driver_data(device);
257
258 return root;
259 }
260 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
261
262 struct acpi_handle_node {
263 struct list_head node;
264 acpi_handle handle;
265 };
266
267 /**
268 * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
269 * @handle: the handle in question
270 *
271 * Given an ACPI CA handle, the desired PCI device is located in the
272 * list of PCI devices.
273 *
274 * If the device is found, its reference count is increased and this
275 * function returns a pointer to its data structure. The caller must
276 * decrement the reference count by calling pci_dev_put().
277 * If no device is found, %NULL is returned.
278 */
279 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
280 {
281 int dev, fn;
282 unsigned long long adr;
283 acpi_status status;
284 acpi_handle phandle;
285 struct pci_bus *pbus;
286 struct pci_dev *pdev = NULL;
287 struct acpi_handle_node *node, *tmp;
288 struct acpi_pci_root *root;
289 LIST_HEAD(device_list);
290
291 /*
292 * Walk up the ACPI CA namespace until we reach a PCI root bridge.
293 */
294 phandle = handle;
295 while (!acpi_is_root_bridge(phandle)) {
296 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
297 if (!node)
298 goto out;
299
300 INIT_LIST_HEAD(&node->node);
301 node->handle = phandle;
302 list_add(&node->node, &device_list);
303
304 status = acpi_get_parent(phandle, &phandle);
305 if (ACPI_FAILURE(status))
306 goto out;
307 }
308
309 root = acpi_pci_find_root(phandle);
310 if (!root)
311 goto out;
312
313 pbus = root->bus;
314
315 /*
316 * Now, walk back down the PCI device tree until we return to our
317 * original handle. Assumes that everything between the PCI root
318 * bridge and the device we're looking for must be a P2P bridge.
319 */
320 list_for_each_entry(node, &device_list, node) {
321 acpi_handle hnd = node->handle;
322 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
323 if (ACPI_FAILURE(status))
324 goto out;
325 dev = (adr >> 16) & 0xffff;
326 fn = adr & 0xffff;
327
328 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
329 if (!pdev || hnd == handle)
330 break;
331
332 pbus = pdev->subordinate;
333 pci_dev_put(pdev);
334
335 /*
336 * This function may be called for a non-PCI device that has a
337 * PCI parent (eg. a disk under a PCI SATA controller). In that
338 * case pdev->subordinate will be NULL for the parent.
339 */
340 if (!pbus) {
341 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
342 pdev = NULL;
343 break;
344 }
345 }
346 out:
347 list_for_each_entry_safe(node, tmp, &device_list, node)
348 kfree(node);
349
350 return pdev;
351 }
352 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
353
354 /**
355 * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
356 * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
357 * @mask: Mask of _OSC bits to request control of, place to store control mask.
358 * @req: Mask of _OSC bits the control of is essential to the caller.
359 *
360 * Run _OSC query for @mask and if that is successful, compare the returned
361 * mask of control bits with @req. If all of the @req bits are set in the
362 * returned mask, run _OSC request for it.
363 *
364 * The variable at the @mask address may be modified regardless of whether or
365 * not the function returns success. On success it will contain the mask of
366 * _OSC bits the BIOS has granted control of, but its contents are meaningless
367 * on failure.
368 **/
369 acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
370 {
371 struct acpi_pci_root *root;
372 acpi_status status = AE_OK;
373 u32 ctrl, capbuf[3];
374
375 if (!mask)
376 return AE_BAD_PARAMETER;
377
378 ctrl = *mask & OSC_PCI_CONTROL_MASKS;
379 if ((ctrl & req) != req)
380 return AE_TYPE;
381
382 root = acpi_pci_find_root(handle);
383 if (!root)
384 return AE_NOT_EXIST;
385
386 mutex_lock(&osc_lock);
387
388 *mask = ctrl | root->osc_control_set;
389 /* No need to evaluate _OSC if the control was already granted. */
390 if ((root->osc_control_set & ctrl) == ctrl)
391 goto out;
392
393 /* Need to check the available controls bits before requesting them. */
394 while (*mask) {
395 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
396 if (ACPI_FAILURE(status))
397 goto out;
398 if (ctrl == *mask)
399 break;
400 decode_osc_control(root, "platform does not support",
401 ctrl & ~(*mask));
402 ctrl = *mask;
403 }
404
405 if ((ctrl & req) != req) {
406 decode_osc_control(root, "not requesting control; platform does not support",
407 req & ~(ctrl));
408 status = AE_SUPPORT;
409 goto out;
410 }
411
412 capbuf[OSC_QUERY_DWORD] = 0;
413 capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
414 capbuf[OSC_CONTROL_DWORD] = ctrl;
415 status = acpi_pci_run_osc(handle, capbuf, mask);
416 if (ACPI_SUCCESS(status))
417 root->osc_control_set = *mask;
418 out:
419 mutex_unlock(&osc_lock);
420 return status;
421 }
422 EXPORT_SYMBOL(acpi_pci_osc_control_set);
423
424 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
425 {
426 u32 support, control, requested;
427 acpi_status status;
428 struct acpi_device *device = root->device;
429 acpi_handle handle = device->handle;
430
431 /*
432 * Apple always return failure on _OSC calls when _OSI("Darwin") has
433 * been called successfully. We know the feature set supported by the
434 * platform, so avoid calling _OSC at all
435 */
436 if (x86_apple_machine) {
437 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
438 decode_osc_control(root, "OS assumes control of",
439 root->osc_control_set);
440 return;
441 }
442
443 /*
444 * All supported architectures that use ACPI have support for
445 * PCI domains, so we indicate this in _OSC support capabilities.
446 */
447 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
448 if (pci_ext_cfg_avail())
449 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
450 if (pcie_aspm_support_enabled())
451 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
452 if (pci_msi_enabled())
453 support |= OSC_PCI_MSI_SUPPORT;
454
455 decode_osc_support(root, "OS supports", support);
456 status = acpi_pci_osc_support(root, support);
457 if (ACPI_FAILURE(status)) {
458 dev_info(&device->dev, "_OSC failed (%s)%s\n",
459 acpi_format_exception(status),
460 pcie_aspm_support_enabled() ? "; disabling ASPM" : "");
461 *no_aspm = 1;
462 return;
463 }
464
465 if (pcie_ports_disabled) {
466 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
467 return;
468 }
469
470 if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
471 decode_osc_support(root, "not requesting OS control; OS requires",
472 ACPI_PCIE_REQ_SUPPORT);
473 return;
474 }
475
476 control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
477 | OSC_PCI_EXPRESS_PME_CONTROL;
478
479 if (IS_ENABLED(CONFIG_PCIEASPM))
480 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
481
482 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
483 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
484
485 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
486 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
487
488 if (pci_aer_available()) {
489 if (aer_acpi_firmware_first())
490 dev_info(&device->dev,
491 "PCIe AER handled by firmware\n");
492 else
493 control |= OSC_PCI_EXPRESS_AER_CONTROL;
494 }
495
496 requested = control;
497 status = acpi_pci_osc_control_set(handle, &control,
498 OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
499 if (ACPI_SUCCESS(status)) {
500 decode_osc_control(root, "OS now controls", control);
501 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
502 /*
503 * We have ASPM control, but the FADT indicates that
504 * it's unsupported. Leave existing configuration
505 * intact and prevent the OS from touching it.
506 */
507 dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
508 *no_aspm = 1;
509 }
510 } else {
511 decode_osc_control(root, "OS requested", requested);
512 decode_osc_control(root, "platform willing to grant", control);
513 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
514 acpi_format_exception(status));
515
516 /*
517 * We want to disable ASPM here, but aspm_disabled
518 * needs to remain in its state from boot so that we
519 * properly handle PCIe 1.1 devices. So we set this
520 * flag here, to defer the action until after the ACPI
521 * root scan.
522 */
523 *no_aspm = 1;
524 }
525 }
526
527 static int acpi_pci_root_add(struct acpi_device *device,
528 const struct acpi_device_id *not_used)
529 {
530 unsigned long long segment, bus;
531 acpi_status status;
532 int result;
533 struct acpi_pci_root *root;
534 acpi_handle handle = device->handle;
535 int no_aspm = 0;
536 bool hotadd = system_state == SYSTEM_RUNNING;
537
538 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
539 if (!root)
540 return -ENOMEM;
541
542 segment = 0;
543 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
544 &segment);
545 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
546 dev_err(&device->dev, "can't evaluate _SEG\n");
547 result = -ENODEV;
548 goto end;
549 }
550
551 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */
552 root->secondary.flags = IORESOURCE_BUS;
553 status = try_get_root_bridge_busnr(handle, &root->secondary);
554 if (ACPI_FAILURE(status)) {
555 /*
556 * We need both the start and end of the downstream bus range
557 * to interpret _CBA (MMCONFIG base address), so it really is
558 * supposed to be in _CRS. If we don't find it there, all we
559 * can do is assume [_BBN-0xFF] or [0-0xFF].
560 */
561 root->secondary.end = 0xFF;
562 dev_warn(&device->dev,
563 FW_BUG "no secondary bus range in _CRS\n");
564 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
565 NULL, &bus);
566 if (ACPI_SUCCESS(status))
567 root->secondary.start = bus;
568 else if (status == AE_NOT_FOUND)
569 root->secondary.start = 0;
570 else {
571 dev_err(&device->dev, "can't evaluate _BBN\n");
572 result = -ENODEV;
573 goto end;
574 }
575 }
576
577 root->device = device;
578 root->segment = segment & 0xFFFF;
579 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
580 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
581 device->driver_data = root;
582
583 if (hotadd && dmar_device_add(handle)) {
584 result = -ENXIO;
585 goto end;
586 }
587
588 pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
589 acpi_device_name(device), acpi_device_bid(device),
590 root->segment, &root->secondary);
591
592 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
593
594 negotiate_os_control(root, &no_aspm);
595
596 /*
597 * TBD: Need PCI interface for enumeration/configuration of roots.
598 */
599
600 /*
601 * Scan the Root Bridge
602 * --------------------
603 * Must do this prior to any attempt to bind the root device, as the
604 * PCI namespace does not get created until this call is made (and
605 * thus the root bridge's pci_dev does not exist).
606 */
607 root->bus = pci_acpi_scan_root(root);
608 if (!root->bus) {
609 dev_err(&device->dev,
610 "Bus %04x:%02x not present in PCI namespace\n",
611 root->segment, (unsigned int)root->secondary.start);
612 device->driver_data = NULL;
613 result = -ENODEV;
614 goto remove_dmar;
615 }
616
617 if (no_aspm)
618 pcie_no_aspm();
619
620 pci_acpi_add_bus_pm_notifier(device);
621 device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
622
623 if (hotadd) {
624 pcibios_resource_survey_bus(root->bus);
625 pci_assign_unassigned_root_bus_resources(root->bus);
626 /*
627 * This is only called for the hotadd case. For the boot-time
628 * case, we need to wait until after PCI initialization in
629 * order to deal with IOAPICs mapped in on a PCI BAR.
630 *
631 * This is currently x86-specific, because acpi_ioapic_add()
632 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
633 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
634 * (see drivers/acpi/Kconfig).
635 */
636 acpi_ioapic_add(root->device->handle);
637 }
638
639 pci_lock_rescan_remove();
640 pci_bus_add_devices(root->bus);
641 pci_unlock_rescan_remove();
642 return 1;
643
644 remove_dmar:
645 if (hotadd)
646 dmar_device_remove(handle);
647 end:
648 kfree(root);
649 return result;
650 }
651
652 static void acpi_pci_root_remove(struct acpi_device *device)
653 {
654 struct acpi_pci_root *root = acpi_driver_data(device);
655
656 pci_lock_rescan_remove();
657
658 pci_stop_root_bus(root->bus);
659
660 pci_ioapic_remove(root);
661 device_set_wakeup_capable(root->bus->bridge, false);
662 pci_acpi_remove_bus_pm_notifier(device);
663
664 pci_remove_root_bus(root->bus);
665 WARN_ON(acpi_ioapic_remove(root));
666
667 dmar_device_remove(device->handle);
668
669 pci_unlock_rescan_remove();
670
671 kfree(root);
672 }
673
674 /*
675 * Following code to support acpi_pci_root_create() is copied from
676 * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
677 * and ARM64.
678 */
679 static void acpi_pci_root_validate_resources(struct device *dev,
680 struct list_head *resources,
681 unsigned long type)
682 {
683 LIST_HEAD(list);
684 struct resource *res1, *res2, *root = NULL;
685 struct resource_entry *tmp, *entry, *entry2;
686
687 BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
688 root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
689
690 list_splice_init(resources, &list);
691 resource_list_for_each_entry_safe(entry, tmp, &list) {
692 bool free = false;
693 resource_size_t end;
694
695 res1 = entry->res;
696 if (!(res1->flags & type))
697 goto next;
698
699 /* Exclude non-addressable range or non-addressable portion */
700 end = min(res1->end, root->end);
701 if (end <= res1->start) {
702 dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
703 res1);
704 free = true;
705 goto next;
706 } else if (res1->end != end) {
707 dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
708 res1, (unsigned long long)end + 1,
709 (unsigned long long)res1->end);
710 res1->end = end;
711 }
712
713 resource_list_for_each_entry(entry2, resources) {
714 res2 = entry2->res;
715 if (!(res2->flags & type))
716 continue;
717
718 /*
719 * I don't like throwing away windows because then
720 * our resources no longer match the ACPI _CRS, but
721 * the kernel resource tree doesn't allow overlaps.
722 */
723 if (resource_overlaps(res1, res2)) {
724 res2->start = min(res1->start, res2->start);
725 res2->end = max(res1->end, res2->end);
726 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
727 res2, res1);
728 free = true;
729 goto next;
730 }
731 }
732
733 next:
734 resource_list_del(entry);
735 if (free)
736 resource_list_free_entry(entry);
737 else
738 resource_list_add_tail(entry, resources);
739 }
740 }
741
742 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
743 struct resource_entry *entry)
744 {
745 #ifdef PCI_IOBASE
746 struct resource *res = entry->res;
747 resource_size_t cpu_addr = res->start;
748 resource_size_t pci_addr = cpu_addr - entry->offset;
749 resource_size_t length = resource_size(res);
750 unsigned long port;
751
752 if (pci_register_io_range(fwnode, cpu_addr, length))
753 goto err;
754
755 port = pci_address_to_pio(cpu_addr);
756 if (port == (unsigned long)-1)
757 goto err;
758
759 res->start = port;
760 res->end = port + length - 1;
761 entry->offset = port - pci_addr;
762
763 if (pci_remap_iospace(res, cpu_addr) < 0)
764 goto err;
765
766 pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
767 return;
768 err:
769 res->flags |= IORESOURCE_DISABLED;
770 #endif
771 }
772
773 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
774 {
775 int ret;
776 struct list_head *list = &info->resources;
777 struct acpi_device *device = info->bridge;
778 struct resource_entry *entry, *tmp;
779 unsigned long flags;
780
781 flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
782 ret = acpi_dev_get_resources(device, list,
783 acpi_dev_filter_resource_type_cb,
784 (void *)flags);
785 if (ret < 0)
786 dev_warn(&device->dev,
787 "failed to parse _CRS method, error code %d\n", ret);
788 else if (ret == 0)
789 dev_dbg(&device->dev,
790 "no IO and memory resources present in _CRS\n");
791 else {
792 resource_list_for_each_entry_safe(entry, tmp, list) {
793 if (entry->res->flags & IORESOURCE_IO)
794 acpi_pci_root_remap_iospace(&device->fwnode,
795 entry);
796
797 if (entry->res->flags & IORESOURCE_DISABLED)
798 resource_list_destroy_entry(entry);
799 else
800 entry->res->name = info->name;
801 }
802 acpi_pci_root_validate_resources(&device->dev, list,
803 IORESOURCE_MEM);
804 acpi_pci_root_validate_resources(&device->dev, list,
805 IORESOURCE_IO);
806 }
807
808 return ret;
809 }
810
811 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
812 {
813 struct resource_entry *entry, *tmp;
814 struct resource *res, *conflict, *root = NULL;
815
816 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
817 res = entry->res;
818 if (res->flags & IORESOURCE_MEM)
819 root = &iomem_resource;
820 else if (res->flags & IORESOURCE_IO)
821 root = &ioport_resource;
822 else
823 continue;
824
825 /*
826 * Some legacy x86 host bridge drivers use iomem_resource and
827 * ioport_resource as default resource pool, skip it.
828 */
829 if (res == root)
830 continue;
831
832 conflict = insert_resource_conflict(root, res);
833 if (conflict) {
834 dev_info(&info->bridge->dev,
835 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
836 res, conflict->name, conflict);
837 resource_list_destroy_entry(entry);
838 }
839 }
840 }
841
842 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
843 {
844 struct resource *res;
845 struct resource_entry *entry, *tmp;
846
847 if (!info)
848 return;
849
850 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
851 res = entry->res;
852 if (res->parent &&
853 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
854 release_resource(res);
855 resource_list_destroy_entry(entry);
856 }
857
858 info->ops->release_info(info);
859 }
860
861 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
862 {
863 struct resource *res;
864 struct resource_entry *entry;
865
866 resource_list_for_each_entry(entry, &bridge->windows) {
867 res = entry->res;
868 if (res->flags & IORESOURCE_IO)
869 pci_unmap_iospace(res);
870 if (res->parent &&
871 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
872 release_resource(res);
873 }
874 __acpi_pci_root_release_info(bridge->release_data);
875 }
876
877 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
878 struct acpi_pci_root_ops *ops,
879 struct acpi_pci_root_info *info,
880 void *sysdata)
881 {
882 int ret, busnum = root->secondary.start;
883 struct acpi_device *device = root->device;
884 int node = acpi_get_node(device->handle);
885 struct pci_bus *bus;
886 struct pci_host_bridge *host_bridge;
887
888 info->root = root;
889 info->bridge = device;
890 info->ops = ops;
891 INIT_LIST_HEAD(&info->resources);
892 snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
893 root->segment, busnum);
894
895 if (ops->init_info && ops->init_info(info))
896 goto out_release_info;
897 if (ops->prepare_resources)
898 ret = ops->prepare_resources(info);
899 else
900 ret = acpi_pci_probe_root_resources(info);
901 if (ret < 0)
902 goto out_release_info;
903
904 pci_acpi_root_add_resources(info);
905 pci_add_resource(&info->resources, &root->secondary);
906 bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
907 sysdata, &info->resources);
908 if (!bus)
909 goto out_release_info;
910
911 host_bridge = to_pci_host_bridge(bus->bridge);
912 if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
913 host_bridge->native_pcie_hotplug = 0;
914 if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
915 host_bridge->native_shpc_hotplug = 0;
916 if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
917 host_bridge->native_aer = 0;
918 if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
919 host_bridge->native_pme = 0;
920 if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
921 host_bridge->native_ltr = 0;
922
923 pci_scan_child_bus(bus);
924 pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
925 info);
926 if (node != NUMA_NO_NODE)
927 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
928 return bus;
929
930 out_release_info:
931 __acpi_pci_root_release_info(info);
932 return NULL;
933 }
934
935 void __init acpi_pci_root_init(void)
936 {
937 acpi_hest_init();
938 if (acpi_pci_disabled)
939 return;
940
941 pci_acpi_crs_quirks();
942 acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
943 }
Linux with added FPC-III support