?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 4.19.133
[linux/fpc-iii.git] / drivers / atm / fore200e.c
blob86aab14872fd01fcea22dc0b1d234c0f25cf7906
1 /*
2 A FORE Systems 200E-series driver for ATM on Linux.
3 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
4
5 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
6
7 This driver simultaneously supports PCA-200E and SBA-200E adapters
8 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25
26 #include <linux/kernel.h>
27 #include <linux/slab.h>
28 #include <linux/init.h>
29 #include <linux/capability.h>
30 #include <linux/interrupt.h>
31 #include <linux/bitops.h>
32 #include <linux/pci.h>
33 #include <linux/module.h>
34 #include <linux/atmdev.h>
35 #include <linux/sonet.h>
36 #include <linux/atm_suni.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/delay.h>
39 #include <linux/firmware.h>
40 #include <asm/io.h>
41 #include <asm/string.h>
42 #include <asm/page.h>
43 #include <asm/irq.h>
44 #include <asm/dma.h>
45 #include <asm/byteorder.h>
46 #include <linux/uaccess.h>
47 #include <linux/atomic.h>
48
49 #ifdef CONFIG_SBUS
50 #include <linux/of.h>
51 #include <linux/of_device.h>
52 #include <asm/idprom.h>
53 #include <asm/openprom.h>
54 #include <asm/oplib.h>
55 #include <asm/pgtable.h>
56 #endif
57
58 #if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
59 #define FORE200E_USE_TASKLET
60 #endif
61
62 #if 0 /* enable the debugging code of the buffer supply queues */
63 #define FORE200E_BSQ_DEBUG
64 #endif
65
66 #if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
67 #define FORE200E_52BYTE_AAL0_SDU
68 #endif
69
70 #include "fore200e.h"
71 #include "suni.h"
72
73 #define FORE200E_VERSION "0.3e"
74
75 #define FORE200E "fore200e: "
76
77 #if 0 /* override .config */
78 #define CONFIG_ATM_FORE200E_DEBUG 1
79 #endif
80 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
81 #define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
82 printk(FORE200E format, ##args); } while (0)
83 #else
84 #define DPRINTK(level, format, args...) do {} while (0)
85 #endif
86
87
88 #define FORE200E_ALIGN(addr, alignment) \
89 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
90
91 #define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
92
93 #define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
94
95 #define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
96
97 #if 1
98 #define ASSERT(expr) if (!(expr)) { \
99 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
100 __func__, __LINE__, #expr); \
101 panic(FORE200E "%s", __func__); \
102 }
103 #else
104 #define ASSERT(expr) do {} while (0)
105 #endif
106
107
108 static const struct atmdev_ops fore200e_ops;
109 static const struct fore200e_bus fore200e_bus[];
110
111 static LIST_HEAD(fore200e_boards);
112
113
114 MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
115 MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
116 MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
117
118
119 static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
120 { BUFFER_S1_NBR, BUFFER_L1_NBR },
121 { BUFFER_S2_NBR, BUFFER_L2_NBR }
122 };
123
124 static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
125 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
126 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
127 };
128
129
130 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
131 static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
132 #endif
133
134
135 #if 0 /* currently unused */
136 static int
137 fore200e_fore2atm_aal(enum fore200e_aal aal)
138 {
139 switch(aal) {
140 case FORE200E_AAL0: return ATM_AAL0;
141 case FORE200E_AAL34: return ATM_AAL34;
142 case FORE200E_AAL5: return ATM_AAL5;
143 }
144
145 return -EINVAL;
146 }
147 #endif
148
149
150 static enum fore200e_aal
151 fore200e_atm2fore_aal(int aal)
152 {
153 switch(aal) {
154 case ATM_AAL0: return FORE200E_AAL0;
155 case ATM_AAL34: return FORE200E_AAL34;
156 case ATM_AAL1:
157 case ATM_AAL2:
158 case ATM_AAL5: return FORE200E_AAL5;
159 }
160
161 return -EINVAL;
162 }
163
164
165 static char*
166 fore200e_irq_itoa(int irq)
167 {
168 static char str[8];
169 sprintf(str, "%d", irq);
170 return str;
171 }
172
173
174 /* allocate and align a chunk of memory intended to hold the data behing exchanged
175 between the driver and the adapter (using streaming DVMA) */
176
177 static int
178 fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
179 {
180 unsigned long offset = 0;
181
182 if (alignment <= sizeof(int))
183 alignment = 0;
184
185 chunk->alloc_size = size + alignment;
186 chunk->align_size = size;
187 chunk->direction = direction;
188
189 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
190 if (chunk->alloc_addr == NULL)
191 return -ENOMEM;
192
193 if (alignment > 0)
194 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
195
196 chunk->align_addr = chunk->alloc_addr + offset;
197
198 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
199
200 return 0;
201 }
202
203
204 /* free a chunk of memory */
205
206 static void
207 fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
208 {
209 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
210
211 kfree(chunk->alloc_addr);
212 }
213
214
215 static void
216 fore200e_spin(int msecs)
217 {
218 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
219 while (time_before(jiffies, timeout));
220 }
221
222
223 static int
224 fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
225 {
226 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
227 int ok;
228
229 mb();
230 do {
231 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
232 break;
233
234 } while (time_before(jiffies, timeout));
235
236 #if 1
237 if (!ok) {
238 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
239 *addr, val);
240 }
241 #endif
242
243 return ok;
244 }
245
246
247 static int
248 fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
249 {
250 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
251 int ok;
252
253 do {
254 if ((ok = (fore200e->bus->read(addr) == val)))
255 break;
256
257 } while (time_before(jiffies, timeout));
258
259 #if 1
260 if (!ok) {
261 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
262 fore200e->bus->read(addr), val);
263 }
264 #endif
265
266 return ok;
267 }
268
269
270 static void
271 fore200e_free_rx_buf(struct fore200e* fore200e)
272 {
273 int scheme, magn, nbr;
274 struct buffer* buffer;
275
276 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
277 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
278
279 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
280
281 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
282
283 struct chunk* data = &buffer[ nbr ].data;
284
285 if (data->alloc_addr != NULL)
286 fore200e_chunk_free(fore200e, data);
287 }
288 }
289 }
290 }
291 }
292
293
294 static void
295 fore200e_uninit_bs_queue(struct fore200e* fore200e)
296 {
297 int scheme, magn;
298
299 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
300 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
301
302 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
303 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
304
305 if (status->alloc_addr)
306 fore200e->bus->dma_chunk_free(fore200e, status);
307
308 if (rbd_block->alloc_addr)
309 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
310 }
311 }
312 }
313
314
315 static int
316 fore200e_reset(struct fore200e* fore200e, int diag)
317 {
318 int ok;
319
320 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
321
322 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
323
324 fore200e->bus->reset(fore200e);
325
326 if (diag) {
327 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
328 if (ok == 0) {
329
330 printk(FORE200E "device %s self-test failed\n", fore200e->name);
331 return -ENODEV;
332 }
333
334 printk(FORE200E "device %s self-test passed\n", fore200e->name);
335
336 fore200e->state = FORE200E_STATE_RESET;
337 }
338
339 return 0;
340 }
341
342
343 static void
344 fore200e_shutdown(struct fore200e* fore200e)
345 {
346 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
347 fore200e->name, fore200e->phys_base,
348 fore200e_irq_itoa(fore200e->irq));
349
350 if (fore200e->state > FORE200E_STATE_RESET) {
351 /* first, reset the board to prevent further interrupts or data transfers */
352 fore200e_reset(fore200e, 0);
353 }
354
355 /* then, release all allocated resources */
356 switch(fore200e->state) {
357
358 case FORE200E_STATE_COMPLETE:
359 kfree(fore200e->stats);
360
361 /* fall through */
362 case FORE200E_STATE_IRQ:
363 free_irq(fore200e->irq, fore200e->atm_dev);
364
365 /* fall through */
366 case FORE200E_STATE_ALLOC_BUF:
367 fore200e_free_rx_buf(fore200e);
368
369 /* fall through */
370 case FORE200E_STATE_INIT_BSQ:
371 fore200e_uninit_bs_queue(fore200e);
372
373 /* fall through */
374 case FORE200E_STATE_INIT_RXQ:
375 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
376 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
377
378 /* fall through */
379 case FORE200E_STATE_INIT_TXQ:
380 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
381 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
382
383 /* fall through */
384 case FORE200E_STATE_INIT_CMDQ:
385 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
386
387 /* fall through */
388 case FORE200E_STATE_INITIALIZE:
389 /* nothing to do for that state */
390
391 case FORE200E_STATE_START_FW:
392 /* nothing to do for that state */
393
394 case FORE200E_STATE_RESET:
395 /* nothing to do for that state */
396
397 case FORE200E_STATE_MAP:
398 fore200e->bus->unmap(fore200e);
399
400 /* fall through */
401 case FORE200E_STATE_CONFIGURE:
402 /* nothing to do for that state */
403
404 case FORE200E_STATE_REGISTER:
405 /* XXX shouldn't we *start* by deregistering the device? */
406 atm_dev_deregister(fore200e->atm_dev);
407
408 case FORE200E_STATE_BLANK:
409 /* nothing to do for that state */
410 break;
411 }
412 }
413
414
415 #ifdef CONFIG_PCI
416
417 static u32 fore200e_pca_read(volatile u32 __iomem *addr)
418 {
419 /* on big-endian hosts, the board is configured to convert
420 the endianess of slave RAM accesses */
421 return le32_to_cpu(readl(addr));
422 }
423
424
425 static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
426 {
427 /* on big-endian hosts, the board is configured to convert
428 the endianess of slave RAM accesses */
429 writel(cpu_to_le32(val), addr);
430 }
431
432
433 static u32
434 fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
435 {
436 u32 dma_addr = dma_map_single(&((struct pci_dev *) fore200e->bus_dev)->dev, virt_addr, size, direction);
437
438 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
439 virt_addr, size, direction, dma_addr);
440
441 return dma_addr;
442 }
443
444
445 static void
446 fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
447 {
448 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
449 dma_addr, size, direction);
450
451 dma_unmap_single(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction);
452 }
453
454
455 static void
456 fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
457 {
458 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
459
460 dma_sync_single_for_cpu(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction);
461 }
462
463 static void
464 fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
465 {
466 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
467
468 dma_sync_single_for_device(&((struct pci_dev *) fore200e->bus_dev)->dev, dma_addr, size, direction);
469 }
470
471
472 /* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
473 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
474
475 static int
476 fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
477 int size, int nbr, int alignment)
478 {
479 /* returned chunks are page-aligned */
480 chunk->alloc_size = size * nbr;
481 chunk->alloc_addr = dma_alloc_coherent(&((struct pci_dev *) fore200e->bus_dev)->dev,
482 chunk->alloc_size,
483 &chunk->dma_addr,
484 GFP_KERNEL);
485
486 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
487 return -ENOMEM;
488
489 chunk->align_addr = chunk->alloc_addr;
490
491 return 0;
492 }
493
494
495 /* free a DMA consistent chunk of memory */
496
497 static void
498 fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
499 {
500 dma_free_coherent(&((struct pci_dev *) fore200e->bus_dev)->dev,
501 chunk->alloc_size,
502 chunk->alloc_addr,
503 chunk->dma_addr);
504 }
505
506
507 static int
508 fore200e_pca_irq_check(struct fore200e* fore200e)
509 {
510 /* this is a 1 bit register */
511 int irq_posted = readl(fore200e->regs.pca.psr);
512
513 #if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
514 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
515 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
516 }
517 #endif
518
519 return irq_posted;
520 }
521
522
523 static void
524 fore200e_pca_irq_ack(struct fore200e* fore200e)
525 {
526 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
527 }
528
529
530 static void
531 fore200e_pca_reset(struct fore200e* fore200e)
532 {
533 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
534 fore200e_spin(10);
535 writel(0, fore200e->regs.pca.hcr);
536 }
537
538
539 static int fore200e_pca_map(struct fore200e* fore200e)
540 {
541 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
542
543 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
544
545 if (fore200e->virt_base == NULL) {
546 printk(FORE200E "can't map device %s\n", fore200e->name);
547 return -EFAULT;
548 }
549
550 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
551
552 /* gain access to the PCA specific registers */
553 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
554 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
555 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
556
557 fore200e->state = FORE200E_STATE_MAP;
558 return 0;
559 }
560
561
562 static void
563 fore200e_pca_unmap(struct fore200e* fore200e)
564 {
565 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
566
567 if (fore200e->virt_base != NULL)
568 iounmap(fore200e->virt_base);
569 }
570
571
572 static int fore200e_pca_configure(struct fore200e *fore200e)
573 {
574 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
575 u8 master_ctrl, latency;
576
577 DPRINTK(2, "device %s being configured\n", fore200e->name);
578
579 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
580 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
581 return -EIO;
582 }
583
584 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
585
586 master_ctrl = master_ctrl
587 #if defined(__BIG_ENDIAN)
588 /* request the PCA board to convert the endianess of slave RAM accesses */
589 | PCA200E_CTRL_CONVERT_ENDIAN
590 #endif
591 #if 0
592 | PCA200E_CTRL_DIS_CACHE_RD
593 | PCA200E_CTRL_DIS_WRT_INVAL
594 | PCA200E_CTRL_ENA_CONT_REQ_MODE
595 | PCA200E_CTRL_2_CACHE_WRT_INVAL
596 #endif
597 | PCA200E_CTRL_LARGE_PCI_BURSTS;
598
599 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
600
601 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
602 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
603 this may impact the performances of other PCI devices on the same bus, though */
604 latency = 192;
605 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
606
607 fore200e->state = FORE200E_STATE_CONFIGURE;
608 return 0;
609 }
610
611
612 static int __init
613 fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
614 {
615 struct host_cmdq* cmdq = &fore200e->host_cmdq;
616 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
617 struct prom_opcode opcode;
618 int ok;
619 u32 prom_dma;
620
621 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
622
623 opcode.opcode = OPCODE_GET_PROM;
624 opcode.pad = 0;
625
626 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
627
628 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
629
630 *entry->status = STATUS_PENDING;
631
632 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
633
634 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
635
636 *entry->status = STATUS_FREE;
637
638 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
639
640 if (ok == 0) {
641 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
642 return -EIO;
643 }
644
645 #if defined(__BIG_ENDIAN)
646
647 #define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
648
649 /* MAC address is stored as little-endian */
650 swap_here(&prom->mac_addr[0]);
651 swap_here(&prom->mac_addr[4]);
652 #endif
653
654 return 0;
655 }
656
657
658 static int
659 fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
660 {
661 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
662
663 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
664 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
665 }
666
667 #endif /* CONFIG_PCI */
668
669
670 #ifdef CONFIG_SBUS
671
672 static u32 fore200e_sba_read(volatile u32 __iomem *addr)
673 {
674 return sbus_readl(addr);
675 }
676
677 static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
678 {
679 sbus_writel(val, addr);
680 }
681
682 static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction)
683 {
684 struct platform_device *op = fore200e->bus_dev;
685 u32 dma_addr;
686
687 dma_addr = dma_map_single(&op->dev, virt_addr, size, direction);
688
689 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
690 virt_addr, size, direction, dma_addr);
691
692 return dma_addr;
693 }
694
695 static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
696 {
697 struct platform_device *op = fore200e->bus_dev;
698
699 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
700 dma_addr, size, direction);
701
702 dma_unmap_single(&op->dev, dma_addr, size, direction);
703 }
704
705 static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
706 {
707 struct platform_device *op = fore200e->bus_dev;
708
709 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
710
711 dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction);
712 }
713
714 static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
715 {
716 struct platform_device *op = fore200e->bus_dev;
717
718 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
719
720 dma_sync_single_for_device(&op->dev, dma_addr, size, direction);
721 }
722
723 /* Allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
724 * (to hold descriptors, status, queues, etc.) shared by the driver and the adapter.
725 */
726 static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
727 int size, int nbr, int alignment)
728 {
729 struct platform_device *op = fore200e->bus_dev;
730
731 chunk->alloc_size = chunk->align_size = size * nbr;
732
733 /* returned chunks are page-aligned */
734 chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size,
735 &chunk->dma_addr, GFP_ATOMIC);
736
737 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
738 return -ENOMEM;
739
740 chunk->align_addr = chunk->alloc_addr;
741
742 return 0;
743 }
744
745 /* free a DVMA consistent chunk of memory */
746 static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk)
747 {
748 struct platform_device *op = fore200e->bus_dev;
749
750 dma_free_coherent(&op->dev, chunk->alloc_size,
751 chunk->alloc_addr, chunk->dma_addr);
752 }
753
754 static void fore200e_sba_irq_enable(struct fore200e *fore200e)
755 {
756 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
757 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
758 }
759
760 static int fore200e_sba_irq_check(struct fore200e *fore200e)
761 {
762 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
763 }
764
765 static void fore200e_sba_irq_ack(struct fore200e *fore200e)
766 {
767 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
768 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
769 }
770
771 static void fore200e_sba_reset(struct fore200e *fore200e)
772 {
773 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
774 fore200e_spin(10);
775 fore200e->bus->write(0, fore200e->regs.sba.hcr);
776 }
777
778 static int __init fore200e_sba_map(struct fore200e *fore200e)
779 {
780 struct platform_device *op = fore200e->bus_dev;
781 unsigned int bursts;
782
783 /* gain access to the SBA specific registers */
784 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
785 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
786 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
787 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
788
789 if (!fore200e->virt_base) {
790 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
791 return -EFAULT;
792 }
793
794 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
795
796 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
797
798 /* get the supported DVMA burst sizes */
799 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
800
801 if (sbus_can_dma_64bit())
802 sbus_set_sbus64(&op->dev, bursts);
803
804 fore200e->state = FORE200E_STATE_MAP;
805 return 0;
806 }
807
808 static void fore200e_sba_unmap(struct fore200e *fore200e)
809 {
810 struct platform_device *op = fore200e->bus_dev;
811
812 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
813 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
814 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
815 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
816 }
817
818 static int __init fore200e_sba_configure(struct fore200e *fore200e)
819 {
820 fore200e->state = FORE200E_STATE_CONFIGURE;
821 return 0;
822 }
823
824 static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
825 {
826 struct platform_device *op = fore200e->bus_dev;
827 const u8 *prop;
828 int len;
829
830 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
831 if (!prop)
832 return -ENODEV;
833 memcpy(&prom->mac_addr[4], prop, 4);
834
835 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
836 if (!prop)
837 return -ENODEV;
838 memcpy(&prom->mac_addr[2], prop, 4);
839
840 prom->serial_number = of_getintprop_default(op->dev.of_node,
841 "serialnumber", 0);
842 prom->hw_revision = of_getintprop_default(op->dev.of_node,
843 "promversion", 0);
844
845 return 0;
846 }
847
848 static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
849 {
850 struct platform_device *op = fore200e->bus_dev;
851 const struct linux_prom_registers *regs;
852
853 regs = of_get_property(op->dev.of_node, "reg", NULL);
854
855 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n",
856 (regs ? regs->which_io : 0), op->dev.of_node->name);
857 }
858 #endif /* CONFIG_SBUS */
859
860
861 static void
862 fore200e_tx_irq(struct fore200e* fore200e)
863 {
864 struct host_txq* txq = &fore200e->host_txq;
865 struct host_txq_entry* entry;
866 struct atm_vcc* vcc;
867 struct fore200e_vc_map* vc_map;
868
869 if (fore200e->host_txq.txing == 0)
870 return;
871
872 for (;;) {
873
874 entry = &txq->host_entry[ txq->tail ];
875
876 if ((*entry->status & STATUS_COMPLETE) == 0) {
877 break;
878 }
879
880 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
881 entry, txq->tail, entry->vc_map, entry->skb);
882
883 /* free copy of misaligned data */
884 kfree(entry->data);
885
886 /* remove DMA mapping */
887 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
888 DMA_TO_DEVICE);
889
890 vc_map = entry->vc_map;
891
892 /* vcc closed since the time the entry was submitted for tx? */
893 if ((vc_map->vcc == NULL) ||
894 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
895
896 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
897 fore200e->atm_dev->number);
898
899 dev_kfree_skb_any(entry->skb);
900 }
901 else {
902 ASSERT(vc_map->vcc);
903
904 /* vcc closed then immediately re-opened? */
905 if (vc_map->incarn != entry->incarn) {
906
907 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
908 if the same vcc is immediately re-opened, those pending PDUs must
909 not be popped after the completion of their emission, as they refer
910 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
911 would be decremented by the size of the (unrelated) skb, possibly
912 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
913 we thus bind the tx entry to the current incarnation of the vcc
914 when the entry is submitted for tx. When the tx later completes,
915 if the incarnation number of the tx entry does not match the one
916 of the vcc, then this implies that the vcc has been closed then re-opened.
917 we thus just drop the skb here. */
918
919 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
920 fore200e->atm_dev->number);
921
922 dev_kfree_skb_any(entry->skb);
923 }
924 else {
925 vcc = vc_map->vcc;
926 ASSERT(vcc);
927
928 /* notify tx completion */
929 if (vcc->pop) {
930 vcc->pop(vcc, entry->skb);
931 }
932 else {
933 dev_kfree_skb_any(entry->skb);
934 }
935
936 /* check error condition */
937 if (*entry->status & STATUS_ERROR)
938 atomic_inc(&vcc->stats->tx_err);
939 else
940 atomic_inc(&vcc->stats->tx);
941 }
942 }
943
944 *entry->status = STATUS_FREE;
945
946 fore200e->host_txq.txing--;
947
948 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
949 }
950 }
951
952
953 #ifdef FORE200E_BSQ_DEBUG
954 int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
955 {
956 struct buffer* buffer;
957 int count = 0;
958
959 buffer = bsq->freebuf;
960 while (buffer) {
961
962 if (buffer->supplied) {
963 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
964 where, scheme, magn, buffer->index);
965 }
966
967 if (buffer->magn != magn) {
968 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
969 where, scheme, magn, buffer->index, buffer->magn);
970 }
971
972 if (buffer->scheme != scheme) {
973 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
974 where, scheme, magn, buffer->index, buffer->scheme);
975 }
976
977 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
978 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
979 where, scheme, magn, buffer->index);
980 }
981
982 count++;
983 buffer = buffer->next;
984 }
985
986 if (count != bsq->freebuf_count) {
987 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
988 where, scheme, magn, count, bsq->freebuf_count);
989 }
990 return 0;
991 }
992 #endif
993
994
995 static void
996 fore200e_supply(struct fore200e* fore200e)
997 {
998 int scheme, magn, i;
999
1000 struct host_bsq* bsq;
1001 struct host_bsq_entry* entry;
1002 struct buffer* buffer;
1003
1004 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1005 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1006
1007 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1008
1009 #ifdef FORE200E_BSQ_DEBUG
1010 bsq_audit(1, bsq, scheme, magn);
1011 #endif
1012 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1013
1014 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1015 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1016
1017 entry = &bsq->host_entry[ bsq->head ];
1018
1019 for (i = 0; i < RBD_BLK_SIZE; i++) {
1020
1021 /* take the first buffer in the free buffer list */
1022 buffer = bsq->freebuf;
1023 if (!buffer) {
1024 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1025 scheme, magn, bsq->freebuf_count);
1026 return;
1027 }
1028 bsq->freebuf = buffer->next;
1029
1030 #ifdef FORE200E_BSQ_DEBUG
1031 if (buffer->supplied)
1032 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1033 scheme, magn, buffer->index);
1034 buffer->supplied = 1;
1035 #endif
1036 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1037 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1038 }
1039
1040 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1041
1042 /* decrease accordingly the number of free rx buffers */
1043 bsq->freebuf_count -= RBD_BLK_SIZE;
1044
1045 *entry->status = STATUS_PENDING;
1046 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1047 }
1048 }
1049 }
1050 }
1051
1052
1053 static int
1054 fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1055 {
1056 struct sk_buff* skb;
1057 struct buffer* buffer;
1058 struct fore200e_vcc* fore200e_vcc;
1059 int i, pdu_len = 0;
1060 #ifdef FORE200E_52BYTE_AAL0_SDU
1061 u32 cell_header = 0;
1062 #endif
1063
1064 ASSERT(vcc);
1065
1066 fore200e_vcc = FORE200E_VCC(vcc);
1067 ASSERT(fore200e_vcc);
1068
1069 #ifdef FORE200E_52BYTE_AAL0_SDU
1070 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1071
1072 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1073 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1074 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1075 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1076 rpd->atm_header.clp;
1077 pdu_len = 4;
1078 }
1079 #endif
1080
1081 /* compute total PDU length */
1082 for (i = 0; i < rpd->nseg; i++)
1083 pdu_len += rpd->rsd[ i ].length;
1084
1085 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1086 if (skb == NULL) {
1087 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1088
1089 atomic_inc(&vcc->stats->rx_drop);
1090 return -ENOMEM;
1091 }
1092
1093 __net_timestamp(skb);
1094
1095 #ifdef FORE200E_52BYTE_AAL0_SDU
1096 if (cell_header) {
1097 *((u32*)skb_put(skb, 4)) = cell_header;
1098 }
1099 #endif
1100
1101 /* reassemble segments */
1102 for (i = 0; i < rpd->nseg; i++) {
1103
1104 /* rebuild rx buffer address from rsd handle */
1105 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1106
1107 /* Make device DMA transfer visible to CPU. */
1108 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1109
1110 skb_put_data(skb, buffer->data.align_addr, rpd->rsd[i].length);
1111
1112 /* Now let the device get at it again. */
1113 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1114 }
1115
1116 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1117
1118 if (pdu_len < fore200e_vcc->rx_min_pdu)
1119 fore200e_vcc->rx_min_pdu = pdu_len;
1120 if (pdu_len > fore200e_vcc->rx_max_pdu)
1121 fore200e_vcc->rx_max_pdu = pdu_len;
1122 fore200e_vcc->rx_pdu++;
1123
1124 /* push PDU */
1125 if (atm_charge(vcc, skb->truesize) == 0) {
1126
1127 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1128 vcc->itf, vcc->vpi, vcc->vci);
1129
1130 dev_kfree_skb_any(skb);
1131
1132 atomic_inc(&vcc->stats->rx_drop);
1133 return -ENOMEM;
1134 }
1135
1136 vcc->push(vcc, skb);
1137 atomic_inc(&vcc->stats->rx);
1138
1139 return 0;
1140 }
1141
1142
1143 static void
1144 fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1145 {
1146 struct host_bsq* bsq;
1147 struct buffer* buffer;
1148 int i;
1149
1150 for (i = 0; i < rpd->nseg; i++) {
1151
1152 /* rebuild rx buffer address from rsd handle */
1153 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1154
1155 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1156
1157 #ifdef FORE200E_BSQ_DEBUG
1158 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1159
1160 if (buffer->supplied == 0)
1161 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1162 buffer->scheme, buffer->magn, buffer->index);
1163 buffer->supplied = 0;
1164 #endif
1165
1166 /* re-insert the buffer into the free buffer list */
1167 buffer->next = bsq->freebuf;
1168 bsq->freebuf = buffer;
1169
1170 /* then increment the number of free rx buffers */
1171 bsq->freebuf_count++;
1172 }
1173 }
1174
1175
1176 static void
1177 fore200e_rx_irq(struct fore200e* fore200e)
1178 {
1179 struct host_rxq* rxq = &fore200e->host_rxq;
1180 struct host_rxq_entry* entry;
1181 struct atm_vcc* vcc;
1182 struct fore200e_vc_map* vc_map;
1183
1184 for (;;) {
1185
1186 entry = &rxq->host_entry[ rxq->head ];
1187
1188 /* no more received PDUs */
1189 if ((*entry->status & STATUS_COMPLETE) == 0)
1190 break;
1191
1192 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1193
1194 if ((vc_map->vcc == NULL) ||
1195 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1196
1197 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1198 fore200e->atm_dev->number,
1199 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1200 }
1201 else {
1202 vcc = vc_map->vcc;
1203 ASSERT(vcc);
1204
1205 if ((*entry->status & STATUS_ERROR) == 0) {
1206
1207 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1208 }
1209 else {
1210 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1211 fore200e->atm_dev->number,
1212 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1213 atomic_inc(&vcc->stats->rx_err);
1214 }
1215 }
1216
1217 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1218
1219 fore200e_collect_rpd(fore200e, entry->rpd);
1220
1221 /* rewrite the rpd address to ack the received PDU */
1222 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1223 *entry->status = STATUS_FREE;
1224
1225 fore200e_supply(fore200e);
1226 }
1227 }
1228
1229
1230 #ifndef FORE200E_USE_TASKLET
1231 static void
1232 fore200e_irq(struct fore200e* fore200e)
1233 {
1234 unsigned long flags;
1235
1236 spin_lock_irqsave(&fore200e->q_lock, flags);
1237 fore200e_rx_irq(fore200e);
1238 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1239
1240 spin_lock_irqsave(&fore200e->q_lock, flags);
1241 fore200e_tx_irq(fore200e);
1242 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1243 }
1244 #endif
1245
1246
1247 static irqreturn_t
1248 fore200e_interrupt(int irq, void* dev)
1249 {
1250 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1251
1252 if (fore200e->bus->irq_check(fore200e) == 0) {
1253
1254 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1255 return IRQ_NONE;
1256 }
1257 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1258
1259 #ifdef FORE200E_USE_TASKLET
1260 tasklet_schedule(&fore200e->tx_tasklet);
1261 tasklet_schedule(&fore200e->rx_tasklet);
1262 #else
1263 fore200e_irq(fore200e);
1264 #endif
1265
1266 fore200e->bus->irq_ack(fore200e);
1267 return IRQ_HANDLED;
1268 }
1269
1270
1271 #ifdef FORE200E_USE_TASKLET
1272 static void
1273 fore200e_tx_tasklet(unsigned long data)
1274 {
1275 struct fore200e* fore200e = (struct fore200e*) data;
1276 unsigned long flags;
1277
1278 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1279
1280 spin_lock_irqsave(&fore200e->q_lock, flags);
1281 fore200e_tx_irq(fore200e);
1282 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1283 }
1284
1285
1286 static void
1287 fore200e_rx_tasklet(unsigned long data)
1288 {
1289 struct fore200e* fore200e = (struct fore200e*) data;
1290 unsigned long flags;
1291
1292 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1293
1294 spin_lock_irqsave(&fore200e->q_lock, flags);
1295 fore200e_rx_irq((struct fore200e*) data);
1296 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1297 }
1298 #endif
1299
1300
1301 static int
1302 fore200e_select_scheme(struct atm_vcc* vcc)
1303 {
1304 /* fairly balance the VCs over (identical) buffer schemes */
1305 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1306
1307 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1308 vcc->itf, vcc->vpi, vcc->vci, scheme);
1309
1310 return scheme;
1311 }
1312
1313
1314 static int
1315 fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1316 {
1317 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1318 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1319 struct activate_opcode activ_opcode;
1320 struct deactivate_opcode deactiv_opcode;
1321 struct vpvc vpvc;
1322 int ok;
1323 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1324
1325 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1326
1327 if (activate) {
1328 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1329
1330 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1331 activ_opcode.aal = aal;
1332 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1333 activ_opcode.pad = 0;
1334 }
1335 else {
1336 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1337 deactiv_opcode.pad = 0;
1338 }
1339
1340 vpvc.vci = vcc->vci;
1341 vpvc.vpi = vcc->vpi;
1342
1343 *entry->status = STATUS_PENDING;
1344
1345 if (activate) {
1346
1347 #ifdef FORE200E_52BYTE_AAL0_SDU
1348 mtu = 48;
1349 #endif
1350 /* the MTU is not used by the cp, except in the case of AAL0 */
1351 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1352 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1353 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1354 }
1355 else {
1356 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1357 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1358 }
1359
1360 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1361
1362 *entry->status = STATUS_FREE;
1363
1364 if (ok == 0) {
1365 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1366 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1367 return -EIO;
1368 }
1369
1370 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1371 activate ? "open" : "clos");
1372
1373 return 0;
1374 }
1375
1376
1377 #define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1378
1379 static void
1380 fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1381 {
1382 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1383
1384 /* compute the data cells to idle cells ratio from the tx PCR */
1385 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1386 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1387 }
1388 else {
1389 /* disable rate control */
1390 rate->data_cells = rate->idle_cells = 0;
1391 }
1392 }
1393
1394
1395 static int
1396 fore200e_open(struct atm_vcc *vcc)
1397 {
1398 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1399 struct fore200e_vcc* fore200e_vcc;
1400 struct fore200e_vc_map* vc_map;
1401 unsigned long flags;
1402 int vci = vcc->vci;
1403 short vpi = vcc->vpi;
1404
1405 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1406 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1407
1408 spin_lock_irqsave(&fore200e->q_lock, flags);
1409
1410 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1411 if (vc_map->vcc) {
1412
1413 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1414
1415 printk(FORE200E "VC %d.%d.%d already in use\n",
1416 fore200e->atm_dev->number, vpi, vci);
1417
1418 return -EINVAL;
1419 }
1420
1421 vc_map->vcc = vcc;
1422
1423 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1424
1425 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1426 if (fore200e_vcc == NULL) {
1427 vc_map->vcc = NULL;
1428 return -ENOMEM;
1429 }
1430
1431 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1432 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1433 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1434 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1435 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1436 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1437 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1438
1439 /* pseudo-CBR bandwidth requested? */
1440 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1441
1442 mutex_lock(&fore200e->rate_mtx);
1443 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1444 mutex_unlock(&fore200e->rate_mtx);
1445
1446 kfree(fore200e_vcc);
1447 vc_map->vcc = NULL;
1448 return -EAGAIN;
1449 }
1450
1451 /* reserve bandwidth */
1452 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1453 mutex_unlock(&fore200e->rate_mtx);
1454 }
1455
1456 vcc->itf = vcc->dev->number;
1457
1458 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1459 set_bit(ATM_VF_ADDR, &vcc->flags);
1460
1461 vcc->dev_data = fore200e_vcc;
1462
1463 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1464
1465 vc_map->vcc = NULL;
1466
1467 clear_bit(ATM_VF_ADDR, &vcc->flags);
1468 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1469
1470 vcc->dev_data = NULL;
1471
1472 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1473
1474 kfree(fore200e_vcc);
1475 return -EINVAL;
1476 }
1477
1478 /* compute rate control parameters */
1479 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1480
1481 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1482 set_bit(ATM_VF_HASQOS, &vcc->flags);
1483
1484 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1485 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1486 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1487 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1488 }
1489
1490 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1491 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1492 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1493
1494 /* new incarnation of the vcc */
1495 vc_map->incarn = ++fore200e->incarn_count;
1496
1497 /* VC unusable before this flag is set */
1498 set_bit(ATM_VF_READY, &vcc->flags);
1499
1500 return 0;
1501 }
1502
1503
1504 static void
1505 fore200e_close(struct atm_vcc* vcc)
1506 {
1507 struct fore200e_vcc* fore200e_vcc;
1508 struct fore200e* fore200e;
1509 struct fore200e_vc_map* vc_map;
1510 unsigned long flags;
1511
1512 ASSERT(vcc);
1513 fore200e = FORE200E_DEV(vcc->dev);
1514
1515 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1516 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1517
1518 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1519
1520 clear_bit(ATM_VF_READY, &vcc->flags);
1521
1522 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1523
1524 spin_lock_irqsave(&fore200e->q_lock, flags);
1525
1526 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1527
1528 /* the vc is no longer considered as "in use" by fore200e_open() */
1529 vc_map->vcc = NULL;
1530
1531 vcc->itf = vcc->vci = vcc->vpi = 0;
1532
1533 fore200e_vcc = FORE200E_VCC(vcc);
1534 vcc->dev_data = NULL;
1535
1536 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1537
1538 /* release reserved bandwidth, if any */
1539 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1540
1541 mutex_lock(&fore200e->rate_mtx);
1542 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1543 mutex_unlock(&fore200e->rate_mtx);
1544
1545 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1546 }
1547
1548 clear_bit(ATM_VF_ADDR, &vcc->flags);
1549 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1550
1551 ASSERT(fore200e_vcc);
1552 kfree(fore200e_vcc);
1553 }
1554
1555
1556 static int
1557 fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1558 {
1559 struct fore200e* fore200e;
1560 struct fore200e_vcc* fore200e_vcc;
1561 struct fore200e_vc_map* vc_map;
1562 struct host_txq* txq;
1563 struct host_txq_entry* entry;
1564 struct tpd* tpd;
1565 struct tpd_haddr tpd_haddr;
1566 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1567 int tx_copy = 0;
1568 int tx_len = skb->len;
1569 u32* cell_header = NULL;
1570 unsigned char* skb_data;
1571 int skb_len;
1572 unsigned char* data;
1573 unsigned long flags;
1574
1575 if (!vcc)
1576 return -EINVAL;
1577
1578 fore200e = FORE200E_DEV(vcc->dev);
1579 fore200e_vcc = FORE200E_VCC(vcc);
1580
1581 if (!fore200e)
1582 return -EINVAL;
1583
1584 txq = &fore200e->host_txq;
1585 if (!fore200e_vcc)
1586 return -EINVAL;
1587
1588 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1589 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1590 dev_kfree_skb_any(skb);
1591 return -EINVAL;
1592 }
1593
1594 #ifdef FORE200E_52BYTE_AAL0_SDU
1595 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1596 cell_header = (u32*) skb->data;
1597 skb_data = skb->data + 4; /* skip 4-byte cell header */
1598 skb_len = tx_len = skb->len - 4;
1599
1600 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1601 }
1602 else
1603 #endif
1604 {
1605 skb_data = skb->data;
1606 skb_len = skb->len;
1607 }
1608
1609 if (((unsigned long)skb_data) & 0x3) {
1610
1611 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1612 tx_copy = 1;
1613 tx_len = skb_len;
1614 }
1615
1616 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1617
1618 /* this simply NUKES the PCA board */
1619 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1620 tx_copy = 1;
1621 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1622 }
1623
1624 if (tx_copy) {
1625 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1626 if (data == NULL) {
1627 if (vcc->pop) {
1628 vcc->pop(vcc, skb);
1629 }
1630 else {
1631 dev_kfree_skb_any(skb);
1632 }
1633 return -ENOMEM;
1634 }
1635
1636 memcpy(data, skb_data, skb_len);
1637 if (skb_len < tx_len)
1638 memset(data + skb_len, 0x00, tx_len - skb_len);
1639 }
1640 else {
1641 data = skb_data;
1642 }
1643
1644 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1645 ASSERT(vc_map->vcc == vcc);
1646
1647 retry_here:
1648
1649 spin_lock_irqsave(&fore200e->q_lock, flags);
1650
1651 entry = &txq->host_entry[ txq->head ];
1652
1653 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1654
1655 /* try to free completed tx queue entries */
1656 fore200e_tx_irq(fore200e);
1657
1658 if (*entry->status != STATUS_FREE) {
1659
1660 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1661
1662 /* retry once again? */
1663 if (--retry > 0) {
1664 udelay(50);
1665 goto retry_here;
1666 }
1667
1668 atomic_inc(&vcc->stats->tx_err);
1669
1670 fore200e->tx_sat++;
1671 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1672 fore200e->name, fore200e->cp_queues->heartbeat);
1673 if (vcc->pop) {
1674 vcc->pop(vcc, skb);
1675 }
1676 else {
1677 dev_kfree_skb_any(skb);
1678 }
1679
1680 if (tx_copy)
1681 kfree(data);
1682
1683 return -ENOBUFS;
1684 }
1685 }
1686
1687 entry->incarn = vc_map->incarn;
1688 entry->vc_map = vc_map;
1689 entry->skb = skb;
1690 entry->data = tx_copy ? data : NULL;
1691
1692 tpd = entry->tpd;
1693 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
1694 tpd->tsd[ 0 ].length = tx_len;
1695
1696 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1697 txq->txing++;
1698
1699 /* The dma_map call above implies a dma_sync so the device can use it,
1700 * thus no explicit dma_sync call is necessary here.
1701 */
1702
1703 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1704 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1705 tpd->tsd[0].length, skb_len);
1706
1707 if (skb_len < fore200e_vcc->tx_min_pdu)
1708 fore200e_vcc->tx_min_pdu = skb_len;
1709 if (skb_len > fore200e_vcc->tx_max_pdu)
1710 fore200e_vcc->tx_max_pdu = skb_len;
1711 fore200e_vcc->tx_pdu++;
1712
1713 /* set tx rate control information */
1714 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1715 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1716
1717 if (cell_header) {
1718 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1719 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1720 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1721 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1722 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1723 }
1724 else {
1725 /* set the ATM header, common to all cells conveying the PDU */
1726 tpd->atm_header.clp = 0;
1727 tpd->atm_header.plt = 0;
1728 tpd->atm_header.vci = vcc->vci;
1729 tpd->atm_header.vpi = vcc->vpi;
1730 tpd->atm_header.gfc = 0;
1731 }
1732
1733 tpd->spec.length = tx_len;
1734 tpd->spec.nseg = 1;
1735 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1736 tpd->spec.intr = 1;
1737
1738 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1739 tpd_haddr.pad = 0;
1740 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1741
1742 *entry->status = STATUS_PENDING;
1743 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1744
1745 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1746
1747 return 0;
1748 }
1749
1750
1751 static int
1752 fore200e_getstats(struct fore200e* fore200e)
1753 {
1754 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1755 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1756 struct stats_opcode opcode;
1757 int ok;
1758 u32 stats_dma_addr;
1759
1760 if (fore200e->stats == NULL) {
1761 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1762 if (fore200e->stats == NULL)
1763 return -ENOMEM;
1764 }
1765
1766 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1767 sizeof(struct stats), DMA_FROM_DEVICE);
1768
1769 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1770
1771 opcode.opcode = OPCODE_GET_STATS;
1772 opcode.pad = 0;
1773
1774 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1775
1776 *entry->status = STATUS_PENDING;
1777
1778 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1779
1780 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1781
1782 *entry->status = STATUS_FREE;
1783
1784 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1785
1786 if (ok == 0) {
1787 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1788 return -EIO;
1789 }
1790
1791 return 0;
1792 }
1793
1794
1795 static int
1796 fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1797 {
1798 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1799
1800 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1801 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1802
1803 return -EINVAL;
1804 }
1805
1806
1807 static int
1808 fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen)
1809 {
1810 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1811
1812 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1813 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1814
1815 return -EINVAL;
1816 }
1817
1818
1819 #if 0 /* currently unused */
1820 static int
1821 fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1822 {
1823 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1824 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1825 struct oc3_opcode opcode;
1826 int ok;
1827 u32 oc3_regs_dma_addr;
1828
1829 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1830
1831 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1832
1833 opcode.opcode = OPCODE_GET_OC3;
1834 opcode.reg = 0;
1835 opcode.value = 0;
1836 opcode.mask = 0;
1837
1838 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1839
1840 *entry->status = STATUS_PENDING;
1841
1842 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1843
1844 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1845
1846 *entry->status = STATUS_FREE;
1847
1848 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1849
1850 if (ok == 0) {
1851 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1852 return -EIO;
1853 }
1854
1855 return 0;
1856 }
1857 #endif
1858
1859
1860 static int
1861 fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1862 {
1863 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1864 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1865 struct oc3_opcode opcode;
1866 int ok;
1867
1868 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1869
1870 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1871
1872 opcode.opcode = OPCODE_SET_OC3;
1873 opcode.reg = reg;
1874 opcode.value = value;
1875 opcode.mask = mask;
1876
1877 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1878
1879 *entry->status = STATUS_PENDING;
1880
1881 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1882
1883 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1884
1885 *entry->status = STATUS_FREE;
1886
1887 if (ok == 0) {
1888 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1889 return -EIO;
1890 }
1891
1892 return 0;
1893 }
1894
1895
1896 static int
1897 fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1898 {
1899 u32 mct_value, mct_mask;
1900 int error;
1901
1902 if (!capable(CAP_NET_ADMIN))
1903 return -EPERM;
1904
1905 switch (loop_mode) {
1906
1907 case ATM_LM_NONE:
1908 mct_value = 0;
1909 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1910 break;
1911
1912 case ATM_LM_LOC_PHY:
1913 mct_value = mct_mask = SUNI_MCT_DLE;
1914 break;
1915
1916 case ATM_LM_RMT_PHY:
1917 mct_value = mct_mask = SUNI_MCT_LLE;
1918 break;
1919
1920 default:
1921 return -EINVAL;
1922 }
1923
1924 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1925 if (error == 0)
1926 fore200e->loop_mode = loop_mode;
1927
1928 return error;
1929 }
1930
1931
1932 static int
1933 fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1934 {
1935 struct sonet_stats tmp;
1936
1937 if (fore200e_getstats(fore200e) < 0)
1938 return -EIO;
1939
1940 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1941 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1942 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1943 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1944 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1945 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1946 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1947 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1948 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1949 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1950 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1951 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1952 be32_to_cpu(fore200e->stats->aal5.cells_received);
1953
1954 if (arg)
1955 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1956
1957 return 0;
1958 }
1959
1960
1961 static int
1962 fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1963 {
1964 struct fore200e* fore200e = FORE200E_DEV(dev);
1965
1966 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1967
1968 switch (cmd) {
1969
1970 case SONET_GETSTAT:
1971 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1972
1973 case SONET_GETDIAG:
1974 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1975
1976 case ATM_SETLOOP:
1977 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1978
1979 case ATM_GETLOOP:
1980 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1981
1982 case ATM_QUERYLOOP:
1983 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1984 }
1985
1986 return -ENOSYS; /* not implemented */
1987 }
1988
1989
1990 static int
1991 fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1992 {
1993 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1994 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1995
1996 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1997 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1998 return -EINVAL;
1999 }
2000
2001 DPRINTK(2, "change_qos %d.%d.%d, "
2002 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
2003 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
2004 "available_cell_rate = %u",
2005 vcc->itf, vcc->vpi, vcc->vci,
2006 fore200e_traffic_class[ qos->txtp.traffic_class ],
2007 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
2008 fore200e_traffic_class[ qos->rxtp.traffic_class ],
2009 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
2010 flags, fore200e->available_cell_rate);
2011
2012 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2013
2014 mutex_lock(&fore200e->rate_mtx);
2015 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2016 mutex_unlock(&fore200e->rate_mtx);
2017 return -EAGAIN;
2018 }
2019
2020 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2021 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2022
2023 mutex_unlock(&fore200e->rate_mtx);
2024
2025 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2026
2027 /* update rate control parameters */
2028 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2029
2030 set_bit(ATM_VF_HASQOS, &vcc->flags);
2031
2032 return 0;
2033 }
2034
2035 return -EINVAL;
2036 }
2037
2038
2039 static int fore200e_irq_request(struct fore200e *fore200e)
2040 {
2041 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
2042
2043 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2044 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2045 return -EBUSY;
2046 }
2047
2048 printk(FORE200E "IRQ %s reserved for device %s\n",
2049 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2050
2051 #ifdef FORE200E_USE_TASKLET
2052 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2053 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2054 #endif
2055
2056 fore200e->state = FORE200E_STATE_IRQ;
2057 return 0;
2058 }
2059
2060
2061 static int fore200e_get_esi(struct fore200e *fore200e)
2062 {
2063 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2064 int ok, i;
2065
2066 if (!prom)
2067 return -ENOMEM;
2068
2069 ok = fore200e->bus->prom_read(fore200e, prom);
2070 if (ok < 0) {
2071 kfree(prom);
2072 return -EBUSY;
2073 }
2074
2075 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
2076 fore200e->name,
2077 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2078 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
2079
2080 for (i = 0; i < ESI_LEN; i++) {
2081 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2082 }
2083
2084 kfree(prom);
2085
2086 return 0;
2087 }
2088
2089
2090 static int fore200e_alloc_rx_buf(struct fore200e *fore200e)
2091 {
2092 int scheme, magn, nbr, size, i;
2093
2094 struct host_bsq* bsq;
2095 struct buffer* buffer;
2096
2097 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2098 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2099
2100 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2101
2102 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2103 size = fore200e_rx_buf_size[ scheme ][ magn ];
2104
2105 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2106
2107 /* allocate the array of receive buffers */
2108 buffer = bsq->buffer = kcalloc(nbr, sizeof(struct buffer),
2109 GFP_KERNEL);
2110
2111 if (buffer == NULL)
2112 return -ENOMEM;
2113
2114 bsq->freebuf = NULL;
2115
2116 for (i = 0; i < nbr; i++) {
2117
2118 buffer[ i ].scheme = scheme;
2119 buffer[ i ].magn = magn;
2120 #ifdef FORE200E_BSQ_DEBUG
2121 buffer[ i ].index = i;
2122 buffer[ i ].supplied = 0;
2123 #endif
2124
2125 /* allocate the receive buffer body */
2126 if (fore200e_chunk_alloc(fore200e,
2127 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2128 DMA_FROM_DEVICE) < 0) {
2129
2130 while (i > 0)
2131 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2132 kfree(buffer);
2133
2134 return -ENOMEM;
2135 }
2136
2137 /* insert the buffer into the free buffer list */
2138 buffer[ i ].next = bsq->freebuf;
2139 bsq->freebuf = &buffer[ i ];
2140 }
2141 /* all the buffers are free, initially */
2142 bsq->freebuf_count = nbr;
2143
2144 #ifdef FORE200E_BSQ_DEBUG
2145 bsq_audit(3, bsq, scheme, magn);
2146 #endif
2147 }
2148 }
2149
2150 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2151 return 0;
2152 }
2153
2154
2155 static int fore200e_init_bs_queue(struct fore200e *fore200e)
2156 {
2157 int scheme, magn, i;
2158
2159 struct host_bsq* bsq;
2160 struct cp_bsq_entry __iomem * cp_entry;
2161
2162 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2163 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2164
2165 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2166
2167 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2168
2169 /* allocate and align the array of status words */
2170 if (fore200e->bus->dma_chunk_alloc(fore200e,
2171 &bsq->status,
2172 sizeof(enum status),
2173 QUEUE_SIZE_BS,
2174 fore200e->bus->status_alignment) < 0) {
2175 return -ENOMEM;
2176 }
2177
2178 /* allocate and align the array of receive buffer descriptors */
2179 if (fore200e->bus->dma_chunk_alloc(fore200e,
2180 &bsq->rbd_block,
2181 sizeof(struct rbd_block),
2182 QUEUE_SIZE_BS,
2183 fore200e->bus->descr_alignment) < 0) {
2184
2185 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2186 return -ENOMEM;
2187 }
2188
2189 /* get the base address of the cp resident buffer supply queue entries */
2190 cp_entry = fore200e->virt_base +
2191 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2192
2193 /* fill the host resident and cp resident buffer supply queue entries */
2194 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2195
2196 bsq->host_entry[ i ].status =
2197 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2198 bsq->host_entry[ i ].rbd_block =
2199 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2200 bsq->host_entry[ i ].rbd_block_dma =
2201 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2202 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2203
2204 *bsq->host_entry[ i ].status = STATUS_FREE;
2205
2206 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2207 &cp_entry[ i ].status_haddr);
2208 }
2209 }
2210 }
2211
2212 fore200e->state = FORE200E_STATE_INIT_BSQ;
2213 return 0;
2214 }
2215
2216
2217 static int fore200e_init_rx_queue(struct fore200e *fore200e)
2218 {
2219 struct host_rxq* rxq = &fore200e->host_rxq;
2220 struct cp_rxq_entry __iomem * cp_entry;
2221 int i;
2222
2223 DPRINTK(2, "receive queue is being initialized\n");
2224
2225 /* allocate and align the array of status words */
2226 if (fore200e->bus->dma_chunk_alloc(fore200e,
2227 &rxq->status,
2228 sizeof(enum status),
2229 QUEUE_SIZE_RX,
2230 fore200e->bus->status_alignment) < 0) {
2231 return -ENOMEM;
2232 }
2233
2234 /* allocate and align the array of receive PDU descriptors */
2235 if (fore200e->bus->dma_chunk_alloc(fore200e,
2236 &rxq->rpd,
2237 sizeof(struct rpd),
2238 QUEUE_SIZE_RX,
2239 fore200e->bus->descr_alignment) < 0) {
2240
2241 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2242 return -ENOMEM;
2243 }
2244
2245 /* get the base address of the cp resident rx queue entries */
2246 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2247
2248 /* fill the host resident and cp resident rx entries */
2249 for (i=0; i < QUEUE_SIZE_RX; i++) {
2250
2251 rxq->host_entry[ i ].status =
2252 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2253 rxq->host_entry[ i ].rpd =
2254 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2255 rxq->host_entry[ i ].rpd_dma =
2256 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2257 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2258
2259 *rxq->host_entry[ i ].status = STATUS_FREE;
2260
2261 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2262 &cp_entry[ i ].status_haddr);
2263
2264 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2265 &cp_entry[ i ].rpd_haddr);
2266 }
2267
2268 /* set the head entry of the queue */
2269 rxq->head = 0;
2270
2271 fore200e->state = FORE200E_STATE_INIT_RXQ;
2272 return 0;
2273 }
2274
2275
2276 static int fore200e_init_tx_queue(struct fore200e *fore200e)
2277 {
2278 struct host_txq* txq = &fore200e->host_txq;
2279 struct cp_txq_entry __iomem * cp_entry;
2280 int i;
2281
2282 DPRINTK(2, "transmit queue is being initialized\n");
2283
2284 /* allocate and align the array of status words */
2285 if (fore200e->bus->dma_chunk_alloc(fore200e,
2286 &txq->status,
2287 sizeof(enum status),
2288 QUEUE_SIZE_TX,
2289 fore200e->bus->status_alignment) < 0) {
2290 return -ENOMEM;
2291 }
2292
2293 /* allocate and align the array of transmit PDU descriptors */
2294 if (fore200e->bus->dma_chunk_alloc(fore200e,
2295 &txq->tpd,
2296 sizeof(struct tpd),
2297 QUEUE_SIZE_TX,
2298 fore200e->bus->descr_alignment) < 0) {
2299
2300 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2301 return -ENOMEM;
2302 }
2303
2304 /* get the base address of the cp resident tx queue entries */
2305 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2306
2307 /* fill the host resident and cp resident tx entries */
2308 for (i=0; i < QUEUE_SIZE_TX; i++) {
2309
2310 txq->host_entry[ i ].status =
2311 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2312 txq->host_entry[ i ].tpd =
2313 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2314 txq->host_entry[ i ].tpd_dma =
2315 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2316 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2317
2318 *txq->host_entry[ i ].status = STATUS_FREE;
2319
2320 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2321 &cp_entry[ i ].status_haddr);
2322
2323 /* although there is a one-to-one mapping of tx queue entries and tpds,
2324 we do not write here the DMA (physical) base address of each tpd into
2325 the related cp resident entry, because the cp relies on this write
2326 operation to detect that a new pdu has been submitted for tx */
2327 }
2328
2329 /* set the head and tail entries of the queue */
2330 txq->head = 0;
2331 txq->tail = 0;
2332
2333 fore200e->state = FORE200E_STATE_INIT_TXQ;
2334 return 0;
2335 }
2336
2337
2338 static int fore200e_init_cmd_queue(struct fore200e *fore200e)
2339 {
2340 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2341 struct cp_cmdq_entry __iomem * cp_entry;
2342 int i;
2343
2344 DPRINTK(2, "command queue is being initialized\n");
2345
2346 /* allocate and align the array of status words */
2347 if (fore200e->bus->dma_chunk_alloc(fore200e,
2348 &cmdq->status,
2349 sizeof(enum status),
2350 QUEUE_SIZE_CMD,
2351 fore200e->bus->status_alignment) < 0) {
2352 return -ENOMEM;
2353 }
2354
2355 /* get the base address of the cp resident cmd queue entries */
2356 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2357
2358 /* fill the host resident and cp resident cmd entries */
2359 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2360
2361 cmdq->host_entry[ i ].status =
2362 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2363 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2364
2365 *cmdq->host_entry[ i ].status = STATUS_FREE;
2366
2367 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2368 &cp_entry[ i ].status_haddr);
2369 }
2370
2371 /* set the head entry of the queue */
2372 cmdq->head = 0;
2373
2374 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2375 return 0;
2376 }
2377
2378
2379 static void fore200e_param_bs_queue(struct fore200e *fore200e,
2380 enum buffer_scheme scheme,
2381 enum buffer_magn magn, int queue_length,
2382 int pool_size, int supply_blksize)
2383 {
2384 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2385
2386 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2387 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2388 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2389 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2390 }
2391
2392
2393 static int fore200e_initialize(struct fore200e *fore200e)
2394 {
2395 struct cp_queues __iomem * cpq;
2396 int ok, scheme, magn;
2397
2398 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2399
2400 mutex_init(&fore200e->rate_mtx);
2401 spin_lock_init(&fore200e->q_lock);
2402
2403 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2404
2405 /* enable cp to host interrupts */
2406 fore200e->bus->write(1, &cpq->imask);
2407
2408 if (fore200e->bus->irq_enable)
2409 fore200e->bus->irq_enable(fore200e);
2410
2411 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2412
2413 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2414 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2415 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2416
2417 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2418 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2419
2420 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2421 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2422 fore200e_param_bs_queue(fore200e, scheme, magn,
2423 QUEUE_SIZE_BS,
2424 fore200e_rx_buf_nbr[ scheme ][ magn ],
2425 RBD_BLK_SIZE);
2426
2427 /* issue the initialize command */
2428 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2429 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2430
2431 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2432 if (ok == 0) {
2433 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2434 return -ENODEV;
2435 }
2436
2437 printk(FORE200E "device %s initialized\n", fore200e->name);
2438
2439 fore200e->state = FORE200E_STATE_INITIALIZE;
2440 return 0;
2441 }
2442
2443
2444 static void fore200e_monitor_putc(struct fore200e *fore200e, char c)
2445 {
2446 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2447
2448 #if 0
2449 printk("%c", c);
2450 #endif
2451 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2452 }
2453
2454
2455 static int fore200e_monitor_getc(struct fore200e *fore200e)
2456 {
2457 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2458 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2459 int c;
2460
2461 while (time_before(jiffies, timeout)) {
2462
2463 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2464
2465 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2466
2467 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2468 #if 0
2469 printk("%c", c & 0xFF);
2470 #endif
2471 return c & 0xFF;
2472 }
2473 }
2474
2475 return -1;
2476 }
2477
2478
2479 static void fore200e_monitor_puts(struct fore200e *fore200e, char *str)
2480 {
2481 while (*str) {
2482
2483 /* the i960 monitor doesn't accept any new character if it has something to say */
2484 while (fore200e_monitor_getc(fore200e) >= 0);
2485
2486 fore200e_monitor_putc(fore200e, *str++);
2487 }
2488
2489 while (fore200e_monitor_getc(fore200e) >= 0);
2490 }
2491
2492 #ifdef __LITTLE_ENDIAN
2493 #define FW_EXT ".bin"
2494 #else
2495 #define FW_EXT "_ecd.bin2"
2496 #endif
2497
2498 static int fore200e_load_and_start_fw(struct fore200e *fore200e)
2499 {
2500 const struct firmware *firmware;
2501 struct device *device;
2502 const struct fw_header *fw_header;
2503 const __le32 *fw_data;
2504 u32 fw_size;
2505 u32 __iomem *load_addr;
2506 char buf[48];
2507 int err = -ENODEV;
2508
2509 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
2510 device = &((struct pci_dev *) fore200e->bus_dev)->dev;
2511 #ifdef CONFIG_SBUS
2512 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
2513 device = &((struct platform_device *) fore200e->bus_dev)->dev;
2514 #endif
2515 else
2516 return err;
2517
2518 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2519 if ((err = request_firmware(&firmware, buf, device)) < 0) {
2520 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2521 return err;
2522 }
2523
2524 fw_data = (const __le32 *)firmware->data;
2525 fw_size = firmware->size / sizeof(u32);
2526 fw_header = (const struct fw_header *)firmware->data;
2527 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2528
2529 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2530 fore200e->name, load_addr, fw_size);
2531
2532 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2533 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2534 goto release;
2535 }
2536
2537 for (; fw_size--; fw_data++, load_addr++)
2538 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2539
2540 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2541
2542 #if defined(__sparc_v9__)
2543 /* reported to be required by SBA cards on some sparc64 hosts */
2544 fore200e_spin(100);
2545 #endif
2546
2547 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2548 fore200e_monitor_puts(fore200e, buf);
2549
2550 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2551 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2552 goto release;
2553 }
2554
2555 printk(FORE200E "device %s firmware started\n", fore200e->name);
2556
2557 fore200e->state = FORE200E_STATE_START_FW;
2558 err = 0;
2559
2560 release:
2561 release_firmware(firmware);
2562 return err;
2563 }
2564
2565
2566 static int fore200e_register(struct fore200e *fore200e, struct device *parent)
2567 {
2568 struct atm_dev* atm_dev;
2569
2570 DPRINTK(2, "device %s being registered\n", fore200e->name);
2571
2572 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
2573 -1, NULL);
2574 if (atm_dev == NULL) {
2575 printk(FORE200E "unable to register device %s\n", fore200e->name);
2576 return -ENODEV;
2577 }
2578
2579 atm_dev->dev_data = fore200e;
2580 fore200e->atm_dev = atm_dev;
2581
2582 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2583 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2584
2585 fore200e->available_cell_rate = ATM_OC3_PCR;
2586
2587 fore200e->state = FORE200E_STATE_REGISTER;
2588 return 0;
2589 }
2590
2591
2592 static int fore200e_init(struct fore200e *fore200e, struct device *parent)
2593 {
2594 if (fore200e_register(fore200e, parent) < 0)
2595 return -ENODEV;
2596
2597 if (fore200e->bus->configure(fore200e) < 0)
2598 return -ENODEV;
2599
2600 if (fore200e->bus->map(fore200e) < 0)
2601 return -ENODEV;
2602
2603 if (fore200e_reset(fore200e, 1) < 0)
2604 return -ENODEV;
2605
2606 if (fore200e_load_and_start_fw(fore200e) < 0)
2607 return -ENODEV;
2608
2609 if (fore200e_initialize(fore200e) < 0)
2610 return -ENODEV;
2611
2612 if (fore200e_init_cmd_queue(fore200e) < 0)
2613 return -ENOMEM;
2614
2615 if (fore200e_init_tx_queue(fore200e) < 0)
2616 return -ENOMEM;
2617
2618 if (fore200e_init_rx_queue(fore200e) < 0)
2619 return -ENOMEM;
2620
2621 if (fore200e_init_bs_queue(fore200e) < 0)
2622 return -ENOMEM;
2623
2624 if (fore200e_alloc_rx_buf(fore200e) < 0)
2625 return -ENOMEM;
2626
2627 if (fore200e_get_esi(fore200e) < 0)
2628 return -EIO;
2629
2630 if (fore200e_irq_request(fore200e) < 0)
2631 return -EBUSY;
2632
2633 fore200e_supply(fore200e);
2634
2635 /* all done, board initialization is now complete */
2636 fore200e->state = FORE200E_STATE_COMPLETE;
2637 return 0;
2638 }
2639
2640 #ifdef CONFIG_SBUS
2641 static const struct of_device_id fore200e_sba_match[];
2642 static int fore200e_sba_probe(struct platform_device *op)
2643 {
2644 const struct of_device_id *match;
2645 const struct fore200e_bus *bus;
2646 struct fore200e *fore200e;
2647 static int index = 0;
2648 int err;
2649
2650 match = of_match_device(fore200e_sba_match, &op->dev);
2651 if (!match)
2652 return -EINVAL;
2653 bus = match->data;
2654
2655 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2656 if (!fore200e)
2657 return -ENOMEM;
2658
2659 fore200e->bus = bus;
2660 fore200e->bus_dev = op;
2661 fore200e->irq = op->archdata.irqs[0];
2662 fore200e->phys_base = op->resource[0].start;
2663
2664 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2665
2666 err = fore200e_init(fore200e, &op->dev);
2667 if (err < 0) {
2668 fore200e_shutdown(fore200e);
2669 kfree(fore200e);
2670 return err;
2671 }
2672
2673 index++;
2674 dev_set_drvdata(&op->dev, fore200e);
2675
2676 return 0;
2677 }
2678
2679 static int fore200e_sba_remove(struct platform_device *op)
2680 {
2681 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2682
2683 fore200e_shutdown(fore200e);
2684 kfree(fore200e);
2685
2686 return 0;
2687 }
2688
2689 static const struct of_device_id fore200e_sba_match[] = {
2690 {
2691 .name = SBA200E_PROM_NAME,
2692 .data = (void *) &fore200e_bus[1],
2693 },
2694 {},
2695 };
2696 MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2697
2698 static struct platform_driver fore200e_sba_driver = {
2699 .driver = {
2700 .name = "fore_200e",
2701 .of_match_table = fore200e_sba_match,
2702 },
2703 .probe = fore200e_sba_probe,
2704 .remove = fore200e_sba_remove,
2705 };
2706 #endif
2707
2708 #ifdef CONFIG_PCI
2709 static int fore200e_pca_detect(struct pci_dev *pci_dev,
2710 const struct pci_device_id *pci_ent)
2711 {
2712 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
2713 struct fore200e* fore200e;
2714 int err = 0;
2715 static int index = 0;
2716
2717 if (pci_enable_device(pci_dev)) {
2718 err = -EINVAL;
2719 goto out;
2720 }
2721
2722 if (dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32))) {
2723 err = -EINVAL;
2724 goto out;
2725 }
2726
2727 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2728 if (fore200e == NULL) {
2729 err = -ENOMEM;
2730 goto out_disable;
2731 }
2732
2733 fore200e->bus = bus;
2734 fore200e->bus_dev = pci_dev;
2735 fore200e->irq = pci_dev->irq;
2736 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2737
2738 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
2739
2740 pci_set_master(pci_dev);
2741
2742 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2743 fore200e->bus->model_name,
2744 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2745
2746 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2747
2748 err = fore200e_init(fore200e, &pci_dev->dev);
2749 if (err < 0) {
2750 fore200e_shutdown(fore200e);
2751 goto out_free;
2752 }
2753
2754 ++index;
2755 pci_set_drvdata(pci_dev, fore200e);
2756
2757 out:
2758 return err;
2759
2760 out_free:
2761 kfree(fore200e);
2762 out_disable:
2763 pci_disable_device(pci_dev);
2764 goto out;
2765 }
2766
2767
2768 static void fore200e_pca_remove_one(struct pci_dev *pci_dev)
2769 {
2770 struct fore200e *fore200e;
2771
2772 fore200e = pci_get_drvdata(pci_dev);
2773
2774 fore200e_shutdown(fore200e);
2775 kfree(fore200e);
2776 pci_disable_device(pci_dev);
2777 }
2778
2779
2780 static const struct pci_device_id fore200e_pca_tbl[] = {
2781 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
2782 0, 0, (unsigned long) &fore200e_bus[0] },
2783 { 0, }
2784 };
2785
2786 MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2787
2788 static struct pci_driver fore200e_pca_driver = {
2789 .name = "fore_200e",
2790 .probe = fore200e_pca_detect,
2791 .remove = fore200e_pca_remove_one,
2792 .id_table = fore200e_pca_tbl,
2793 };
2794 #endif
2795
2796 static int __init fore200e_module_init(void)
2797 {
2798 int err = 0;
2799
2800 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2801
2802 #ifdef CONFIG_SBUS
2803 err = platform_driver_register(&fore200e_sba_driver);
2804 if (err)
2805 return err;
2806 #endif
2807
2808 #ifdef CONFIG_PCI
2809 err = pci_register_driver(&fore200e_pca_driver);
2810 #endif
2811
2812 #ifdef CONFIG_SBUS
2813 if (err)
2814 platform_driver_unregister(&fore200e_sba_driver);
2815 #endif
2816
2817 return err;
2818 }
2819
2820 static void __exit fore200e_module_cleanup(void)
2821 {
2822 #ifdef CONFIG_PCI
2823 pci_unregister_driver(&fore200e_pca_driver);
2824 #endif
2825 #ifdef CONFIG_SBUS
2826 platform_driver_unregister(&fore200e_sba_driver);
2827 #endif
2828 }
2829
2830 static int
2831 fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2832 {
2833 struct fore200e* fore200e = FORE200E_DEV(dev);
2834 struct fore200e_vcc* fore200e_vcc;
2835 struct atm_vcc* vcc;
2836 int i, len, left = *pos;
2837 unsigned long flags;
2838
2839 if (!left--) {
2840
2841 if (fore200e_getstats(fore200e) < 0)
2842 return -EIO;
2843
2844 len = sprintf(page,"\n"
2845 " device:\n"
2846 " internal name:\t\t%s\n", fore200e->name);
2847
2848 /* print bus-specific information */
2849 if (fore200e->bus->proc_read)
2850 len += fore200e->bus->proc_read(fore200e, page + len);
2851
2852 len += sprintf(page + len,
2853 " interrupt line:\t\t%s\n"
2854 " physical base address:\t0x%p\n"
2855 " virtual base address:\t0x%p\n"
2856 " factory address (ESI):\t%pM\n"
2857 " board serial number:\t\t%d\n\n",
2858 fore200e_irq_itoa(fore200e->irq),
2859 (void*)fore200e->phys_base,
2860 fore200e->virt_base,
2861 fore200e->esi,
2862 fore200e->esi[4] * 256 + fore200e->esi[5]);
2863
2864 return len;
2865 }
2866
2867 if (!left--)
2868 return sprintf(page,
2869 " free small bufs, scheme 1:\t%d\n"
2870 " free large bufs, scheme 1:\t%d\n"
2871 " free small bufs, scheme 2:\t%d\n"
2872 " free large bufs, scheme 2:\t%d\n",
2873 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2874 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2875 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2876 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2877
2878 if (!left--) {
2879 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2880
2881 len = sprintf(page,"\n\n"
2882 " cell processor:\n"
2883 " heartbeat state:\t\t");
2884
2885 if (hb >> 16 != 0xDEAD)
2886 len += sprintf(page + len, "0x%08x\n", hb);
2887 else
2888 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2889
2890 return len;
2891 }
2892
2893 if (!left--) {
2894 static const char* media_name[] = {
2895 "unshielded twisted pair",
2896 "multimode optical fiber ST",
2897 "multimode optical fiber SC",
2898 "single-mode optical fiber ST",
2899 "single-mode optical fiber SC",
2900 "unknown"
2901 };
2902
2903 static const char* oc3_mode[] = {
2904 "normal operation",
2905 "diagnostic loopback",
2906 "line loopback",
2907 "unknown"
2908 };
2909
2910 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2911 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2912 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2913 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2914 u32 oc3_index;
2915
2916 if (media_index > 4)
2917 media_index = 5;
2918
2919 switch (fore200e->loop_mode) {
2920 case ATM_LM_NONE: oc3_index = 0;
2921 break;
2922 case ATM_LM_LOC_PHY: oc3_index = 1;
2923 break;
2924 case ATM_LM_RMT_PHY: oc3_index = 2;
2925 break;
2926 default: oc3_index = 3;
2927 }
2928
2929 return sprintf(page,
2930 " firmware release:\t\t%d.%d.%d\n"
2931 " monitor release:\t\t%d.%d\n"
2932 " media type:\t\t\t%s\n"
2933 " OC-3 revision:\t\t0x%x\n"
2934 " OC-3 mode:\t\t\t%s",
2935 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2936 mon960_release >> 16, mon960_release << 16 >> 16,
2937 media_name[ media_index ],
2938 oc3_revision,
2939 oc3_mode[ oc3_index ]);
2940 }
2941
2942 if (!left--) {
2943 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2944
2945 return sprintf(page,
2946 "\n\n"
2947 " monitor:\n"
2948 " version number:\t\t%d\n"
2949 " boot status word:\t\t0x%08x\n",
2950 fore200e->bus->read(&cp_monitor->mon_version),
2951 fore200e->bus->read(&cp_monitor->bstat));
2952 }
2953
2954 if (!left--)
2955 return sprintf(page,
2956 "\n"
2957 " device statistics:\n"
2958 " 4b5b:\n"
2959 " crc_header_errors:\t\t%10u\n"
2960 " framing_errors:\t\t%10u\n",
2961 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2962 be32_to_cpu(fore200e->stats->phy.framing_errors));
2963
2964 if (!left--)
2965 return sprintf(page, "\n"
2966 " OC-3:\n"
2967 " section_bip8_errors:\t%10u\n"
2968 " path_bip8_errors:\t\t%10u\n"
2969 " line_bip24_errors:\t\t%10u\n"
2970 " line_febe_errors:\t\t%10u\n"
2971 " path_febe_errors:\t\t%10u\n"
2972 " corr_hcs_errors:\t\t%10u\n"
2973 " ucorr_hcs_errors:\t\t%10u\n",
2974 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2975 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2976 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2977 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2978 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2979 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2980 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2981
2982 if (!left--)
2983 return sprintf(page,"\n"
2984 " ATM:\t\t\t\t cells\n"
2985 " TX:\t\t\t%10u\n"
2986 " RX:\t\t\t%10u\n"
2987 " vpi out of range:\t\t%10u\n"
2988 " vpi no conn:\t\t%10u\n"
2989 " vci out of range:\t\t%10u\n"
2990 " vci no conn:\t\t%10u\n",
2991 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2992 be32_to_cpu(fore200e->stats->atm.cells_received),
2993 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2994 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2995 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2996 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2997
2998 if (!left--)
2999 return sprintf(page,"\n"
3000 " AAL0:\t\t\t cells\n"
3001 " TX:\t\t\t%10u\n"
3002 " RX:\t\t\t%10u\n"
3003 " dropped:\t\t\t%10u\n",
3004 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
3005 be32_to_cpu(fore200e->stats->aal0.cells_received),
3006 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
3007
3008 if (!left--)
3009 return sprintf(page,"\n"
3010 " AAL3/4:\n"
3011 " SAR sublayer:\t\t cells\n"
3012 " TX:\t\t\t%10u\n"
3013 " RX:\t\t\t%10u\n"
3014 " dropped:\t\t\t%10u\n"
3015 " CRC errors:\t\t%10u\n"
3016 " protocol errors:\t\t%10u\n\n"
3017 " CS sublayer:\t\t PDUs\n"
3018 " TX:\t\t\t%10u\n"
3019 " RX:\t\t\t%10u\n"
3020 " dropped:\t\t\t%10u\n"
3021 " protocol errors:\t\t%10u\n",
3022 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
3023 be32_to_cpu(fore200e->stats->aal34.cells_received),
3024 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
3025 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
3026 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
3027 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
3028 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
3029 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
3030 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
3031
3032 if (!left--)
3033 return sprintf(page,"\n"
3034 " AAL5:\n"
3035 " SAR sublayer:\t\t cells\n"
3036 " TX:\t\t\t%10u\n"
3037 " RX:\t\t\t%10u\n"
3038 " dropped:\t\t\t%10u\n"
3039 " congestions:\t\t%10u\n\n"
3040 " CS sublayer:\t\t PDUs\n"
3041 " TX:\t\t\t%10u\n"
3042 " RX:\t\t\t%10u\n"
3043 " dropped:\t\t\t%10u\n"
3044 " CRC errors:\t\t%10u\n"
3045 " protocol errors:\t\t%10u\n",
3046 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
3047 be32_to_cpu(fore200e->stats->aal5.cells_received),
3048 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
3049 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
3050 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
3051 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
3052 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
3053 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
3054 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
3055
3056 if (!left--)
3057 return sprintf(page,"\n"
3058 " AUX:\t\t allocation failures\n"
3059 " small b1:\t\t\t%10u\n"
3060 " large b1:\t\t\t%10u\n"
3061 " small b2:\t\t\t%10u\n"
3062 " large b2:\t\t\t%10u\n"
3063 " RX PDUs:\t\t\t%10u\n"
3064 " TX PDUs:\t\t\t%10lu\n",
3065 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
3066 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
3067 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
3068 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
3069 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
3070 fore200e->tx_sat);
3071
3072 if (!left--)
3073 return sprintf(page,"\n"
3074 " receive carrier:\t\t\t%s\n",
3075 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3076
3077 if (!left--) {
3078 return sprintf(page,"\n"
3079 " VCCs:\n address VPI VCI AAL "
3080 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3081 }
3082
3083 for (i = 0; i < NBR_CONNECT; i++) {
3084
3085 vcc = fore200e->vc_map[i].vcc;
3086
3087 if (vcc == NULL)
3088 continue;
3089
3090 spin_lock_irqsave(&fore200e->q_lock, flags);
3091
3092 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3093
3094 fore200e_vcc = FORE200E_VCC(vcc);
3095 ASSERT(fore200e_vcc);
3096
3097 len = sprintf(page,
3098 " %pK %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3099 vcc,
3100 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3101 fore200e_vcc->tx_pdu,
3102 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3103 fore200e_vcc->tx_max_pdu,
3104 fore200e_vcc->rx_pdu,
3105 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3106 fore200e_vcc->rx_max_pdu);
3107
3108 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3109 return len;
3110 }
3111
3112 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3113 }
3114
3115 return 0;
3116 }
3117
3118 module_init(fore200e_module_init);
3119 module_exit(fore200e_module_cleanup);
3120
3121
3122 static const struct atmdev_ops fore200e_ops =
3123 {
3124 .open = fore200e_open,
3125 .close = fore200e_close,
3126 .ioctl = fore200e_ioctl,
3127 .getsockopt = fore200e_getsockopt,
3128 .setsockopt = fore200e_setsockopt,
3129 .send = fore200e_send,
3130 .change_qos = fore200e_change_qos,
3131 .proc_read = fore200e_proc_read,
3132 .owner = THIS_MODULE
3133 };
3134
3135
3136 static const struct fore200e_bus fore200e_bus[] = {
3137 #ifdef CONFIG_PCI
3138 { "PCA-200E", "pca200e", 32, 4, 32,
3139 fore200e_pca_read,
3140 fore200e_pca_write,
3141 fore200e_pca_dma_map,
3142 fore200e_pca_dma_unmap,
3143 fore200e_pca_dma_sync_for_cpu,
3144 fore200e_pca_dma_sync_for_device,
3145 fore200e_pca_dma_chunk_alloc,
3146 fore200e_pca_dma_chunk_free,
3147 fore200e_pca_configure,
3148 fore200e_pca_map,
3149 fore200e_pca_reset,
3150 fore200e_pca_prom_read,
3151 fore200e_pca_unmap,
3152 NULL,
3153 fore200e_pca_irq_check,
3154 fore200e_pca_irq_ack,
3155 fore200e_pca_proc_read,
3156 },
3157 #endif
3158 #ifdef CONFIG_SBUS
3159 { "SBA-200E", "sba200e", 32, 64, 32,
3160 fore200e_sba_read,
3161 fore200e_sba_write,
3162 fore200e_sba_dma_map,
3163 fore200e_sba_dma_unmap,
3164 fore200e_sba_dma_sync_for_cpu,
3165 fore200e_sba_dma_sync_for_device,
3166 fore200e_sba_dma_chunk_alloc,
3167 fore200e_sba_dma_chunk_free,
3168 fore200e_sba_configure,
3169 fore200e_sba_map,
3170 fore200e_sba_reset,
3171 fore200e_sba_prom_read,
3172 fore200e_sba_unmap,
3173 fore200e_sba_irq_enable,
3174 fore200e_sba_irq_check,
3175 fore200e_sba_irq_ack,
3176 fore200e_sba_proc_read,
3177 },
3178 #endif
3179 {}
3180 };
3181
3182 MODULE_LICENSE("GPL");
3183 #ifdef CONFIG_PCI
3184 #ifdef __LITTLE_ENDIAN__
3185 MODULE_FIRMWARE("pca200e.bin");
3186 #else
3187 MODULE_FIRMWARE("pca200e_ecd.bin2");
3188 #endif
3189 #endif /* CONFIG_PCI */
3190 #ifdef CONFIG_SBUS
3191 MODULE_FIRMWARE("sba200e_ecd.bin2");
3192 #endif
Linux with added FPC-III support