3 * Bluetooth support for Intel devices
5 * Copyright (C) 2015 Intel Corporation
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/module.h>
25 #include <linux/firmware.h>
26 #include <linux/regmap.h>
27 #include <asm/unaligned.h>
29 #include <net/bluetooth/bluetooth.h>
30 #include <net/bluetooth/hci_core.h>
36 #define BDADDR_INTEL (&(bdaddr_t) {{0x00, 0x8b, 0x9e, 0x19, 0x03, 0x00}})
38 int btintel_check_bdaddr(struct hci_dev
*hdev
)
40 struct hci_rp_read_bd_addr
*bda
;
43 skb
= __hci_cmd_sync(hdev
, HCI_OP_READ_BD_ADDR
, 0, NULL
,
46 int err
= PTR_ERR(skb
);
47 bt_dev_err(hdev
, "Reading Intel device address failed (%d)",
52 if (skb
->len
!= sizeof(*bda
)) {
53 bt_dev_err(hdev
, "Intel device address length mismatch");
58 bda
= (struct hci_rp_read_bd_addr
*)skb
->data
;
60 /* For some Intel based controllers, the default Bluetooth device
61 * address 00:03:19:9E:8B:00 can be found. These controllers are
62 * fully operational, but have the danger of duplicate addresses
63 * and that in turn can cause problems with Bluetooth operation.
65 if (!bacmp(&bda
->bdaddr
, BDADDR_INTEL
)) {
66 bt_dev_err(hdev
, "Found Intel default device address (%pMR)",
68 set_bit(HCI_QUIRK_INVALID_BDADDR
, &hdev
->quirks
);
75 EXPORT_SYMBOL_GPL(btintel_check_bdaddr
);
77 int btintel_enter_mfg(struct hci_dev
*hdev
)
79 static const u8 param
[] = { 0x01, 0x00 };
82 skb
= __hci_cmd_sync(hdev
, 0xfc11, 2, param
, HCI_CMD_TIMEOUT
);
84 bt_dev_err(hdev
, "Entering manufacturer mode failed (%ld)",
92 EXPORT_SYMBOL_GPL(btintel_enter_mfg
);
94 int btintel_exit_mfg(struct hci_dev
*hdev
, bool reset
, bool patched
)
96 u8 param
[] = { 0x00, 0x00 };
99 /* The 2nd command parameter specifies the manufacturing exit method:
100 * 0x00: Just disable the manufacturing mode (0x00).
101 * 0x01: Disable manufacturing mode and reset with patches deactivated.
102 * 0x02: Disable manufacturing mode and reset with patches activated.
105 param
[1] |= patched
? 0x02 : 0x01;
107 skb
= __hci_cmd_sync(hdev
, 0xfc11, 2, param
, HCI_CMD_TIMEOUT
);
109 bt_dev_err(hdev
, "Exiting manufacturer mode failed (%ld)",
117 EXPORT_SYMBOL_GPL(btintel_exit_mfg
);
119 int btintel_set_bdaddr(struct hci_dev
*hdev
, const bdaddr_t
*bdaddr
)
124 skb
= __hci_cmd_sync(hdev
, 0xfc31, 6, bdaddr
, HCI_INIT_TIMEOUT
);
127 bt_dev_err(hdev
, "Changing Intel device address failed (%d)",
135 EXPORT_SYMBOL_GPL(btintel_set_bdaddr
);
137 int btintel_set_diag(struct hci_dev
*hdev
, bool enable
)
153 skb
= __hci_cmd_sync(hdev
, 0xfc43, 3, param
, HCI_INIT_TIMEOUT
);
158 bt_dev_err(hdev
, "Changing Intel diagnostic mode failed (%d)",
165 btintel_set_event_mask(hdev
, enable
);
168 EXPORT_SYMBOL_GPL(btintel_set_diag
);
170 int btintel_set_diag_mfg(struct hci_dev
*hdev
, bool enable
)
174 err
= btintel_enter_mfg(hdev
);
178 ret
= btintel_set_diag(hdev
, enable
);
180 err
= btintel_exit_mfg(hdev
, false, false);
186 EXPORT_SYMBOL_GPL(btintel_set_diag_mfg
);
188 void btintel_hw_error(struct hci_dev
*hdev
, u8 code
)
193 bt_dev_err(hdev
, "Hardware error 0x%2.2x", code
);
195 skb
= __hci_cmd_sync(hdev
, HCI_OP_RESET
, 0, NULL
, HCI_INIT_TIMEOUT
);
197 bt_dev_err(hdev
, "Reset after hardware error failed (%ld)",
203 skb
= __hci_cmd_sync(hdev
, 0xfc22, 1, &type
, HCI_INIT_TIMEOUT
);
205 bt_dev_err(hdev
, "Retrieving Intel exception info failed (%ld)",
210 if (skb
->len
!= 13) {
211 bt_dev_err(hdev
, "Exception info size mismatch");
216 bt_dev_err(hdev
, "Exception info %s", (char *)(skb
->data
+ 1));
220 EXPORT_SYMBOL_GPL(btintel_hw_error
);
222 void btintel_version_info(struct hci_dev
*hdev
, struct intel_version
*ver
)
226 switch (ver
->fw_variant
) {
228 variant
= "Bootloader";
231 variant
= "Firmware";
237 bt_dev_info(hdev
, "%s revision %u.%u build %u week %u %u",
238 variant
, ver
->fw_revision
>> 4, ver
->fw_revision
& 0x0f,
239 ver
->fw_build_num
, ver
->fw_build_ww
,
240 2000 + ver
->fw_build_yy
);
242 EXPORT_SYMBOL_GPL(btintel_version_info
);
244 int btintel_secure_send(struct hci_dev
*hdev
, u8 fragment_type
, u32 plen
,
249 u8 cmd_param
[253], fragment_len
= (plen
> 252) ? 252 : plen
;
251 cmd_param
[0] = fragment_type
;
252 memcpy(cmd_param
+ 1, param
, fragment_len
);
254 skb
= __hci_cmd_sync(hdev
, 0xfc09, fragment_len
+ 1,
255 cmd_param
, HCI_INIT_TIMEOUT
);
261 plen
-= fragment_len
;
262 param
+= fragment_len
;
267 EXPORT_SYMBOL_GPL(btintel_secure_send
);
269 int btintel_load_ddc_config(struct hci_dev
*hdev
, const char *ddc_name
)
271 const struct firmware
*fw
;
276 err
= request_firmware_direct(&fw
, ddc_name
, &hdev
->dev
);
278 bt_dev_err(hdev
, "Failed to load Intel DDC file %s (%d)",
283 bt_dev_info(hdev
, "Found Intel DDC parameters: %s", ddc_name
);
287 /* DDC file contains one or more DDC structure which has
288 * Length (1 byte), DDC ID (2 bytes), and DDC value (Length - 2).
290 while (fw
->size
> fw_ptr
- fw
->data
) {
291 u8 cmd_plen
= fw_ptr
[0] + sizeof(u8
);
293 skb
= __hci_cmd_sync(hdev
, 0xfc8b, cmd_plen
, fw_ptr
,
296 bt_dev_err(hdev
, "Failed to send Intel_Write_DDC (%ld)",
298 release_firmware(fw
);
306 release_firmware(fw
);
308 bt_dev_info(hdev
, "Applying Intel DDC parameters completed");
312 EXPORT_SYMBOL_GPL(btintel_load_ddc_config
);
314 int btintel_set_event_mask(struct hci_dev
*hdev
, bool debug
)
316 u8 mask
[8] = { 0x87, 0x0c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
323 skb
= __hci_cmd_sync(hdev
, 0xfc52, 8, mask
, HCI_INIT_TIMEOUT
);
326 bt_dev_err(hdev
, "Setting Intel event mask failed (%d)", err
);
333 EXPORT_SYMBOL_GPL(btintel_set_event_mask
);
335 int btintel_set_event_mask_mfg(struct hci_dev
*hdev
, bool debug
)
339 err
= btintel_enter_mfg(hdev
);
343 ret
= btintel_set_event_mask(hdev
, debug
);
345 err
= btintel_exit_mfg(hdev
, false, false);
351 EXPORT_SYMBOL_GPL(btintel_set_event_mask_mfg
);
353 int btintel_read_version(struct hci_dev
*hdev
, struct intel_version
*ver
)
357 skb
= __hci_cmd_sync(hdev
, 0xfc05, 0, NULL
, HCI_CMD_TIMEOUT
);
359 bt_dev_err(hdev
, "Reading Intel version information failed (%ld)",
364 if (skb
->len
!= sizeof(*ver
)) {
365 bt_dev_err(hdev
, "Intel version event size mismatch");
370 memcpy(ver
, skb
->data
, sizeof(*ver
));
376 EXPORT_SYMBOL_GPL(btintel_read_version
);
378 /* ------- REGMAP IBT SUPPORT ------- */
380 #define IBT_REG_MODE_8BIT 0x00
381 #define IBT_REG_MODE_16BIT 0x01
382 #define IBT_REG_MODE_32BIT 0x02
384 struct regmap_ibt_context
{
385 struct hci_dev
*hdev
;
390 struct ibt_cp_reg_access
{
397 struct ibt_rp_reg_access
{
403 static int regmap_ibt_read(void *context
, const void *addr
, size_t reg_size
,
404 void *val
, size_t val_size
)
406 struct regmap_ibt_context
*ctx
= context
;
407 struct ibt_cp_reg_access cp
;
408 struct ibt_rp_reg_access
*rp
;
412 if (reg_size
!= sizeof(__le32
))
417 cp
.mode
= IBT_REG_MODE_8BIT
;
420 cp
.mode
= IBT_REG_MODE_16BIT
;
423 cp
.mode
= IBT_REG_MODE_32BIT
;
429 /* regmap provides a little-endian formatted addr */
430 cp
.addr
= *(__le32
*)addr
;
433 bt_dev_dbg(ctx
->hdev
, "Register (0x%x) read", le32_to_cpu(cp
.addr
));
435 skb
= hci_cmd_sync(ctx
->hdev
, ctx
->op_read
, sizeof(cp
), &cp
,
439 bt_dev_err(ctx
->hdev
, "regmap: Register (0x%x) read error (%d)",
440 le32_to_cpu(cp
.addr
), err
);
444 if (skb
->len
!= sizeof(*rp
) + val_size
) {
445 bt_dev_err(ctx
->hdev
, "regmap: Register (0x%x) read error, bad len",
446 le32_to_cpu(cp
.addr
));
451 rp
= (struct ibt_rp_reg_access
*)skb
->data
;
453 if (rp
->addr
!= cp
.addr
) {
454 bt_dev_err(ctx
->hdev
, "regmap: Register (0x%x) read error, bad addr",
455 le32_to_cpu(rp
->addr
));
460 memcpy(val
, rp
->data
, val_size
);
467 static int regmap_ibt_gather_write(void *context
,
468 const void *addr
, size_t reg_size
,
469 const void *val
, size_t val_size
)
471 struct regmap_ibt_context
*ctx
= context
;
472 struct ibt_cp_reg_access
*cp
;
474 int plen
= sizeof(*cp
) + val_size
;
478 if (reg_size
!= sizeof(__le32
))
483 mode
= IBT_REG_MODE_8BIT
;
486 mode
= IBT_REG_MODE_16BIT
;
489 mode
= IBT_REG_MODE_32BIT
;
495 cp
= kmalloc(plen
, GFP_KERNEL
);
499 /* regmap provides a little-endian formatted addr/value */
500 cp
->addr
= *(__le32
*)addr
;
503 memcpy(&cp
->data
, val
, val_size
);
505 bt_dev_dbg(ctx
->hdev
, "Register (0x%x) write", le32_to_cpu(cp
->addr
));
507 skb
= hci_cmd_sync(ctx
->hdev
, ctx
->op_write
, plen
, cp
, HCI_CMD_TIMEOUT
);
510 bt_dev_err(ctx
->hdev
, "regmap: Register (0x%x) write error (%d)",
511 le32_to_cpu(cp
->addr
), err
);
521 static int regmap_ibt_write(void *context
, const void *data
, size_t count
)
523 /* data contains register+value, since we only support 32bit addr,
524 * minimum data size is 4 bytes.
526 if (WARN_ONCE(count
< 4, "Invalid register access"))
529 return regmap_ibt_gather_write(context
, data
, 4, data
+ 4, count
- 4);
532 static void regmap_ibt_free_context(void *context
)
537 static struct regmap_bus regmap_ibt
= {
538 .read
= regmap_ibt_read
,
539 .write
= regmap_ibt_write
,
540 .gather_write
= regmap_ibt_gather_write
,
541 .free_context
= regmap_ibt_free_context
,
542 .reg_format_endian_default
= REGMAP_ENDIAN_LITTLE
,
543 .val_format_endian_default
= REGMAP_ENDIAN_LITTLE
,
546 /* Config is the same for all register regions */
547 static const struct regmap_config regmap_ibt_cfg
= {
548 .name
= "btintel_regmap",
553 struct regmap
*btintel_regmap_init(struct hci_dev
*hdev
, u16 opcode_read
,
556 struct regmap_ibt_context
*ctx
;
558 bt_dev_info(hdev
, "regmap: Init R%x-W%x region", opcode_read
,
561 ctx
= kzalloc(sizeof(*ctx
), GFP_KERNEL
);
563 return ERR_PTR(-ENOMEM
);
565 ctx
->op_read
= opcode_read
;
566 ctx
->op_write
= opcode_write
;
569 return regmap_init(&hdev
->dev
, ®map_ibt
, ctx
, ®map_ibt_cfg
);
571 EXPORT_SYMBOL_GPL(btintel_regmap_init
);
573 int btintel_send_intel_reset(struct hci_dev
*hdev
, u32 boot_param
)
575 struct intel_reset params
= { 0x00, 0x01, 0x00, 0x01, 0x00000000 };
578 params
.boot_param
= cpu_to_le32(boot_param
);
580 skb
= __hci_cmd_sync(hdev
, 0xfc01, sizeof(params
), ¶ms
,
583 bt_dev_err(hdev
, "Failed to send Intel Reset command");
591 EXPORT_SYMBOL_GPL(btintel_send_intel_reset
);
593 int btintel_read_boot_params(struct hci_dev
*hdev
,
594 struct intel_boot_params
*params
)
598 skb
= __hci_cmd_sync(hdev
, 0xfc0d, 0, NULL
, HCI_INIT_TIMEOUT
);
600 bt_dev_err(hdev
, "Reading Intel boot parameters failed (%ld)",
605 if (skb
->len
!= sizeof(*params
)) {
606 bt_dev_err(hdev
, "Intel boot parameters size mismatch");
611 memcpy(params
, skb
->data
, sizeof(*params
));
615 if (params
->status
) {
616 bt_dev_err(hdev
, "Intel boot parameters command failed (%02x)",
618 return -bt_to_errno(params
->status
);
621 bt_dev_info(hdev
, "Device revision is %u",
622 le16_to_cpu(params
->dev_revid
));
624 bt_dev_info(hdev
, "Secure boot is %s",
625 params
->secure_boot
? "enabled" : "disabled");
627 bt_dev_info(hdev
, "OTP lock is %s",
628 params
->otp_lock
? "enabled" : "disabled");
630 bt_dev_info(hdev
, "API lock is %s",
631 params
->api_lock
? "enabled" : "disabled");
633 bt_dev_info(hdev
, "Debug lock is %s",
634 params
->debug_lock
? "enabled" : "disabled");
636 bt_dev_info(hdev
, "Minimum firmware build %u week %u %u",
637 params
->min_fw_build_nn
, params
->min_fw_build_cw
,
638 2000 + params
->min_fw_build_yy
);
642 EXPORT_SYMBOL_GPL(btintel_read_boot_params
);
644 int btintel_download_firmware(struct hci_dev
*hdev
, const struct firmware
*fw
,
651 /* Start the firmware download transaction with the Init fragment
652 * represented by the 128 bytes of CSS header.
654 err
= btintel_secure_send(hdev
, 0x00, 128, fw
->data
);
656 bt_dev_err(hdev
, "Failed to send firmware header (%d)", err
);
660 /* Send the 256 bytes of public key information from the firmware
661 * as the PKey fragment.
663 err
= btintel_secure_send(hdev
, 0x03, 256, fw
->data
+ 128);
665 bt_dev_err(hdev
, "Failed to send firmware pkey (%d)", err
);
669 /* Send the 256 bytes of signature information from the firmware
670 * as the Sign fragment.
672 err
= btintel_secure_send(hdev
, 0x02, 256, fw
->data
+ 388);
674 bt_dev_err(hdev
, "Failed to send firmware signature (%d)", err
);
678 fw_ptr
= fw
->data
+ 644;
681 while (fw_ptr
- fw
->data
< fw
->size
) {
682 struct hci_command_hdr
*cmd
= (void *)(fw_ptr
+ frag_len
);
684 /* Each SKU has a different reset parameter to use in the
685 * HCI_Intel_Reset command and it is embedded in the firmware
686 * data. So, instead of using static value per SKU, check
687 * the firmware data and save it for later use.
689 if (le16_to_cpu(cmd
->opcode
) == 0xfc0e) {
690 /* The boot parameter is the first 32-bit value
691 * and rest of 3 octets are reserved.
693 *boot_param
= get_unaligned_le32(fw_ptr
+ sizeof(*cmd
));
695 bt_dev_dbg(hdev
, "boot_param=0x%x", *boot_param
);
698 frag_len
+= sizeof(*cmd
) + cmd
->plen
;
700 /* The parameter length of the secure send command requires
701 * a 4 byte alignment. It happens so that the firmware file
702 * contains proper Intel_NOP commands to align the fragments
705 * Send set of commands with 4 byte alignment from the
706 * firmware data buffer as a single Data fragement.
708 if (!(frag_len
% 4)) {
709 err
= btintel_secure_send(hdev
, 0x01, frag_len
, fw_ptr
);
712 "Failed to send firmware data (%d)",
725 EXPORT_SYMBOL_GPL(btintel_download_firmware
);
727 MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
728 MODULE_DESCRIPTION("Bluetooth support for Intel devices ver " VERSION
);
729 MODULE_VERSION(VERSION
);
730 MODULE_LICENSE("GPL");
731 MODULE_FIRMWARE("intel/ibt-11-5.sfi");
732 MODULE_FIRMWARE("intel/ibt-11-5.ddc");
733 MODULE_FIRMWARE("intel/ibt-12-16.sfi");
734 MODULE_FIRMWARE("intel/ibt-12-16.ddc");