drivers/bus/omap_l3_smx.c

   1 /*
   2  * OMAP3XXX L3 Interconnect Driver
   3  *
   4  * Copyright (C) 2011 Texas Corporation
   5  *      Felipe Balbi <balbi@ti.com>
   6  *      Santosh Shilimkar <santosh.shilimkar@ti.com>
   7  *      Sricharan <r.sricharan@ti.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License as published by
  11  * the Free Software Foundation; either version 2 of the License, or
  12  * (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
  22  * USA
  23  */
  24
  25 #include <linux/kernel.h>
  26 #include <linux/slab.h>
  27 #include <linux/platform_device.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/io.h>
  30 #include <linux/module.h>
  31 #include <linux/of.h>
  32 #include <linux/of_device.h>
  33
  34 #include "omap_l3_smx.h"
  35
  36 static inline u64 omap3_l3_readll(void __iomem *base, u16 reg)
  37 {
  38         return __raw_readll(base + reg);
  39 }
  40
  41 static inline void omap3_l3_writell(void __iomem *base, u16 reg, u64 value)
  42 {
  43         __raw_writell(value, base + reg);
  44 }
  45
  46 static inline enum omap3_l3_code omap3_l3_decode_error_code(u64 error)
  47 {
  48         return (error & 0x0f000000) >> L3_ERROR_LOG_CODE;
  49 }
  50
  51 static inline u32 omap3_l3_decode_addr(u64 error_addr)
  52 {
  53         return error_addr & 0xffffffff;
  54 }
  55
  56 static inline unsigned omap3_l3_decode_cmd(u64 error)
  57 {
  58         return (error & 0x07) >> L3_ERROR_LOG_CMD;
  59 }
  60
  61 static inline enum omap3_l3_initiator_id omap3_l3_decode_initid(u64 error)
  62 {
  63         return (error & 0xff00) >> L3_ERROR_LOG_INITID;
  64 }
  65
  66 static inline unsigned omap3_l3_decode_req_info(u64 error)
  67 {
  68         return (error >> 32) & 0xffff;
  69 }
  70
  71 static char *omap3_l3_code_string(u8 code)
  72 {
  73         switch (code) {
  74         case OMAP_L3_CODE_NOERROR:
  75                 return "No Error";
  76         case OMAP_L3_CODE_UNSUP_CMD:
  77                 return "Unsupported Command";
  78         case OMAP_L3_CODE_ADDR_HOLE:
  79                 return "Address Hole";
  80         case OMAP_L3_CODE_PROTECT_VIOLATION:
  81                 return "Protection Violation";
  82         case OMAP_L3_CODE_IN_BAND_ERR:
  83                 return "In-band Error";
  84         case OMAP_L3_CODE_REQ_TOUT_NOT_ACCEPT:
  85                 return "Request Timeout Not Accepted";
  86         case OMAP_L3_CODE_REQ_TOUT_NO_RESP:
  87                 return "Request Timeout, no response";
  88         default:
  89                 return "UNKNOWN error";
  90         }
  91 }
  92
  93 static char *omap3_l3_initiator_string(u8 initid)
  94 {
  95         switch (initid) {
  96         case OMAP_L3_LCD:
  97                 return "LCD";
  98         case OMAP_L3_SAD2D:
  99                 return "SAD2D";
 100         case OMAP_L3_IA_MPU_SS_1:
 101         case OMAP_L3_IA_MPU_SS_2:
 102         case OMAP_L3_IA_MPU_SS_3:
 103         case OMAP_L3_IA_MPU_SS_4:
 104         case OMAP_L3_IA_MPU_SS_5:
 105                 return "MPU";
 106         case OMAP_L3_IA_IVA_SS_1:
 107         case OMAP_L3_IA_IVA_SS_2:
 108         case OMAP_L3_IA_IVA_SS_3:
 109                 return "IVA_SS";
 110         case OMAP_L3_IA_IVA_SS_DMA_1:
 111         case OMAP_L3_IA_IVA_SS_DMA_2:
 112         case OMAP_L3_IA_IVA_SS_DMA_3:
 113         case OMAP_L3_IA_IVA_SS_DMA_4:
 114         case OMAP_L3_IA_IVA_SS_DMA_5:
 115         case OMAP_L3_IA_IVA_SS_DMA_6:
 116                 return "IVA_SS_DMA";
 117         case OMAP_L3_IA_SGX:
 118                 return "SGX";
 119         case OMAP_L3_IA_CAM_1:
 120         case OMAP_L3_IA_CAM_2:
 121         case OMAP_L3_IA_CAM_3:
 122                 return "CAM";
 123         case OMAP_L3_IA_DAP:
 124                 return "DAP";
 125         case OMAP_L3_SDMA_WR_1:
 126         case OMAP_L3_SDMA_WR_2:
 127                 return "SDMA_WR";
 128         case OMAP_L3_SDMA_RD_1:
 129         case OMAP_L3_SDMA_RD_2:
 130         case OMAP_L3_SDMA_RD_3:
 131         case OMAP_L3_SDMA_RD_4:
 132                 return "SDMA_RD";
 133         case OMAP_L3_USBOTG:
 134                 return "USB_OTG";
 135         case OMAP_L3_USBHOST:
 136                 return "USB_HOST";
 137         default:
 138                 return "UNKNOWN Initiator";
 139         }
 140 }
 141
 142 /*
 143  * omap3_l3_block_irq - handles a register block's irq
 144  * @l3: struct omap3_l3 *
 145  * @base: register block base address
 146  * @error: L3_ERROR_LOG register of our block
 147  *
 148  * Called in hard-irq context. Caller should take care of locking
 149  *
 150  * OMAP36xx TRM gives, on page 2001, Figure 9-10, the Typical Error
 151  * Analysis Sequence, we are following that sequence here, please
 152  * refer to that Figure for more information on the subject.
 153  */
 154 static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
 155                                         u64 error, int error_addr)
 156 {
 157         u8 code = omap3_l3_decode_error_code(error);
 158         u8 initid = omap3_l3_decode_initid(error);
 159         u8 multi = error & L3_ERROR_LOG_MULTI;
 160         u32 address = omap3_l3_decode_addr(error_addr);
 161
 162         pr_err("%s seen by %s %s at address %x\n",
 163                         omap3_l3_code_string(code),
 164                         omap3_l3_initiator_string(initid),
 165                         multi ? "Multiple Errors" : "", address);
 166         WARN_ON(1);
 167
 168         return IRQ_HANDLED;
 169 }
 170
 171 static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
 172 {
 173         struct omap3_l3 *l3 = _l3;
 174         u64 status, clear;
 175         u64 error;
 176         u64 error_addr;
 177         u64 err_source = 0;
 178         void __iomem *base;
 179         int int_type;
 180         irqreturn_t ret = IRQ_NONE;
 181
 182         int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
 183         if (!int_type) {
 184                 status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_0);
 185                 /*
 186                  * if we have a timeout error, there's nothing we can
 187                  * do besides rebooting the board. So let's BUG on any
 188                  * of such errors and handle the others. timeout error
 189                  * is severe and not expected to occur.
 190                  */
 191                 BUG_ON(status & L3_STATUS_0_TIMEOUT_MASK);
 192         } else {
 193                 status = omap3_l3_readll(l3->rt, L3_SI_FLAG_STATUS_1);
 194                 /* No timeout error for debug sources */
 195         }
 196
 197         /* identify the error source */
 198         err_source = __ffs(status);
 199
 200         base = l3->rt + omap3_l3_bases[int_type][err_source];
 201         error = omap3_l3_readll(base, L3_ERROR_LOG);
 202         if (error) {
 203                 error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
 204                 ret |= omap3_l3_block_irq(l3, error, error_addr);
 205         }
 206
 207         /* Clear the status register */
 208         clear = (L3_AGENT_STATUS_CLEAR_IA << int_type) |
 209                 L3_AGENT_STATUS_CLEAR_TA;
 210         omap3_l3_writell(base, L3_AGENT_STATUS, clear);
 211
 212         /* clear the error log register */
 213         omap3_l3_writell(base, L3_ERROR_LOG, error);
 214
 215         return ret;
 216 }
 217
 218 #if IS_BUILTIN(CONFIG_OF)
 219 static const struct of_device_id omap3_l3_match[] = {
 220         {
 221                 .compatible = "ti,omap3-l3-smx",
 222         },
 223         { },
 224 };
 225 MODULE_DEVICE_TABLE(of, omap3_l3_match);
 226 #endif
 227
 228 static int omap3_l3_probe(struct platform_device *pdev)
 229 {
 230         struct omap3_l3 *l3;
 231         struct resource *res;
 232         int ret;
 233
 234         l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
 235         if (!l3)
 236                 return -ENOMEM;
 237
 238         platform_set_drvdata(pdev, l3);
 239
 240         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 241         if (!res) {
 242                 dev_err(&pdev->dev, "couldn't find resource\n");
 243                 ret = -ENODEV;
 244                 goto err0;
 245         }
 246         l3->rt = ioremap(res->start, resource_size(res));
 247         if (!l3->rt) {
 248                 dev_err(&pdev->dev, "ioremap failed\n");
 249                 ret = -ENOMEM;
 250                 goto err0;
 251         }
 252
 253         l3->debug_irq = platform_get_irq(pdev, 0);
 254         ret = request_irq(l3->debug_irq, omap3_l3_app_irq, IRQF_TRIGGER_RISING,
 255                           "l3-debug-irq", l3);
 256         if (ret) {
 257                 dev_err(&pdev->dev, "couldn't request debug irq\n");
 258                 goto err1;
 259         }
 260
 261         l3->app_irq = platform_get_irq(pdev, 1);
 262         ret = request_irq(l3->app_irq, omap3_l3_app_irq, IRQF_TRIGGER_RISING,
 263                           "l3-app-irq", l3);
 264         if (ret) {
 265                 dev_err(&pdev->dev, "couldn't request app irq\n");
 266                 goto err2;
 267         }
 268
 269         return 0;
 270
 271 err2:
 272         free_irq(l3->debug_irq, l3);
 273 err1:
 274         iounmap(l3->rt);
 275 err0:
 276         kfree(l3);
 277         return ret;
 278 }
 279
 280 static int omap3_l3_remove(struct platform_device *pdev)
 281 {
 282         struct omap3_l3         *l3 = platform_get_drvdata(pdev);
 283
 284         free_irq(l3->app_irq, l3);
 285         free_irq(l3->debug_irq, l3);
 286         iounmap(l3->rt);
 287         kfree(l3);
 288
 289         return 0;
 290 }
 291
 292 static struct platform_driver omap3_l3_driver = {
 293         .probe          = omap3_l3_probe,
 294         .remove         = omap3_l3_remove,
 295         .driver         = {
 296                 .name   = "omap_l3_smx",
 297                 .of_match_table = of_match_ptr(omap3_l3_match),
 298         },
 299 };
 300
 301 static int __init omap3_l3_init(void)
 302 {
 303         return platform_driver_register(&omap3_l3_driver);
 304 }
 305 postcore_initcall_sync(omap3_l3_init);
 306
 307 static void __exit omap3_l3_exit(void)
 308 {
 309         platform_driver_unregister(&omap3_l3_driver);
 310 }
 311 module_exit(omap3_l3_exit);
 312
 313 MODULE_AUTHOR("Felipe Balbi");
 314 MODULE_AUTHOR("Santosh Shilimkar");
 315 MODULE_AUTHOR("Sricharan R");
 316 MODULE_DESCRIPTION("OMAP3XXX L3 Interconnect Driver");
 317 MODULE_LICENSE("GPL");