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Linux 4.19.133
[linux/fpc-iii.git] / drivers / bus / ti-sysc.c
blob54c8c8644df2ec4bf280cdd81df650fa928c6e7e
1 /*
2 * ti-sysc.c - Texas Instruments sysc interconnect target driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14 #include <linux/io.h>
15 #include <linux/clk.h>
16 #include <linux/clkdev.h>
17 #include <linux/delay.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/pm_domain.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/reset.h>
23 #include <linux/of_address.h>
24 #include <linux/of_platform.h>
25 #include <linux/slab.h>
26 #include <linux/iopoll.h>
27
28 #include <linux/platform_data/ti-sysc.h>
29
30 #include <dt-bindings/bus/ti-sysc.h>
31
32 #define MAX_MODULE_SOFTRESET_WAIT 10000
33
34 static const char * const reg_names[] = { "rev", "sysc", "syss", };
35
36 enum sysc_clocks {
37 SYSC_FCK,
38 SYSC_ICK,
39 SYSC_OPTFCK0,
40 SYSC_OPTFCK1,
41 SYSC_OPTFCK2,
42 SYSC_OPTFCK3,
43 SYSC_OPTFCK4,
44 SYSC_OPTFCK5,
45 SYSC_OPTFCK6,
46 SYSC_OPTFCK7,
47 SYSC_MAX_CLOCKS,
48 };
49
50 static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", };
51
52 #define SYSC_IDLEMODE_MASK 3
53 #define SYSC_CLOCKACTIVITY_MASK 3
54
55 /**
56 * struct sysc - TI sysc interconnect target module registers and capabilities
57 * @dev: struct device pointer
58 * @module_pa: physical address of the interconnect target module
59 * @module_size: size of the interconnect target module
60 * @module_va: virtual address of the interconnect target module
61 * @offsets: register offsets from module base
62 * @clocks: clocks used by the interconnect target module
63 * @clock_roles: clock role names for the found clocks
64 * @nr_clocks: number of clocks used by the interconnect target module
65 * @legacy_mode: configured for legacy mode if set
66 * @cap: interconnect target module capabilities
67 * @cfg: interconnect target module configuration
68 * @name: name if available
69 * @revision: interconnect target module revision
70 * @needs_resume: runtime resume needed on resume from suspend
71 */
72 struct sysc {
73 struct device *dev;
74 u64 module_pa;
75 u32 module_size;
76 void __iomem *module_va;
77 int offsets[SYSC_MAX_REGS];
78 struct clk **clocks;
79 const char **clock_roles;
80 int nr_clocks;
81 struct reset_control *rsts;
82 const char *legacy_mode;
83 const struct sysc_capabilities *cap;
84 struct sysc_config cfg;
85 struct ti_sysc_cookie cookie;
86 const char *name;
87 u32 revision;
88 bool enabled;
89 bool needs_resume;
90 bool child_needs_resume;
91 struct delayed_work idle_work;
92 };
93
94 static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
95 bool is_child);
96
97 void sysc_write(struct sysc *ddata, int offset, u32 value)
98 {
99 writel_relaxed(value, ddata->module_va + offset);
100 }
101
102 static u32 sysc_read(struct sysc *ddata, int offset)
103 {
104 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
105 u32 val;
106
107 val = readw_relaxed(ddata->module_va + offset);
108 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16);
109
110 return val;
111 }
112
113 return readl_relaxed(ddata->module_va + offset);
114 }
115
116 static bool sysc_opt_clks_needed(struct sysc *ddata)
117 {
118 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
119 }
120
121 static u32 sysc_read_revision(struct sysc *ddata)
122 {
123 int offset = ddata->offsets[SYSC_REVISION];
124
125 if (offset < 0)
126 return 0;
127
128 return sysc_read(ddata, offset);
129 }
130
131 static int sysc_get_one_clock(struct sysc *ddata, const char *name)
132 {
133 int error, i, index = -ENODEV;
134
135 if (!strncmp(clock_names[SYSC_FCK], name, 3))
136 index = SYSC_FCK;
137 else if (!strncmp(clock_names[SYSC_ICK], name, 3))
138 index = SYSC_ICK;
139
140 if (index < 0) {
141 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
142 if (!ddata->clocks[i]) {
143 index = i;
144 break;
145 }
146 }
147 }
148
149 if (index < 0) {
150 dev_err(ddata->dev, "clock %s not added\n", name);
151 return index;
152 }
153
154 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
155 if (IS_ERR(ddata->clocks[index])) {
156 if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
157 return 0;
158
159 dev_err(ddata->dev, "clock get error for %s: %li\n",
160 name, PTR_ERR(ddata->clocks[index]));
161
162 return PTR_ERR(ddata->clocks[index]);
163 }
164
165 error = clk_prepare(ddata->clocks[index]);
166 if (error) {
167 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
168 name, error);
169
170 return error;
171 }
172
173 return 0;
174 }
175
176 static int sysc_get_clocks(struct sysc *ddata)
177 {
178 struct device_node *np = ddata->dev->of_node;
179 struct property *prop;
180 const char *name;
181 int nr_fck = 0, nr_ick = 0, i, error = 0;
182
183 ddata->clock_roles = devm_kcalloc(ddata->dev,
184 SYSC_MAX_CLOCKS,
185 sizeof(*ddata->clock_roles),
186 GFP_KERNEL);
187 if (!ddata->clock_roles)
188 return -ENOMEM;
189
190 of_property_for_each_string(np, "clock-names", prop, name) {
191 if (!strncmp(clock_names[SYSC_FCK], name, 3))
192 nr_fck++;
193 if (!strncmp(clock_names[SYSC_ICK], name, 3))
194 nr_ick++;
195 ddata->clock_roles[ddata->nr_clocks] = name;
196 ddata->nr_clocks++;
197 }
198
199 if (ddata->nr_clocks < 1)
200 return 0;
201
202 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
203 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
204
205 return -EINVAL;
206 }
207
208 if (nr_fck > 1 || nr_ick > 1) {
209 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
210
211 return -EINVAL;
212 }
213
214 ddata->clocks = devm_kcalloc(ddata->dev,
215 ddata->nr_clocks, sizeof(*ddata->clocks),
216 GFP_KERNEL);
217 if (!ddata->clocks)
218 return -ENOMEM;
219
220 for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
221 const char *name = ddata->clock_roles[i];
222
223 if (!name)
224 continue;
225
226 error = sysc_get_one_clock(ddata, name);
227 if (error && error != -ENOENT)
228 return error;
229 }
230
231 return 0;
232 }
233
234 /**
235 * sysc_init_resets - reset module on init
236 * @ddata: device driver data
237 *
238 * A module can have both OCP softreset control and external rstctrl.
239 * If more complicated rstctrl resets are needed, please handle these
240 * directly from the child device driver and map only the module reset
241 * for the parent interconnect target module device.
242 *
243 * Automatic reset of the module on init can be skipped with the
244 * "ti,no-reset-on-init" device tree property.
245 */
246 static int sysc_init_resets(struct sysc *ddata)
247 {
248 int error;
249
250 ddata->rsts =
251 devm_reset_control_array_get_optional_exclusive(ddata->dev);
252 if (IS_ERR(ddata->rsts))
253 return PTR_ERR(ddata->rsts);
254
255 if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
256 goto deassert;
257
258 error = reset_control_assert(ddata->rsts);
259 if (error)
260 return error;
261
262 deassert:
263 error = reset_control_deassert(ddata->rsts);
264 if (error)
265 return error;
266
267 return 0;
268 }
269
270 /**
271 * sysc_parse_and_check_child_range - parses module IO region from ranges
272 * @ddata: device driver data
273 *
274 * In general we only need rev, syss, and sysc registers and not the whole
275 * module range. But we do want the offsets for these registers from the
276 * module base. This allows us to check them against the legacy hwmod
277 * platform data. Let's also check the ranges are configured properly.
278 */
279 static int sysc_parse_and_check_child_range(struct sysc *ddata)
280 {
281 struct device_node *np = ddata->dev->of_node;
282 const __be32 *ranges;
283 u32 nr_addr, nr_size;
284 int len, error;
285
286 ranges = of_get_property(np, "ranges", &len);
287 if (!ranges) {
288 dev_err(ddata->dev, "missing ranges for %pOF\n", np);
289
290 return -ENOENT;
291 }
292
293 len /= sizeof(*ranges);
294
295 if (len < 3) {
296 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
297
298 return -EINVAL;
299 }
300
301 error = of_property_read_u32(np, "#address-cells", &nr_addr);
302 if (error)
303 return -ENOENT;
304
305 error = of_property_read_u32(np, "#size-cells", &nr_size);
306 if (error)
307 return -ENOENT;
308
309 if (nr_addr != 1 || nr_size != 1) {
310 dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
311
312 return -EINVAL;
313 }
314
315 ranges++;
316 ddata->module_pa = of_translate_address(np, ranges++);
317 ddata->module_size = be32_to_cpup(ranges);
318
319 return 0;
320 }
321
322 static struct device_node *stdout_path;
323
324 static void sysc_init_stdout_path(struct sysc *ddata)
325 {
326 struct device_node *np = NULL;
327 const char *uart;
328
329 if (IS_ERR(stdout_path))
330 return;
331
332 if (stdout_path)
333 return;
334
335 np = of_find_node_by_path("/chosen");
336 if (!np)
337 goto err;
338
339 uart = of_get_property(np, "stdout-path", NULL);
340 if (!uart)
341 goto err;
342
343 np = of_find_node_by_path(uart);
344 if (!np)
345 goto err;
346
347 stdout_path = np;
348
349 return;
350
351 err:
352 stdout_path = ERR_PTR(-ENODEV);
353 }
354
355 static void sysc_check_quirk_stdout(struct sysc *ddata,
356 struct device_node *np)
357 {
358 sysc_init_stdout_path(ddata);
359 if (np != stdout_path)
360 return;
361
362 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
363 SYSC_QUIRK_NO_RESET_ON_INIT;
364 }
365
366 /**
367 * sysc_check_one_child - check child configuration
368 * @ddata: device driver data
369 * @np: child device node
370 *
371 * Let's avoid messy situations where we have new interconnect target
372 * node but children have "ti,hwmods". These belong to the interconnect
373 * target node and are managed by this driver.
374 */
375 static int sysc_check_one_child(struct sysc *ddata,
376 struct device_node *np)
377 {
378 const char *name;
379
380 name = of_get_property(np, "ti,hwmods", NULL);
381 if (name)
382 dev_warn(ddata->dev, "really a child ti,hwmods property?");
383
384 sysc_check_quirk_stdout(ddata, np);
385 sysc_parse_dts_quirks(ddata, np, true);
386
387 return 0;
388 }
389
390 static int sysc_check_children(struct sysc *ddata)
391 {
392 struct device_node *child;
393 int error;
394
395 for_each_child_of_node(ddata->dev->of_node, child) {
396 error = sysc_check_one_child(ddata, child);
397 if (error)
398 return error;
399 }
400
401 return 0;
402 }
403
404 /*
405 * So far only I2C uses 16-bit read access with clockactivity with revision
406 * in two registers with stride of 4. We can detect this based on the rev
407 * register size to configure things far enough to be able to properly read
408 * the revision register.
409 */
410 static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
411 {
412 if (resource_size(res) == 8)
413 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
414 }
415
416 /**
417 * sysc_parse_one - parses the interconnect target module registers
418 * @ddata: device driver data
419 * @reg: register to parse
420 */
421 static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
422 {
423 struct resource *res;
424 const char *name;
425
426 switch (reg) {
427 case SYSC_REVISION:
428 case SYSC_SYSCONFIG:
429 case SYSC_SYSSTATUS:
430 name = reg_names[reg];
431 break;
432 default:
433 return -EINVAL;
434 }
435
436 res = platform_get_resource_byname(to_platform_device(ddata->dev),
437 IORESOURCE_MEM, name);
438 if (!res) {
439 ddata->offsets[reg] = -ENODEV;
440
441 return 0;
442 }
443
444 ddata->offsets[reg] = res->start - ddata->module_pa;
445 if (reg == SYSC_REVISION)
446 sysc_check_quirk_16bit(ddata, res);
447
448 return 0;
449 }
450
451 static int sysc_parse_registers(struct sysc *ddata)
452 {
453 int i, error;
454
455 for (i = 0; i < SYSC_MAX_REGS; i++) {
456 error = sysc_parse_one(ddata, i);
457 if (error)
458 return error;
459 }
460
461 return 0;
462 }
463
464 /**
465 * sysc_check_registers - check for misconfigured register overlaps
466 * @ddata: device driver data
467 */
468 static int sysc_check_registers(struct sysc *ddata)
469 {
470 int i, j, nr_regs = 0, nr_matches = 0;
471
472 for (i = 0; i < SYSC_MAX_REGS; i++) {
473 if (ddata->offsets[i] < 0)
474 continue;
475
476 if (ddata->offsets[i] > (ddata->module_size - 4)) {
477 dev_err(ddata->dev, "register outside module range");
478
479 return -EINVAL;
480 }
481
482 for (j = 0; j < SYSC_MAX_REGS; j++) {
483 if (ddata->offsets[j] < 0)
484 continue;
485
486 if (ddata->offsets[i] == ddata->offsets[j])
487 nr_matches++;
488 }
489 nr_regs++;
490 }
491
492 if (nr_regs < 1) {
493 dev_err(ddata->dev, "missing registers\n");
494
495 return -EINVAL;
496 }
497
498 if (nr_matches > nr_regs) {
499 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
500 nr_regs, nr_matches);
501
502 return -EINVAL;
503 }
504
505 return 0;
506 }
507
508 /**
509 * syc_ioremap - ioremap register space for the interconnect target module
510 * @ddata: device driver data
511 *
512 * Note that the interconnect target module registers can be anywhere
513 * within the interconnect target module range. For example, SGX has
514 * them at offset 0x1fc00 in the 32MB module address space. And cpsw
515 * has them at offset 0x1200 in the CPSW_WR child. Usually the
516 * the interconnect target module registers are at the beginning of
517 * the module range though.
518 */
519 static int sysc_ioremap(struct sysc *ddata)
520 {
521 int size;
522
523 size = max3(ddata->offsets[SYSC_REVISION],
524 ddata->offsets[SYSC_SYSCONFIG],
525 ddata->offsets[SYSC_SYSSTATUS]);
526
527 if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
528 return -EINVAL;
529
530 ddata->module_va = devm_ioremap(ddata->dev,
531 ddata->module_pa,
532 size + sizeof(u32));
533 if (!ddata->module_va)
534 return -EIO;
535
536 return 0;
537 }
538
539 /**
540 * sysc_map_and_check_registers - ioremap and check device registers
541 * @ddata: device driver data
542 */
543 static int sysc_map_and_check_registers(struct sysc *ddata)
544 {
545 int error;
546
547 error = sysc_parse_and_check_child_range(ddata);
548 if (error)
549 return error;
550
551 error = sysc_check_children(ddata);
552 if (error)
553 return error;
554
555 error = sysc_parse_registers(ddata);
556 if (error)
557 return error;
558
559 error = sysc_ioremap(ddata);
560 if (error)
561 return error;
562
563 error = sysc_check_registers(ddata);
564 if (error)
565 return error;
566
567 return 0;
568 }
569
570 /**
571 * sysc_show_rev - read and show interconnect target module revision
572 * @bufp: buffer to print the information to
573 * @ddata: device driver data
574 */
575 static int sysc_show_rev(char *bufp, struct sysc *ddata)
576 {
577 int len;
578
579 if (ddata->offsets[SYSC_REVISION] < 0)
580 return sprintf(bufp, ":NA");
581
582 len = sprintf(bufp, ":%08x", ddata->revision);
583
584 return len;
585 }
586
587 static int sysc_show_reg(struct sysc *ddata,
588 char *bufp, enum sysc_registers reg)
589 {
590 if (ddata->offsets[reg] < 0)
591 return sprintf(bufp, ":NA");
592
593 return sprintf(bufp, ":%x", ddata->offsets[reg]);
594 }
595
596 static int sysc_show_name(char *bufp, struct sysc *ddata)
597 {
598 if (!ddata->name)
599 return 0;
600
601 return sprintf(bufp, ":%s", ddata->name);
602 }
603
604 /**
605 * sysc_show_registers - show information about interconnect target module
606 * @ddata: device driver data
607 */
608 static void sysc_show_registers(struct sysc *ddata)
609 {
610 char buf[128];
611 char *bufp = buf;
612 int i;
613
614 for (i = 0; i < SYSC_MAX_REGS; i++)
615 bufp += sysc_show_reg(ddata, bufp, i);
616
617 bufp += sysc_show_rev(bufp, ddata);
618 bufp += sysc_show_name(bufp, ddata);
619
620 dev_dbg(ddata->dev, "%llx:%x%s\n",
621 ddata->module_pa, ddata->module_size,
622 buf);
623 }
624
625 static int __maybe_unused sysc_runtime_suspend(struct device *dev)
626 {
627 struct ti_sysc_platform_data *pdata;
628 struct sysc *ddata;
629 int error = 0, i;
630
631 ddata = dev_get_drvdata(dev);
632
633 if (!ddata->enabled)
634 return 0;
635
636 if (ddata->legacy_mode) {
637 pdata = dev_get_platdata(ddata->dev);
638 if (!pdata)
639 return 0;
640
641 if (!pdata->idle_module)
642 return -ENODEV;
643
644 error = pdata->idle_module(dev, &ddata->cookie);
645 if (error)
646 dev_err(dev, "%s: could not idle: %i\n",
647 __func__, error);
648
649 goto idled;
650 }
651
652 for (i = 0; i < ddata->nr_clocks; i++) {
653 if (IS_ERR_OR_NULL(ddata->clocks[i]))
654 continue;
655
656 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
657 break;
658
659 clk_disable(ddata->clocks[i]);
660 }
661
662 idled:
663 ddata->enabled = false;
664
665 return error;
666 }
667
668 static int __maybe_unused sysc_runtime_resume(struct device *dev)
669 {
670 struct ti_sysc_platform_data *pdata;
671 struct sysc *ddata;
672 int error = 0, i;
673
674 ddata = dev_get_drvdata(dev);
675
676 if (ddata->enabled)
677 return 0;
678
679 if (ddata->legacy_mode) {
680 pdata = dev_get_platdata(ddata->dev);
681 if (!pdata)
682 return 0;
683
684 if (!pdata->enable_module)
685 return -ENODEV;
686
687 error = pdata->enable_module(dev, &ddata->cookie);
688 if (error)
689 dev_err(dev, "%s: could not enable: %i\n",
690 __func__, error);
691
692 goto awake;
693 }
694
695 for (i = 0; i < ddata->nr_clocks; i++) {
696 if (IS_ERR_OR_NULL(ddata->clocks[i]))
697 continue;
698
699 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
700 break;
701
702 error = clk_enable(ddata->clocks[i]);
703 if (error)
704 return error;
705 }
706
707 awake:
708 ddata->enabled = true;
709
710 return error;
711 }
712
713 #ifdef CONFIG_PM_SLEEP
714 static int sysc_suspend(struct device *dev)
715 {
716 struct sysc *ddata;
717 int error;
718
719 ddata = dev_get_drvdata(dev);
720
721 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER |
722 SYSC_QUIRK_LEGACY_IDLE))
723 return 0;
724
725 if (!ddata->enabled)
726 return 0;
727
728 dev_dbg(ddata->dev, "%s %s\n", __func__,
729 ddata->name ? ddata->name : "");
730
731 error = pm_runtime_put_sync_suspend(dev);
732 if (error < 0) {
733 dev_warn(ddata->dev, "%s not idle %i %s\n",
734 __func__, error,
735 ddata->name ? ddata->name : "");
736
737 return 0;
738 }
739
740 ddata->needs_resume = true;
741
742 return 0;
743 }
744
745 static int sysc_resume(struct device *dev)
746 {
747 struct sysc *ddata;
748 int error;
749
750 ddata = dev_get_drvdata(dev);
751
752 if (ddata->cfg.quirks & (SYSC_QUIRK_RESOURCE_PROVIDER |
753 SYSC_QUIRK_LEGACY_IDLE))
754 return 0;
755
756 if (ddata->needs_resume) {
757 dev_dbg(ddata->dev, "%s %s\n", __func__,
758 ddata->name ? ddata->name : "");
759
760 error = pm_runtime_get_sync(dev);
761 if (error < 0) {
762 dev_err(ddata->dev, "%s error %i %s\n",
763 __func__, error,
764 ddata->name ? ddata->name : "");
765
766 return error;
767 }
768
769 ddata->needs_resume = false;
770 }
771
772 return 0;
773 }
774
775 static int sysc_noirq_suspend(struct device *dev)
776 {
777 struct sysc *ddata;
778
779 ddata = dev_get_drvdata(dev);
780
781 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
782 return 0;
783
784 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER))
785 return 0;
786
787 if (!ddata->enabled)
788 return 0;
789
790 dev_dbg(ddata->dev, "%s %s\n", __func__,
791 ddata->name ? ddata->name : "");
792
793 ddata->needs_resume = true;
794
795 return sysc_runtime_suspend(dev);
796 }
797
798 static int sysc_noirq_resume(struct device *dev)
799 {
800 struct sysc *ddata;
801
802 ddata = dev_get_drvdata(dev);
803
804 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
805 return 0;
806
807 if (!(ddata->cfg.quirks & SYSC_QUIRK_RESOURCE_PROVIDER))
808 return 0;
809
810 if (ddata->needs_resume) {
811 dev_dbg(ddata->dev, "%s %s\n", __func__,
812 ddata->name ? ddata->name : "");
813
814 ddata->needs_resume = false;
815
816 return sysc_runtime_resume(dev);
817 }
818
819 return 0;
820 }
821 #endif
822
823 static const struct dev_pm_ops sysc_pm_ops = {
824 SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume)
825 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume)
826 SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
827 sysc_runtime_resume,
828 NULL)
829 };
830
831 /* Module revision register based quirks */
832 struct sysc_revision_quirk {
833 const char *name;
834 u32 base;
835 int rev_offset;
836 int sysc_offset;
837 int syss_offset;
838 u32 revision;
839 u32 revision_mask;
840 u32 quirks;
841 };
842
843 #define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \
844 optrev_val, optrevmask, optquirkmask) \
845 { \
846 .name = (optname), \
847 .base = (optbase), \
848 .rev_offset = (optrev), \
849 .sysc_offset = (optsysc), \
850 .syss_offset = (optsyss), \
851 .revision = (optrev_val), \
852 .revision_mask = (optrevmask), \
853 .quirks = (optquirkmask), \
854 }
855
856 static const struct sysc_revision_quirk sysc_revision_quirks[] = {
857 /* These need to use noirq_suspend */
858 SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff,
859 SYSC_QUIRK_RESOURCE_PROVIDER),
860 SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xffffffff,
861 SYSC_QUIRK_RESOURCE_PROVIDER),
862 SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffffffff,
863 SYSC_QUIRK_RESOURCE_PROVIDER),
864 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff,
865 SYSC_QUIRK_RESOURCE_PROVIDER),
866 SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xffffffff,
867 SYSC_QUIRK_RESOURCE_PROVIDER),
868 SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff,
869 SYSC_QUIRK_RESOURCE_PROVIDER),
870 SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff,
871 SYSC_QUIRK_RESOURCE_PROVIDER),
872 SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff,
873 SYSC_QUIRK_RESOURCE_PROVIDER),
874 SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff,
875 SYSC_QUIRK_RESOURCE_PROVIDER),
876
877 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */
878 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffffffff,
879 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
880 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
881 SYSC_QUIRK_LEGACY_IDLE),
882 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff,
883 SYSC_QUIRK_LEGACY_IDLE),
884 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
885 SYSC_QUIRK_LEGACY_IDLE),
886 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
887 SYSC_QUIRK_LEGACY_IDLE),
888 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
889 SYSC_QUIRK_LEGACY_IDLE),
890 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
891 0),
892 /* Some timers on omap4 and later */
893 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffffffff,
894 0),
895 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
896 SYSC_QUIRK_LEGACY_IDLE),
897 /* Uarts on omap4 and later */
898 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffffffff,
899 SYSC_QUIRK_LEGACY_IDLE),
900
901 /* These devices don't yet suspend properly without legacy setting */
902 SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffffffff,
903 SYSC_QUIRK_LEGACY_IDLE),
904 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xffffffff,
905 SYSC_QUIRK_LEGACY_IDLE),
906 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0d00, 0xffffffff,
907 SYSC_QUIRK_LEGACY_IDLE),
908
909 #ifdef DEBUG
910 SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0),
911 SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
912 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0),
913 SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
914 SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
915 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0),
916 SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0),
917 SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0),
918 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0),
919 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0),
920 SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0),
921 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
922 SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0),
923 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
924 0xffffffff, 0),
925 #endif
926 };
927
928 static void sysc_init_revision_quirks(struct sysc *ddata)
929 {
930 const struct sysc_revision_quirk *q;
931 int i;
932
933 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) {
934 q = &sysc_revision_quirks[i];
935
936 if (q->base && q->base != ddata->module_pa)
937 continue;
938
939 if (q->rev_offset >= 0 &&
940 q->rev_offset != ddata->offsets[SYSC_REVISION])
941 continue;
942
943 if (q->sysc_offset >= 0 &&
944 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
945 continue;
946
947 if (q->syss_offset >= 0 &&
948 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
949 continue;
950
951 if (q->revision == ddata->revision ||
952 (q->revision & q->revision_mask) ==
953 (ddata->revision & q->revision_mask)) {
954 ddata->name = q->name;
955 ddata->cfg.quirks |= q->quirks;
956 }
957 }
958 }
959
960 static int sysc_reset(struct sysc *ddata)
961 {
962 int offset = ddata->offsets[SYSC_SYSCONFIG];
963 int val;
964
965 if (ddata->legacy_mode || offset < 0 ||
966 ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
967 return 0;
968
969 /*
970 * Currently only support reset status in sysstatus.
971 * Warn and return error in all other cases
972 */
973 if (!ddata->cfg.syss_mask) {
974 dev_err(ddata->dev, "No ti,syss-mask. Reset failed\n");
975 return -EINVAL;
976 }
977
978 val = sysc_read(ddata, offset);
979 val |= (0x1 << ddata->cap->regbits->srst_shift);
980 sysc_write(ddata, offset, val);
981
982 /* Poll on reset status */
983 offset = ddata->offsets[SYSC_SYSSTATUS];
984
985 return readl_poll_timeout(ddata->module_va + offset, val,
986 (val & ddata->cfg.syss_mask) == 0x0,
987 100, MAX_MODULE_SOFTRESET_WAIT);
988 }
989
990 /* At this point the module is configured enough to read the revision */
991 static int sysc_init_module(struct sysc *ddata)
992 {
993 int error;
994
995 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) {
996 ddata->revision = sysc_read_revision(ddata);
997 goto rev_quirks;
998 }
999
1000 error = pm_runtime_get_sync(ddata->dev);
1001 if (error < 0) {
1002 pm_runtime_put_noidle(ddata->dev);
1003
1004 return 0;
1005 }
1006
1007 error = sysc_reset(ddata);
1008 if (error) {
1009 dev_err(ddata->dev, "Reset failed with %d\n", error);
1010 pm_runtime_put_sync(ddata->dev);
1011
1012 return error;
1013 }
1014
1015 ddata->revision = sysc_read_revision(ddata);
1016 pm_runtime_put_sync(ddata->dev);
1017
1018 rev_quirks:
1019 sysc_init_revision_quirks(ddata);
1020
1021 return 0;
1022 }
1023
1024 static int sysc_init_sysc_mask(struct sysc *ddata)
1025 {
1026 struct device_node *np = ddata->dev->of_node;
1027 int error;
1028 u32 val;
1029
1030 error = of_property_read_u32(np, "ti,sysc-mask", &val);
1031 if (error)
1032 return 0;
1033
1034 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
1035
1036 return 0;
1037 }
1038
1039 static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
1040 const char *name)
1041 {
1042 struct device_node *np = ddata->dev->of_node;
1043 struct property *prop;
1044 const __be32 *p;
1045 u32 val;
1046
1047 of_property_for_each_u32(np, name, prop, p, val) {
1048 if (val >= SYSC_NR_IDLEMODES) {
1049 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
1050 return -EINVAL;
1051 }
1052 *idlemodes |= (1 << val);
1053 }
1054
1055 return 0;
1056 }
1057
1058 static int sysc_init_idlemodes(struct sysc *ddata)
1059 {
1060 int error;
1061
1062 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
1063 "ti,sysc-midle");
1064 if (error)
1065 return error;
1066
1067 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
1068 "ti,sysc-sidle");
1069 if (error)
1070 return error;
1071
1072 return 0;
1073 }
1074
1075 /*
1076 * Only some devices on omap4 and later have SYSCONFIG reset done
1077 * bit. We can detect this if there is no SYSSTATUS at all, or the
1078 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers
1079 * have multiple bits for the child devices like OHCI and EHCI.
1080 * Depends on SYSC being parsed first.
1081 */
1082 static int sysc_init_syss_mask(struct sysc *ddata)
1083 {
1084 struct device_node *np = ddata->dev->of_node;
1085 int error;
1086 u32 val;
1087
1088 error = of_property_read_u32(np, "ti,syss-mask", &val);
1089 if (error) {
1090 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
1091 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
1092 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1093 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1094
1095 return 0;
1096 }
1097
1098 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1099 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1100
1101 ddata->cfg.syss_mask = val;
1102
1103 return 0;
1104 }
1105
1106 /*
1107 * Many child device drivers need to have fck and opt clocks available
1108 * to get the clock rate for device internal configuration etc.
1109 */
1110 static int sysc_child_add_named_clock(struct sysc *ddata,
1111 struct device *child,
1112 const char *name)
1113 {
1114 struct clk *clk;
1115 struct clk_lookup *l;
1116 int error = 0;
1117
1118 if (!name)
1119 return 0;
1120
1121 clk = clk_get(child, name);
1122 if (!IS_ERR(clk)) {
1123 clk_put(clk);
1124
1125 return -EEXIST;
1126 }
1127
1128 clk = clk_get(ddata->dev, name);
1129 if (IS_ERR(clk))
1130 return -ENODEV;
1131
1132 l = clkdev_create(clk, name, dev_name(child));
1133 if (!l)
1134 error = -ENOMEM;
1135
1136 clk_put(clk);
1137
1138 return error;
1139 }
1140
1141 static int sysc_child_add_clocks(struct sysc *ddata,
1142 struct device *child)
1143 {
1144 int i, error;
1145
1146 for (i = 0; i < ddata->nr_clocks; i++) {
1147 error = sysc_child_add_named_clock(ddata,
1148 child,
1149 ddata->clock_roles[i]);
1150 if (error && error != -EEXIST) {
1151 dev_err(ddata->dev, "could not add child clock %s: %i\n",
1152 ddata->clock_roles[i], error);
1153
1154 return error;
1155 }
1156 }
1157
1158 return 0;
1159 }
1160
1161 static struct device_type sysc_device_type = {
1162 };
1163
1164 static struct sysc *sysc_child_to_parent(struct device *dev)
1165 {
1166 struct device *parent = dev->parent;
1167
1168 if (!parent || parent->type != &sysc_device_type)
1169 return NULL;
1170
1171 return dev_get_drvdata(parent);
1172 }
1173
1174 static int __maybe_unused sysc_child_runtime_suspend(struct device *dev)
1175 {
1176 struct sysc *ddata;
1177 int error;
1178
1179 ddata = sysc_child_to_parent(dev);
1180
1181 error = pm_generic_runtime_suspend(dev);
1182 if (error)
1183 return error;
1184
1185 if (!ddata->enabled)
1186 return 0;
1187
1188 return sysc_runtime_suspend(ddata->dev);
1189 }
1190
1191 static int __maybe_unused sysc_child_runtime_resume(struct device *dev)
1192 {
1193 struct sysc *ddata;
1194 int error;
1195
1196 ddata = sysc_child_to_parent(dev);
1197
1198 if (!ddata->enabled) {
1199 error = sysc_runtime_resume(ddata->dev);
1200 if (error < 0)
1201 dev_err(ddata->dev,
1202 "%s error: %i\n", __func__, error);
1203 }
1204
1205 return pm_generic_runtime_resume(dev);
1206 }
1207
1208 #ifdef CONFIG_PM_SLEEP
1209 static int sysc_child_suspend_noirq(struct device *dev)
1210 {
1211 struct sysc *ddata;
1212 int error;
1213
1214 ddata = sysc_child_to_parent(dev);
1215
1216 dev_dbg(ddata->dev, "%s %s\n", __func__,
1217 ddata->name ? ddata->name : "");
1218
1219 error = pm_generic_suspend_noirq(dev);
1220 if (error) {
1221 dev_err(dev, "%s error at %i: %i\n",
1222 __func__, __LINE__, error);
1223
1224 return error;
1225 }
1226
1227 if (!pm_runtime_status_suspended(dev)) {
1228 error = pm_generic_runtime_suspend(dev);
1229 if (error) {
1230 dev_warn(dev, "%s busy at %i: %i\n",
1231 __func__, __LINE__, error);
1232
1233 return 0;
1234 }
1235
1236 error = sysc_runtime_suspend(ddata->dev);
1237 if (error) {
1238 dev_err(dev, "%s error at %i: %i\n",
1239 __func__, __LINE__, error);
1240
1241 return error;
1242 }
1243
1244 ddata->child_needs_resume = true;
1245 }
1246
1247 return 0;
1248 }
1249
1250 static int sysc_child_resume_noirq(struct device *dev)
1251 {
1252 struct sysc *ddata;
1253 int error;
1254
1255 ddata = sysc_child_to_parent(dev);
1256
1257 dev_dbg(ddata->dev, "%s %s\n", __func__,
1258 ddata->name ? ddata->name : "");
1259
1260 if (ddata->child_needs_resume) {
1261 ddata->child_needs_resume = false;
1262
1263 error = sysc_runtime_resume(ddata->dev);
1264 if (error)
1265 dev_err(ddata->dev,
1266 "%s runtime resume error: %i\n",
1267 __func__, error);
1268
1269 error = pm_generic_runtime_resume(dev);
1270 if (error)
1271 dev_err(ddata->dev,
1272 "%s generic runtime resume: %i\n",
1273 __func__, error);
1274 }
1275
1276 return pm_generic_resume_noirq(dev);
1277 }
1278 #endif
1279
1280 struct dev_pm_domain sysc_child_pm_domain = {
1281 .ops = {
1282 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,
1283 sysc_child_runtime_resume,
1284 NULL)
1285 USE_PLATFORM_PM_SLEEP_OPS
1286 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq,
1287 sysc_child_resume_noirq)
1288 }
1289 };
1290
1291 /**
1292 * sysc_legacy_idle_quirk - handle children in omap_device compatible way
1293 * @ddata: device driver data
1294 * @child: child device driver
1295 *
1296 * Allow idle for child devices as done with _od_runtime_suspend().
1297 * Otherwise many child devices will not idle because of the permanent
1298 * parent usecount set in pm_runtime_irq_safe().
1299 *
1300 * Note that the long term solution is to just modify the child device
1301 * drivers to not set pm_runtime_irq_safe() and then this can be just
1302 * dropped.
1303 */
1304 static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
1305 {
1306 if (!ddata->legacy_mode)
1307 return;
1308
1309 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
1310 dev_pm_domain_set(child, &sysc_child_pm_domain);
1311 }
1312
1313 static int sysc_notifier_call(struct notifier_block *nb,
1314 unsigned long event, void *device)
1315 {
1316 struct device *dev = device;
1317 struct sysc *ddata;
1318 int error;
1319
1320 ddata = sysc_child_to_parent(dev);
1321 if (!ddata)
1322 return NOTIFY_DONE;
1323
1324 switch (event) {
1325 case BUS_NOTIFY_ADD_DEVICE:
1326 error = sysc_child_add_clocks(ddata, dev);
1327 if (error)
1328 return error;
1329 sysc_legacy_idle_quirk(ddata, dev);
1330 break;
1331 default:
1332 break;
1333 }
1334
1335 return NOTIFY_DONE;
1336 }
1337
1338 static struct notifier_block sysc_nb = {
1339 .notifier_call = sysc_notifier_call,
1340 };
1341
1342 /* Device tree configured quirks */
1343 struct sysc_dts_quirk {
1344 const char *name;
1345 u32 mask;
1346 };
1347
1348 static const struct sysc_dts_quirk sysc_dts_quirks[] = {
1349 { .name = "ti,no-idle-on-init",
1350 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, },
1351 { .name = "ti,no-reset-on-init",
1352 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, },
1353 };
1354
1355 static void sysc_parse_dts_quirks(struct sysc *ddata, struct device_node *np,
1356 bool is_child)
1357 {
1358 const struct property *prop;
1359 int i, len;
1360
1361 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) {
1362 const char *name = sysc_dts_quirks[i].name;
1363
1364 prop = of_get_property(np, name, &len);
1365 if (!prop)
1366 continue;
1367
1368 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
1369 if (is_child) {
1370 dev_warn(ddata->dev,
1371 "dts flag should be at module level for %s\n",
1372 name);
1373 }
1374 }
1375 }
1376
1377 static int sysc_init_dts_quirks(struct sysc *ddata)
1378 {
1379 struct device_node *np = ddata->dev->of_node;
1380 int error;
1381 u32 val;
1382
1383 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
1384
1385 sysc_parse_dts_quirks(ddata, np, false);
1386 error = of_property_read_u32(np, "ti,sysc-delay-us", &val);
1387 if (!error) {
1388 if (val > 255) {
1389 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
1390 val);
1391 }
1392
1393 ddata->cfg.srst_udelay = (u8)val;
1394 }
1395
1396 return 0;
1397 }
1398
1399 static void sysc_unprepare(struct sysc *ddata)
1400 {
1401 int i;
1402
1403 if (!ddata->clocks)
1404 return;
1405
1406 for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
1407 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
1408 clk_unprepare(ddata->clocks[i]);
1409 }
1410 }
1411
1412 /*
1413 * Common sysc register bits found on omap2, also known as type1
1414 */
1415 static const struct sysc_regbits sysc_regbits_omap2 = {
1416 .dmadisable_shift = -ENODEV,
1417 .midle_shift = 12,
1418 .sidle_shift = 3,
1419 .clkact_shift = 8,
1420 .emufree_shift = 5,
1421 .enwkup_shift = 2,
1422 .srst_shift = 1,
1423 .autoidle_shift = 0,
1424 };
1425
1426 static const struct sysc_capabilities sysc_omap2 = {
1427 .type = TI_SYSC_OMAP2,
1428 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1429 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1430 SYSC_OMAP2_AUTOIDLE,
1431 .regbits = &sysc_regbits_omap2,
1432 };
1433
1434 /* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */
1435 static const struct sysc_capabilities sysc_omap2_timer = {
1436 .type = TI_SYSC_OMAP2_TIMER,
1437 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1438 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1439 SYSC_OMAP2_AUTOIDLE,
1440 .regbits = &sysc_regbits_omap2,
1441 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT,
1442 };
1443
1444 /*
1445 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2
1446 * with different sidle position
1447 */
1448 static const struct sysc_regbits sysc_regbits_omap3_sham = {
1449 .dmadisable_shift = -ENODEV,
1450 .midle_shift = -ENODEV,
1451 .sidle_shift = 4,
1452 .clkact_shift = -ENODEV,
1453 .enwkup_shift = -ENODEV,
1454 .srst_shift = 1,
1455 .autoidle_shift = 0,
1456 .emufree_shift = -ENODEV,
1457 };
1458
1459 static const struct sysc_capabilities sysc_omap3_sham = {
1460 .type = TI_SYSC_OMAP3_SHAM,
1461 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1462 .regbits = &sysc_regbits_omap3_sham,
1463 };
1464
1465 /*
1466 * AES register bits found on omap3 and later, a variant of
1467 * sysc_regbits_omap2 with different sidle position
1468 */
1469 static const struct sysc_regbits sysc_regbits_omap3_aes = {
1470 .dmadisable_shift = -ENODEV,
1471 .midle_shift = -ENODEV,
1472 .sidle_shift = 6,
1473 .clkact_shift = -ENODEV,
1474 .enwkup_shift = -ENODEV,
1475 .srst_shift = 1,
1476 .autoidle_shift = 0,
1477 .emufree_shift = -ENODEV,
1478 };
1479
1480 static const struct sysc_capabilities sysc_omap3_aes = {
1481 .type = TI_SYSC_OMAP3_AES,
1482 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1483 .regbits = &sysc_regbits_omap3_aes,
1484 };
1485
1486 /*
1487 * Common sysc register bits found on omap4, also known as type2
1488 */
1489 static const struct sysc_regbits sysc_regbits_omap4 = {
1490 .dmadisable_shift = 16,
1491 .midle_shift = 4,
1492 .sidle_shift = 2,
1493 .clkact_shift = -ENODEV,
1494 .enwkup_shift = -ENODEV,
1495 .emufree_shift = 1,
1496 .srst_shift = 0,
1497 .autoidle_shift = -ENODEV,
1498 };
1499
1500 static const struct sysc_capabilities sysc_omap4 = {
1501 .type = TI_SYSC_OMAP4,
1502 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1503 SYSC_OMAP4_SOFTRESET,
1504 .regbits = &sysc_regbits_omap4,
1505 };
1506
1507 static const struct sysc_capabilities sysc_omap4_timer = {
1508 .type = TI_SYSC_OMAP4_TIMER,
1509 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1510 SYSC_OMAP4_SOFTRESET,
1511 .regbits = &sysc_regbits_omap4,
1512 };
1513
1514 /*
1515 * Common sysc register bits found on omap4, also known as type3
1516 */
1517 static const struct sysc_regbits sysc_regbits_omap4_simple = {
1518 .dmadisable_shift = -ENODEV,
1519 .midle_shift = 2,
1520 .sidle_shift = 0,
1521 .clkact_shift = -ENODEV,
1522 .enwkup_shift = -ENODEV,
1523 .srst_shift = -ENODEV,
1524 .emufree_shift = -ENODEV,
1525 .autoidle_shift = -ENODEV,
1526 };
1527
1528 static const struct sysc_capabilities sysc_omap4_simple = {
1529 .type = TI_SYSC_OMAP4_SIMPLE,
1530 .regbits = &sysc_regbits_omap4_simple,
1531 };
1532
1533 /*
1534 * SmartReflex sysc found on omap34xx
1535 */
1536 static const struct sysc_regbits sysc_regbits_omap34xx_sr = {
1537 .dmadisable_shift = -ENODEV,
1538 .midle_shift = -ENODEV,
1539 .sidle_shift = -ENODEV,
1540 .clkact_shift = 20,
1541 .enwkup_shift = -ENODEV,
1542 .srst_shift = -ENODEV,
1543 .emufree_shift = -ENODEV,
1544 .autoidle_shift = -ENODEV,
1545 };
1546
1547 static const struct sysc_capabilities sysc_34xx_sr = {
1548 .type = TI_SYSC_OMAP34XX_SR,
1549 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY,
1550 .regbits = &sysc_regbits_omap34xx_sr,
1551 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED |
1552 SYSC_QUIRK_LEGACY_IDLE,
1553 };
1554
1555 /*
1556 * SmartReflex sysc found on omap36xx and later
1557 */
1558 static const struct sysc_regbits sysc_regbits_omap36xx_sr = {
1559 .dmadisable_shift = -ENODEV,
1560 .midle_shift = -ENODEV,
1561 .sidle_shift = 24,
1562 .clkact_shift = -ENODEV,
1563 .enwkup_shift = 26,
1564 .srst_shift = -ENODEV,
1565 .emufree_shift = -ENODEV,
1566 .autoidle_shift = -ENODEV,
1567 };
1568
1569 static const struct sysc_capabilities sysc_36xx_sr = {
1570 .type = TI_SYSC_OMAP36XX_SR,
1571 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP,
1572 .regbits = &sysc_regbits_omap36xx_sr,
1573 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE,
1574 };
1575
1576 static const struct sysc_capabilities sysc_omap4_sr = {
1577 .type = TI_SYSC_OMAP4_SR,
1578 .regbits = &sysc_regbits_omap36xx_sr,
1579 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE,
1580 };
1581
1582 /*
1583 * McASP register bits found on omap4 and later
1584 */
1585 static const struct sysc_regbits sysc_regbits_omap4_mcasp = {
1586 .dmadisable_shift = -ENODEV,
1587 .midle_shift = -ENODEV,
1588 .sidle_shift = 0,
1589 .clkact_shift = -ENODEV,
1590 .enwkup_shift = -ENODEV,
1591 .srst_shift = -ENODEV,
1592 .emufree_shift = -ENODEV,
1593 .autoidle_shift = -ENODEV,
1594 };
1595
1596 static const struct sysc_capabilities sysc_omap4_mcasp = {
1597 .type = TI_SYSC_OMAP4_MCASP,
1598 .regbits = &sysc_regbits_omap4_mcasp,
1599 .mod_quirks = SYSC_QUIRK_OPT_CLKS_NEEDED,
1600 };
1601
1602 /*
1603 * McASP found on dra7 and later
1604 */
1605 static const struct sysc_capabilities sysc_dra7_mcasp = {
1606 .type = TI_SYSC_OMAP4_SIMPLE,
1607 .regbits = &sysc_regbits_omap4_simple,
1608 .mod_quirks = SYSC_QUIRK_OPT_CLKS_NEEDED,
1609 };
1610
1611 /*
1612 * FS USB host found on omap4 and later
1613 */
1614 static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = {
1615 .dmadisable_shift = -ENODEV,
1616 .midle_shift = -ENODEV,
1617 .sidle_shift = 24,
1618 .clkact_shift = -ENODEV,
1619 .enwkup_shift = 26,
1620 .srst_shift = -ENODEV,
1621 .emufree_shift = -ENODEV,
1622 .autoidle_shift = -ENODEV,
1623 };
1624
1625 static const struct sysc_capabilities sysc_omap4_usb_host_fs = {
1626 .type = TI_SYSC_OMAP4_USB_HOST_FS,
1627 .sysc_mask = SYSC_OMAP2_ENAWAKEUP,
1628 .regbits = &sysc_regbits_omap4_usb_host_fs,
1629 };
1630
1631 static const struct sysc_regbits sysc_regbits_dra7_mcan = {
1632 .dmadisable_shift = -ENODEV,
1633 .midle_shift = -ENODEV,
1634 .sidle_shift = -ENODEV,
1635 .clkact_shift = -ENODEV,
1636 .enwkup_shift = 4,
1637 .srst_shift = 0,
1638 .emufree_shift = -ENODEV,
1639 .autoidle_shift = -ENODEV,
1640 };
1641
1642 static const struct sysc_capabilities sysc_dra7_mcan = {
1643 .type = TI_SYSC_DRA7_MCAN,
1644 .sysc_mask = SYSC_DRA7_MCAN_ENAWAKEUP | SYSC_OMAP4_SOFTRESET,
1645 .regbits = &sysc_regbits_dra7_mcan,
1646 };
1647
1648 static int sysc_init_pdata(struct sysc *ddata)
1649 {
1650 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
1651 struct ti_sysc_module_data mdata;
1652 int error = 0;
1653
1654 if (!pdata || !ddata->legacy_mode)
1655 return 0;
1656
1657 mdata.name = ddata->legacy_mode;
1658 mdata.module_pa = ddata->module_pa;
1659 mdata.module_size = ddata->module_size;
1660 mdata.offsets = ddata->offsets;
1661 mdata.nr_offsets = SYSC_MAX_REGS;
1662 mdata.cap = ddata->cap;
1663 mdata.cfg = &ddata->cfg;
1664
1665 if (!pdata->init_module)
1666 return -ENODEV;
1667
1668 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie);
1669 if (error == -EEXIST)
1670 error = 0;
1671
1672 return error;
1673 }
1674
1675 static int sysc_init_match(struct sysc *ddata)
1676 {
1677 const struct sysc_capabilities *cap;
1678
1679 cap = of_device_get_match_data(ddata->dev);
1680 if (!cap)
1681 return -EINVAL;
1682
1683 ddata->cap = cap;
1684 if (ddata->cap)
1685 ddata->cfg.quirks |= ddata->cap->mod_quirks;
1686
1687 return 0;
1688 }
1689
1690 static void ti_sysc_idle(struct work_struct *work)
1691 {
1692 struct sysc *ddata;
1693
1694 ddata = container_of(work, struct sysc, idle_work.work);
1695
1696 if (pm_runtime_active(ddata->dev))
1697 pm_runtime_put_sync(ddata->dev);
1698 }
1699
1700 static const struct of_device_id sysc_match_table[] = {
1701 { .compatible = "simple-bus", },
1702 { /* sentinel */ },
1703 };
1704
1705 static int sysc_probe(struct platform_device *pdev)
1706 {
1707 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev);
1708 struct sysc *ddata;
1709 int error;
1710
1711 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
1712 if (!ddata)
1713 return -ENOMEM;
1714
1715 ddata->dev = &pdev->dev;
1716 platform_set_drvdata(pdev, ddata);
1717
1718 error = sysc_init_match(ddata);
1719 if (error)
1720 return error;
1721
1722 error = sysc_init_dts_quirks(ddata);
1723 if (error)
1724 return error;
1725
1726 error = sysc_get_clocks(ddata);
1727 if (error)
1728 return error;
1729
1730 error = sysc_map_and_check_registers(ddata);
1731 if (error)
1732 return error;
1733
1734 error = sysc_init_sysc_mask(ddata);
1735 if (error)
1736 return error;
1737
1738 error = sysc_init_idlemodes(ddata);
1739 if (error)
1740 return error;
1741
1742 error = sysc_init_syss_mask(ddata);
1743 if (error)
1744 return error;
1745
1746 error = sysc_init_pdata(ddata);
1747 if (error)
1748 return error;
1749
1750 error = sysc_init_resets(ddata);
1751 if (error)
1752 goto unprepare;
1753
1754 pm_runtime_enable(ddata->dev);
1755 error = sysc_init_module(ddata);
1756 if (error)
1757 goto unprepare;
1758
1759 error = pm_runtime_get_sync(ddata->dev);
1760 if (error < 0) {
1761 pm_runtime_put_noidle(ddata->dev);
1762 pm_runtime_disable(ddata->dev);
1763 goto unprepare;
1764 }
1765
1766 sysc_show_registers(ddata);
1767
1768 ddata->dev->type = &sysc_device_type;
1769 error = of_platform_populate(ddata->dev->of_node, sysc_match_table,
1770 pdata ? pdata->auxdata : NULL,
1771 ddata->dev);
1772 if (error)
1773 goto err;
1774
1775 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
1776
1777 /* At least earlycon won't survive without deferred idle */
1778 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT |
1779 SYSC_QUIRK_NO_RESET_ON_INIT)) {
1780 schedule_delayed_work(&ddata->idle_work, 3000);
1781 } else {
1782 pm_runtime_put(&pdev->dev);
1783 }
1784
1785 if (!of_get_available_child_count(ddata->dev->of_node))
1786 reset_control_assert(ddata->rsts);
1787
1788 return 0;
1789
1790 err:
1791 pm_runtime_put_sync(&pdev->dev);
1792 pm_runtime_disable(&pdev->dev);
1793 unprepare:
1794 sysc_unprepare(ddata);
1795
1796 return error;
1797 }
1798
1799 static int sysc_remove(struct platform_device *pdev)
1800 {
1801 struct sysc *ddata = platform_get_drvdata(pdev);
1802 int error;
1803
1804 cancel_delayed_work_sync(&ddata->idle_work);
1805
1806 error = pm_runtime_get_sync(ddata->dev);
1807 if (error < 0) {
1808 pm_runtime_put_noidle(ddata->dev);
1809 pm_runtime_disable(ddata->dev);
1810 goto unprepare;
1811 }
1812
1813 of_platform_depopulate(&pdev->dev);
1814
1815 pm_runtime_put_sync(&pdev->dev);
1816 pm_runtime_disable(&pdev->dev);
1817 reset_control_assert(ddata->rsts);
1818
1819 unprepare:
1820 sysc_unprepare(ddata);
1821
1822 return 0;
1823 }
1824
1825 static const struct of_device_id sysc_match[] = {
1826 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, },
1827 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, },
1828 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, },
1829 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, },
1830 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, },
1831 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, },
1832 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, },
1833 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, },
1834 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, },
1835 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, },
1836 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, },
1837 { .compatible = "ti,sysc-dra7-mcasp", .data = &sysc_dra7_mcasp, },
1838 { .compatible = "ti,sysc-usb-host-fs",
1839 .data = &sysc_omap4_usb_host_fs, },
1840 { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, },
1841 { },
1842 };
1843 MODULE_DEVICE_TABLE(of, sysc_match);
1844
1845 static struct platform_driver sysc_driver = {
1846 .probe = sysc_probe,
1847 .remove = sysc_remove,
1848 .driver = {
1849 .name = "ti-sysc",
1850 .of_match_table = sysc_match,
1851 .pm = &sysc_pm_ops,
1852 },
1853 };
1854
1855 static int __init sysc_init(void)
1856 {
1857 bus_register_notifier(&platform_bus_type, &sysc_nb);
1858
1859 return platform_driver_register(&sysc_driver);
1860 }
1861 module_init(sysc_init);
1862
1863 static void __exit sysc_exit(void)
1864 {
1865 bus_unregister_notifier(&platform_bus_type, &sysc_nb);
1866 platform_driver_unregister(&sysc_driver);
1867 }
1868 module_exit(sysc_exit);
1869
1870 MODULE_DESCRIPTION("TI sysc interconnect target driver");
1871 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support