1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (c) 2017 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 #ifndef __GXBB_AOCLKC_H
8 #define __GXBB_AOCLKC_H
12 /* AO Configuration Clock registers offsets */
13 #define AO_RTI_PWR_CNTL_REG1 0x0c
14 #define AO_RTI_PWR_CNTL_REG0 0x10
15 #define AO_RTI_GEN_CNTL_REG0 0x40
16 #define AO_OSCIN_CNTL 0x58
17 #define AO_CRT_CLK_CNTL1 0x68
18 #define AO_RTC_ALT_CLK_CNTL0 0x94
19 #define AO_RTC_ALT_CLK_CNTL1 0x98
21 struct aoclk_cec_32k
{
23 struct regmap
*regmap
;
26 #define to_aoclk_cec_32k(_hw) container_of(_hw, struct aoclk_cec_32k, hw)
28 extern const struct clk_ops meson_aoclk_cec_32k_ops
;
30 #include <dt-bindings/clock/gxbb-aoclkc.h>
31 #include <dt-bindings/reset/gxbb-aoclkc.h>
33 #endif /* __GXBB_AOCLKC_H */