drivers/clk/rockchip/Makefile

   1 # SPDX-License-Identifier: GPL-2.0
   2 #
   3 # Rockchip Clock specific Makefile
   4 #
   5
   6 obj-y   += clk.o
   7 obj-y   += clk-pll.o
   8 obj-y   += clk-cpu.o
   9 obj-y   += clk-half-divider.o
  10 obj-y   += clk-inverter.o
  11 obj-y   += clk-mmc-phase.o
  12 obj-y   += clk-muxgrf.o
  13 obj-y   += clk-ddr.o
  14 obj-$(CONFIG_RESET_CONTROLLER)  += softrst.o
  15
  16 obj-y   += clk-px30.o
  17 obj-y   += clk-rv1108.o
  18 obj-y   += clk-rk3036.o
  19 obj-y   += clk-rk3128.o
  20 obj-y   += clk-rk3188.o
  21 obj-y   += clk-rk3228.o
  22 obj-y   += clk-rk3288.o
  23 obj-y   += clk-rk3328.o
  24 obj-y   += clk-rk3368.o
  25 obj-y   += clk-rk3399.o