1 // SPDX-License-Identifier: GPL-2.0
3 * System Control and Management Interface (SCMI) Clock Protocol
5 * Copyright (C) 2018 ARM Ltd.
10 enum scmi_clock_protocol_cmd
{
11 CLOCK_ATTRIBUTES
= 0x3,
12 CLOCK_DESCRIBE_RATES
= 0x4,
15 CLOCK_CONFIG_SET
= 0x7,
18 struct scmi_msg_resp_clock_protocol_attributes
{
24 struct scmi_msg_resp_clock_attributes
{
26 #define CLOCK_ENABLE BIT(0)
27 u8 name
[SCMI_MAX_STR_SIZE
];
30 struct scmi_clock_set_config
{
35 struct scmi_msg_clock_describe_rates
{
40 struct scmi_msg_resp_clock_describe_rates
{
41 __le32 num_rates_flags
;
42 #define NUM_RETURNED(x) ((x) & 0xfff)
43 #define RATE_DISCRETE(x) !((x) & BIT(12))
44 #define NUM_REMAINING(x) ((x) >> 16)
49 #define RATE_TO_U64(X) \
52 le32_to_cpu((x).value_low) | (u64)le32_to_cpu((x).value_high) << 32; \
56 struct scmi_clock_set_rate
{
58 #define CLOCK_SET_ASYNC BIT(0)
59 #define CLOCK_SET_DELAYED BIT(1)
60 #define CLOCK_SET_ROUND_UP BIT(2)
61 #define CLOCK_SET_ROUND_AUTO BIT(3)
70 struct scmi_clock_info
*clk
;
73 static int scmi_clock_protocol_attributes_get(const struct scmi_handle
*handle
,
74 struct clock_info
*ci
)
78 struct scmi_msg_resp_clock_protocol_attributes
*attr
;
80 ret
= scmi_xfer_get_init(handle
, PROTOCOL_ATTRIBUTES
,
81 SCMI_PROTOCOL_CLOCK
, 0, sizeof(*attr
), &t
);
87 ret
= scmi_do_xfer(handle
, t
);
89 ci
->num_clocks
= le16_to_cpu(attr
->num_clocks
);
90 ci
->max_async_req
= attr
->max_async_req
;
93 scmi_xfer_put(handle
, t
);
97 static int scmi_clock_attributes_get(const struct scmi_handle
*handle
,
98 u32 clk_id
, struct scmi_clock_info
*clk
)
102 struct scmi_msg_resp_clock_attributes
*attr
;
104 ret
= scmi_xfer_get_init(handle
, CLOCK_ATTRIBUTES
, SCMI_PROTOCOL_CLOCK
,
105 sizeof(clk_id
), sizeof(*attr
), &t
);
109 *(__le32
*)t
->tx
.buf
= cpu_to_le32(clk_id
);
112 ret
= scmi_do_xfer(handle
, t
);
114 strlcpy(clk
->name
, attr
->name
, SCMI_MAX_STR_SIZE
);
118 scmi_xfer_put(handle
, t
);
123 scmi_clock_describe_rates_get(const struct scmi_handle
*handle
, u32 clk_id
,
124 struct scmi_clock_info
*clk
)
128 bool rate_discrete
= false;
129 u32 tot_rate_cnt
= 0, rates_flag
;
130 u16 num_returned
, num_remaining
;
132 struct scmi_msg_clock_describe_rates
*clk_desc
;
133 struct scmi_msg_resp_clock_describe_rates
*rlist
;
135 ret
= scmi_xfer_get_init(handle
, CLOCK_DESCRIBE_RATES
,
136 SCMI_PROTOCOL_CLOCK
, sizeof(*clk_desc
), 0, &t
);
140 clk_desc
= t
->tx
.buf
;
144 clk_desc
->id
= cpu_to_le32(clk_id
);
145 /* Set the number of rates to be skipped/already read */
146 clk_desc
->rate_index
= cpu_to_le32(tot_rate_cnt
);
148 ret
= scmi_do_xfer(handle
, t
);
152 rates_flag
= le32_to_cpu(rlist
->num_rates_flags
);
153 num_remaining
= NUM_REMAINING(rates_flag
);
154 rate_discrete
= RATE_DISCRETE(rates_flag
);
155 num_returned
= NUM_RETURNED(rates_flag
);
157 if (tot_rate_cnt
+ num_returned
> SCMI_MAX_NUM_RATES
) {
158 dev_err(handle
->dev
, "No. of rates > MAX_NUM_RATES");
162 if (!rate_discrete
) {
163 clk
->range
.min_rate
= RATE_TO_U64(rlist
->rate
[0]);
164 clk
->range
.max_rate
= RATE_TO_U64(rlist
->rate
[1]);
165 clk
->range
.step_size
= RATE_TO_U64(rlist
->rate
[2]);
166 dev_dbg(handle
->dev
, "Min %llu Max %llu Step %llu Hz\n",
167 clk
->range
.min_rate
, clk
->range
.max_rate
,
168 clk
->range
.step_size
);
172 rate
= &clk
->list
.rates
[tot_rate_cnt
];
173 for (cnt
= 0; cnt
< num_returned
; cnt
++, rate
++) {
174 *rate
= RATE_TO_U64(rlist
->rate
[cnt
]);
175 dev_dbg(handle
->dev
, "Rate %llu Hz\n", *rate
);
178 tot_rate_cnt
+= num_returned
;
180 * check for both returned and remaining to avoid infinite
181 * loop due to buggy firmware
183 } while (num_returned
&& num_remaining
);
186 clk
->list
.num_rates
= tot_rate_cnt
;
188 clk
->rate_discrete
= rate_discrete
;
191 scmi_xfer_put(handle
, t
);
196 scmi_clock_rate_get(const struct scmi_handle
*handle
, u32 clk_id
, u64
*value
)
201 ret
= scmi_xfer_get_init(handle
, CLOCK_RATE_GET
, SCMI_PROTOCOL_CLOCK
,
202 sizeof(__le32
), sizeof(u64
), &t
);
206 *(__le32
*)t
->tx
.buf
= cpu_to_le32(clk_id
);
208 ret
= scmi_do_xfer(handle
, t
);
210 __le32
*pval
= t
->rx
.buf
;
212 *value
= le32_to_cpu(*pval
);
213 *value
|= (u64
)le32_to_cpu(*(pval
+ 1)) << 32;
216 scmi_xfer_put(handle
, t
);
220 static int scmi_clock_rate_set(const struct scmi_handle
*handle
, u32 clk_id
,
221 u32 config
, u64 rate
)
225 struct scmi_clock_set_rate
*cfg
;
227 ret
= scmi_xfer_get_init(handle
, CLOCK_RATE_SET
, SCMI_PROTOCOL_CLOCK
,
228 sizeof(*cfg
), 0, &t
);
233 cfg
->flags
= cpu_to_le32(config
);
234 cfg
->id
= cpu_to_le32(clk_id
);
235 cfg
->value_low
= cpu_to_le32(rate
& 0xffffffff);
236 cfg
->value_high
= cpu_to_le32(rate
>> 32);
238 ret
= scmi_do_xfer(handle
, t
);
240 scmi_xfer_put(handle
, t
);
245 scmi_clock_config_set(const struct scmi_handle
*handle
, u32 clk_id
, u32 config
)
249 struct scmi_clock_set_config
*cfg
;
251 ret
= scmi_xfer_get_init(handle
, CLOCK_CONFIG_SET
, SCMI_PROTOCOL_CLOCK
,
252 sizeof(*cfg
), 0, &t
);
257 cfg
->id
= cpu_to_le32(clk_id
);
258 cfg
->attributes
= cpu_to_le32(config
);
260 ret
= scmi_do_xfer(handle
, t
);
262 scmi_xfer_put(handle
, t
);
266 static int scmi_clock_enable(const struct scmi_handle
*handle
, u32 clk_id
)
268 return scmi_clock_config_set(handle
, clk_id
, CLOCK_ENABLE
);
271 static int scmi_clock_disable(const struct scmi_handle
*handle
, u32 clk_id
)
273 return scmi_clock_config_set(handle
, clk_id
, 0);
276 static int scmi_clock_count_get(const struct scmi_handle
*handle
)
278 struct clock_info
*ci
= handle
->clk_priv
;
280 return ci
->num_clocks
;
283 static const struct scmi_clock_info
*
284 scmi_clock_info_get(const struct scmi_handle
*handle
, u32 clk_id
)
286 struct clock_info
*ci
= handle
->clk_priv
;
287 struct scmi_clock_info
*clk
= ci
->clk
+ clk_id
;
295 static struct scmi_clk_ops clk_ops
= {
296 .count_get
= scmi_clock_count_get
,
297 .info_get
= scmi_clock_info_get
,
298 .rate_get
= scmi_clock_rate_get
,
299 .rate_set
= scmi_clock_rate_set
,
300 .enable
= scmi_clock_enable
,
301 .disable
= scmi_clock_disable
,
304 static int scmi_clock_protocol_init(struct scmi_handle
*handle
)
308 struct clock_info
*cinfo
;
310 scmi_version_get(handle
, SCMI_PROTOCOL_CLOCK
, &version
);
312 dev_dbg(handle
->dev
, "Clock Version %d.%d\n",
313 PROTOCOL_REV_MAJOR(version
), PROTOCOL_REV_MINOR(version
));
315 cinfo
= devm_kzalloc(handle
->dev
, sizeof(*cinfo
), GFP_KERNEL
);
319 scmi_clock_protocol_attributes_get(handle
, cinfo
);
321 cinfo
->clk
= devm_kcalloc(handle
->dev
, cinfo
->num_clocks
,
322 sizeof(*cinfo
->clk
), GFP_KERNEL
);
326 for (clkid
= 0; clkid
< cinfo
->num_clocks
; clkid
++) {
327 struct scmi_clock_info
*clk
= cinfo
->clk
+ clkid
;
329 ret
= scmi_clock_attributes_get(handle
, clkid
, clk
);
331 scmi_clock_describe_rates_get(handle
, clkid
, clk
);
334 handle
->clk_ops
= &clk_ops
;
335 handle
->clk_priv
= cinfo
;
340 static int __init
scmi_clock_init(void)
342 return scmi_protocol_register(SCMI_PROTOCOL_CLOCK
,
343 &scmi_clock_protocol_init
);
345 subsys_initcall(scmi_clock_init
);