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Linux 4.19.133
[linux/fpc-iii.git] / drivers / gpio / gpio-pca953x.c
blob0232c25a158645f588d2d9826ef1e2a36311f605
1 /*
2 * PCA953x 4/8/16/24/40 bit I/O ports
3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14 #include <linux/acpi.h>
15 #include <linux/gpio/driver.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/i2c.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/module.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_data/pca953x.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
25
26 #include <asm/unaligned.h>
27
28 #define PCA953X_INPUT 0x00
29 #define PCA953X_OUTPUT 0x01
30 #define PCA953X_INVERT 0x02
31 #define PCA953X_DIRECTION 0x03
32
33 #define REG_ADDR_AI 0x80
34
35 #define PCA957X_IN 0x00
36 #define PCA957X_INVRT 0x01
37 #define PCA957X_BKEN 0x02
38 #define PCA957X_PUPD 0x03
39 #define PCA957X_CFG 0x04
40 #define PCA957X_OUT 0x05
41 #define PCA957X_MSK 0x06
42 #define PCA957X_INTS 0x07
43
44 #define PCAL953X_OUT_STRENGTH 0x20
45 #define PCAL953X_IN_LATCH 0x22
46 #define PCAL953X_PULL_EN 0x23
47 #define PCAL953X_PULL_SEL 0x24
48 #define PCAL953X_INT_MASK 0x25
49 #define PCAL953X_INT_STAT 0x26
50 #define PCAL953X_OUT_CONF 0x27
51
52 #define PCAL6524_INT_EDGE 0x28
53 #define PCAL6524_INT_CLR 0x2a
54 #define PCAL6524_IN_STATUS 0x2b
55 #define PCAL6524_OUT_INDCONF 0x2c
56 #define PCAL6524_DEBOUNCE 0x2d
57
58 #define PCA_GPIO_MASK 0x00FF
59
60 #define PCAL_GPIO_MASK 0x1f
61 #define PCAL_PINCTRL_MASK 0x60
62
63 #define PCA_INT 0x0100
64 #define PCA_PCAL 0x0200
65 #define PCA_LATCH_INT (PCA_PCAL | PCA_INT)
66 #define PCA953X_TYPE 0x1000
67 #define PCA957X_TYPE 0x2000
68 #define PCA_TYPE_MASK 0xF000
69
70 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
71
72 static const struct i2c_device_id pca953x_id[] = {
73 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
74 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
75 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
76 { "pca9536", 4 | PCA953X_TYPE, },
77 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
78 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
79 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
80 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
81 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
82 { "pca9556", 8 | PCA953X_TYPE, },
83 { "pca9557", 8 | PCA953X_TYPE, },
84 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
85 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
86 { "pca9698", 40 | PCA953X_TYPE, },
87
88 { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
89 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
90
91 { "max7310", 8 | PCA953X_TYPE, },
92 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
93 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
94 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
95 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
96 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
97 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
98 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
99 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
100 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
101 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
102 { "xra1202", 8 | PCA953X_TYPE },
103 { }
104 };
105 MODULE_DEVICE_TABLE(i2c, pca953x_id);
106
107 static const struct acpi_device_id pca953x_acpi_ids[] = {
108 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
109 { }
110 };
111 MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
112
113 #define MAX_BANK 5
114 #define BANK_SZ 8
115
116 #define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
117
118 struct pca953x_reg_config {
119 int direction;
120 int output;
121 int input;
122 };
123
124 static const struct pca953x_reg_config pca953x_regs = {
125 .direction = PCA953X_DIRECTION,
126 .output = PCA953X_OUTPUT,
127 .input = PCA953X_INPUT,
128 };
129
130 static const struct pca953x_reg_config pca957x_regs = {
131 .direction = PCA957X_CFG,
132 .output = PCA957X_OUT,
133 .input = PCA957X_IN,
134 };
135
136 struct pca953x_chip {
137 unsigned gpio_start;
138 u8 reg_output[MAX_BANK];
139 u8 reg_direction[MAX_BANK];
140 struct mutex i2c_lock;
141
142 #ifdef CONFIG_GPIO_PCA953X_IRQ
143 struct mutex irq_lock;
144 u8 irq_mask[MAX_BANK];
145 u8 irq_stat[MAX_BANK];
146 u8 irq_trig_raise[MAX_BANK];
147 u8 irq_trig_fall[MAX_BANK];
148 #endif
149
150 struct i2c_client *client;
151 struct gpio_chip gpio_chip;
152 const char *const *names;
153 unsigned long driver_data;
154 struct regulator *regulator;
155
156 const struct pca953x_reg_config *regs;
157
158 int (*write_regs)(struct pca953x_chip *, int, u8 *);
159 int (*read_regs)(struct pca953x_chip *, int, u8 *);
160 };
161
162 static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
163 int off)
164 {
165 int ret;
166 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
167 int offset = off / BANK_SZ;
168
169 ret = i2c_smbus_read_byte_data(chip->client,
170 (reg << bank_shift) + offset);
171 *val = ret;
172
173 if (ret < 0) {
174 dev_err(&chip->client->dev, "failed reading register\n");
175 return ret;
176 }
177
178 return 0;
179 }
180
181 static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
182 int off)
183 {
184 int ret;
185 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
186 int offset = off / BANK_SZ;
187
188 ret = i2c_smbus_write_byte_data(chip->client,
189 (reg << bank_shift) + offset, val);
190
191 if (ret < 0) {
192 dev_err(&chip->client->dev, "failed writing register\n");
193 return ret;
194 }
195
196 return 0;
197 }
198
199 static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
200 {
201 return i2c_smbus_write_byte_data(chip->client, reg, *val);
202 }
203
204 static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
205 {
206 u16 word = get_unaligned((u16 *)val);
207
208 return i2c_smbus_write_word_data(chip->client, reg << 1, word);
209 }
210
211 static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
212 {
213 int ret;
214
215 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
216 if (ret < 0)
217 return ret;
218
219 return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
220 }
221
222 static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
223 {
224 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
225 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
226 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
227
228 return i2c_smbus_write_i2c_block_data(chip->client,
229 pinctrl | addr | REG_ADDR_AI,
230 NBANK(chip), val);
231 }
232
233 static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
234 {
235 int ret = 0;
236
237 ret = chip->write_regs(chip, reg, val);
238 if (ret < 0) {
239 dev_err(&chip->client->dev, "failed writing register\n");
240 return ret;
241 }
242
243 return 0;
244 }
245
246 static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
247 {
248 int ret;
249
250 ret = i2c_smbus_read_byte_data(chip->client, reg);
251 *val = ret;
252
253 return ret;
254 }
255
256 static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
257 {
258 int ret;
259
260 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
261 put_unaligned(ret, (u16 *)val);
262
263 return ret;
264 }
265
266 static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
267 {
268 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
269 int addr = (reg & PCAL_GPIO_MASK) << bank_shift;
270 int pinctrl = (reg & PCAL_PINCTRL_MASK) << 1;
271
272 return i2c_smbus_read_i2c_block_data(chip->client,
273 pinctrl | addr | REG_ADDR_AI,
274 NBANK(chip), val);
275 }
276
277 static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
278 {
279 int ret;
280
281 ret = chip->read_regs(chip, reg, val);
282 if (ret < 0) {
283 dev_err(&chip->client->dev, "failed reading register\n");
284 return ret;
285 }
286
287 return 0;
288 }
289
290 static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
291 {
292 struct pca953x_chip *chip = gpiochip_get_data(gc);
293 u8 reg_val;
294 int ret;
295
296 mutex_lock(&chip->i2c_lock);
297 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
298
299 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
300 if (ret)
301 goto exit;
302
303 chip->reg_direction[off / BANK_SZ] = reg_val;
304 exit:
305 mutex_unlock(&chip->i2c_lock);
306 return ret;
307 }
308
309 static int pca953x_gpio_direction_output(struct gpio_chip *gc,
310 unsigned off, int val)
311 {
312 struct pca953x_chip *chip = gpiochip_get_data(gc);
313 u8 reg_val;
314 int ret;
315
316 mutex_lock(&chip->i2c_lock);
317 /* set output level */
318 if (val)
319 reg_val = chip->reg_output[off / BANK_SZ]
320 | (1u << (off % BANK_SZ));
321 else
322 reg_val = chip->reg_output[off / BANK_SZ]
323 & ~(1u << (off % BANK_SZ));
324
325 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
326 if (ret)
327 goto exit;
328
329 chip->reg_output[off / BANK_SZ] = reg_val;
330
331 /* then direction */
332 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
333 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
334 if (ret)
335 goto exit;
336
337 chip->reg_direction[off / BANK_SZ] = reg_val;
338 exit:
339 mutex_unlock(&chip->i2c_lock);
340 return ret;
341 }
342
343 static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
344 {
345 struct pca953x_chip *chip = gpiochip_get_data(gc);
346 u32 reg_val;
347 int ret;
348
349 mutex_lock(&chip->i2c_lock);
350 ret = pca953x_read_single(chip, chip->regs->input, &reg_val, off);
351 mutex_unlock(&chip->i2c_lock);
352 if (ret < 0) {
353 /* NOTE: diagnostic already emitted; that's all we should
354 * do unless gpio_*_value_cansleep() calls become different
355 * from their nonsleeping siblings (and report faults).
356 */
357 return 0;
358 }
359
360 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
361 }
362
363 static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
364 {
365 struct pca953x_chip *chip = gpiochip_get_data(gc);
366 u8 reg_val;
367 int ret;
368
369 mutex_lock(&chip->i2c_lock);
370 if (val)
371 reg_val = chip->reg_output[off / BANK_SZ]
372 | (1u << (off % BANK_SZ));
373 else
374 reg_val = chip->reg_output[off / BANK_SZ]
375 & ~(1u << (off % BANK_SZ));
376
377 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
378 if (ret)
379 goto exit;
380
381 chip->reg_output[off / BANK_SZ] = reg_val;
382 exit:
383 mutex_unlock(&chip->i2c_lock);
384 }
385
386 static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
387 {
388 struct pca953x_chip *chip = gpiochip_get_data(gc);
389 u32 reg_val;
390 int ret;
391
392 mutex_lock(&chip->i2c_lock);
393 ret = pca953x_read_single(chip, chip->regs->direction, &reg_val, off);
394 mutex_unlock(&chip->i2c_lock);
395 if (ret < 0)
396 return ret;
397
398 return !!(reg_val & (1u << (off % BANK_SZ)));
399 }
400
401 static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
402 unsigned long *mask, unsigned long *bits)
403 {
404 struct pca953x_chip *chip = gpiochip_get_data(gc);
405 unsigned int bank_mask, bank_val;
406 int bank_shift, bank;
407 u8 reg_val[MAX_BANK];
408 int ret;
409
410 bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
411
412 mutex_lock(&chip->i2c_lock);
413 memcpy(reg_val, chip->reg_output, NBANK(chip));
414 for (bank = 0; bank < NBANK(chip); bank++) {
415 bank_mask = mask[bank / sizeof(*mask)] >>
416 ((bank % sizeof(*mask)) * 8);
417 if (bank_mask) {
418 bank_val = bits[bank / sizeof(*bits)] >>
419 ((bank % sizeof(*bits)) * 8);
420 bank_val &= bank_mask;
421 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
422 }
423 }
424
425 ret = i2c_smbus_write_i2c_block_data(chip->client,
426 chip->regs->output << bank_shift,
427 NBANK(chip), reg_val);
428 if (ret)
429 goto exit;
430
431 memcpy(chip->reg_output, reg_val, NBANK(chip));
432 exit:
433 mutex_unlock(&chip->i2c_lock);
434 }
435
436 static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
437 {
438 struct gpio_chip *gc;
439
440 gc = &chip->gpio_chip;
441
442 gc->direction_input = pca953x_gpio_direction_input;
443 gc->direction_output = pca953x_gpio_direction_output;
444 gc->get = pca953x_gpio_get_value;
445 gc->set = pca953x_gpio_set_value;
446 gc->get_direction = pca953x_gpio_get_direction;
447 gc->set_multiple = pca953x_gpio_set_multiple;
448 gc->can_sleep = true;
449
450 gc->base = chip->gpio_start;
451 gc->ngpio = gpios;
452 gc->label = chip->client->name;
453 gc->parent = &chip->client->dev;
454 gc->owner = THIS_MODULE;
455 gc->names = chip->names;
456 }
457
458 #ifdef CONFIG_GPIO_PCA953X_IRQ
459 static void pca953x_irq_mask(struct irq_data *d)
460 {
461 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
462 struct pca953x_chip *chip = gpiochip_get_data(gc);
463
464 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
465 }
466
467 static void pca953x_irq_unmask(struct irq_data *d)
468 {
469 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
470 struct pca953x_chip *chip = gpiochip_get_data(gc);
471
472 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
473 }
474
475 static void pca953x_irq_bus_lock(struct irq_data *d)
476 {
477 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
478 struct pca953x_chip *chip = gpiochip_get_data(gc);
479
480 mutex_lock(&chip->irq_lock);
481 }
482
483 static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
484 {
485 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
486 struct pca953x_chip *chip = gpiochip_get_data(gc);
487 u8 new_irqs;
488 int level, i;
489 u8 invert_irq_mask[MAX_BANK];
490
491 if (chip->driver_data & PCA_PCAL) {
492 /* Enable latch on interrupt-enabled inputs */
493 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
494
495 for (i = 0; i < NBANK(chip); i++)
496 invert_irq_mask[i] = ~chip->irq_mask[i];
497
498 /* Unmask enabled interrupts */
499 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
500 }
501
502 /* Look for any newly setup interrupt */
503 for (i = 0; i < NBANK(chip); i++) {
504 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
505 new_irqs &= ~chip->reg_direction[i];
506
507 while (new_irqs) {
508 level = __ffs(new_irqs);
509 pca953x_gpio_direction_input(&chip->gpio_chip,
510 level + (BANK_SZ * i));
511 new_irqs &= ~(1 << level);
512 }
513 }
514
515 mutex_unlock(&chip->irq_lock);
516 }
517
518 static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
519 {
520 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
521 struct pca953x_chip *chip = gpiochip_get_data(gc);
522 int bank_nb = d->hwirq / BANK_SZ;
523 u8 mask = 1 << (d->hwirq % BANK_SZ);
524
525 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
526 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
527 d->irq, type);
528 return -EINVAL;
529 }
530
531 if (type & IRQ_TYPE_EDGE_FALLING)
532 chip->irq_trig_fall[bank_nb] |= mask;
533 else
534 chip->irq_trig_fall[bank_nb] &= ~mask;
535
536 if (type & IRQ_TYPE_EDGE_RISING)
537 chip->irq_trig_raise[bank_nb] |= mask;
538 else
539 chip->irq_trig_raise[bank_nb] &= ~mask;
540
541 return 0;
542 }
543
544 static void pca953x_irq_shutdown(struct irq_data *d)
545 {
546 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
547 struct pca953x_chip *chip = gpiochip_get_data(gc);
548 u8 mask = 1 << (d->hwirq % BANK_SZ);
549
550 chip->irq_trig_raise[d->hwirq / BANK_SZ] &= ~mask;
551 chip->irq_trig_fall[d->hwirq / BANK_SZ] &= ~mask;
552 }
553
554 static struct irq_chip pca953x_irq_chip = {
555 .name = "pca953x",
556 .irq_mask = pca953x_irq_mask,
557 .irq_unmask = pca953x_irq_unmask,
558 .irq_bus_lock = pca953x_irq_bus_lock,
559 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
560 .irq_set_type = pca953x_irq_set_type,
561 .irq_shutdown = pca953x_irq_shutdown,
562 };
563
564 static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
565 {
566 u8 cur_stat[MAX_BANK];
567 u8 old_stat[MAX_BANK];
568 bool pending_seen = false;
569 bool trigger_seen = false;
570 u8 trigger[MAX_BANK];
571 int ret, i;
572
573 if (chip->driver_data & PCA_PCAL) {
574 /* Read the current interrupt status from the device */
575 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
576 if (ret)
577 return false;
578
579 /* Check latched inputs and clear interrupt status */
580 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
581 if (ret)
582 return false;
583
584 for (i = 0; i < NBANK(chip); i++) {
585 /* Apply filter for rising/falling edge selection */
586 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
587 (cur_stat[i] & chip->irq_trig_raise[i]);
588 pending[i] &= trigger[i];
589 if (pending[i])
590 pending_seen = true;
591 }
592
593 return pending_seen;
594 }
595
596 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
597 if (ret)
598 return false;
599
600 /* Remove output pins from the equation */
601 for (i = 0; i < NBANK(chip); i++)
602 cur_stat[i] &= chip->reg_direction[i];
603
604 memcpy(old_stat, chip->irq_stat, NBANK(chip));
605
606 for (i = 0; i < NBANK(chip); i++) {
607 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
608 if (trigger[i])
609 trigger_seen = true;
610 }
611
612 if (!trigger_seen)
613 return false;
614
615 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
616
617 for (i = 0; i < NBANK(chip); i++) {
618 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
619 (cur_stat[i] & chip->irq_trig_raise[i]);
620 pending[i] &= trigger[i];
621 if (pending[i])
622 pending_seen = true;
623 }
624
625 return pending_seen;
626 }
627
628 static irqreturn_t pca953x_irq_handler(int irq, void *devid)
629 {
630 struct pca953x_chip *chip = devid;
631 u8 pending[MAX_BANK];
632 u8 level;
633 unsigned nhandled = 0;
634 int i;
635
636 if (!pca953x_irq_pending(chip, pending))
637 return IRQ_NONE;
638
639 for (i = 0; i < NBANK(chip); i++) {
640 while (pending[i]) {
641 level = __ffs(pending[i]);
642 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
643 level + (BANK_SZ * i)));
644 pending[i] &= ~(1 << level);
645 nhandled++;
646 }
647 }
648
649 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
650 }
651
652 static int pca953x_irq_setup(struct pca953x_chip *chip,
653 int irq_base)
654 {
655 struct i2c_client *client = chip->client;
656 int ret, i;
657
658 if (client->irq && irq_base != -1
659 && (chip->driver_data & PCA_INT)) {
660 ret = pca953x_read_regs(chip,
661 chip->regs->input, chip->irq_stat);
662 if (ret)
663 return ret;
664
665 /*
666 * There is no way to know which GPIO line generated the
667 * interrupt. We have to rely on the previous read for
668 * this purpose.
669 */
670 for (i = 0; i < NBANK(chip); i++)
671 chip->irq_stat[i] &= chip->reg_direction[i];
672 mutex_init(&chip->irq_lock);
673
674 ret = devm_request_threaded_irq(&client->dev,
675 client->irq,
676 NULL,
677 pca953x_irq_handler,
678 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
679 IRQF_SHARED,
680 dev_name(&client->dev), chip);
681 if (ret) {
682 dev_err(&client->dev, "failed to request irq %d\n",
683 client->irq);
684 return ret;
685 }
686
687 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
688 &pca953x_irq_chip,
689 irq_base,
690 handle_simple_irq,
691 IRQ_TYPE_NONE);
692 if (ret) {
693 dev_err(&client->dev,
694 "could not connect irqchip to gpiochip\n");
695 return ret;
696 }
697
698 gpiochip_set_nested_irqchip(&chip->gpio_chip,
699 &pca953x_irq_chip,
700 client->irq);
701 }
702
703 return 0;
704 }
705
706 #else /* CONFIG_GPIO_PCA953X_IRQ */
707 static int pca953x_irq_setup(struct pca953x_chip *chip,
708 int irq_base)
709 {
710 struct i2c_client *client = chip->client;
711
712 if (client->irq && irq_base != -1 && (chip->driver_data & PCA_INT))
713 dev_warn(&client->dev, "interrupt support not compiled in\n");
714
715 return 0;
716 }
717 #endif
718
719 static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
720 {
721 int ret;
722 u8 val[MAX_BANK];
723
724 chip->regs = &pca953x_regs;
725
726 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
727 if (ret)
728 goto out;
729
730 ret = pca953x_read_regs(chip, chip->regs->direction,
731 chip->reg_direction);
732 if (ret)
733 goto out;
734
735 /* set platform specific polarity inversion */
736 if (invert)
737 memset(val, 0xFF, NBANK(chip));
738 else
739 memset(val, 0, NBANK(chip));
740
741 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
742 out:
743 return ret;
744 }
745
746 static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
747 {
748 int ret;
749 u8 val[MAX_BANK];
750
751 chip->regs = &pca957x_regs;
752
753 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
754 if (ret)
755 goto out;
756 ret = pca953x_read_regs(chip, chip->regs->direction,
757 chip->reg_direction);
758 if (ret)
759 goto out;
760
761 /* set platform specific polarity inversion */
762 if (invert)
763 memset(val, 0xFF, NBANK(chip));
764 else
765 memset(val, 0, NBANK(chip));
766 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
767 if (ret)
768 goto out;
769
770 /* To enable register 6, 7 to control pull up and pull down */
771 memset(val, 0x02, NBANK(chip));
772 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
773 if (ret)
774 goto out;
775
776 return 0;
777 out:
778 return ret;
779 }
780
781 static const struct of_device_id pca953x_dt_ids[];
782
783 static int pca953x_probe(struct i2c_client *client,
784 const struct i2c_device_id *i2c_id)
785 {
786 struct pca953x_platform_data *pdata;
787 struct pca953x_chip *chip;
788 int irq_base = 0;
789 int ret;
790 u32 invert = 0;
791 struct regulator *reg;
792
793 chip = devm_kzalloc(&client->dev,
794 sizeof(struct pca953x_chip), GFP_KERNEL);
795 if (chip == NULL)
796 return -ENOMEM;
797
798 pdata = dev_get_platdata(&client->dev);
799 if (pdata) {
800 irq_base = pdata->irq_base;
801 chip->gpio_start = pdata->gpio_base;
802 invert = pdata->invert;
803 chip->names = pdata->names;
804 } else {
805 struct gpio_desc *reset_gpio;
806
807 chip->gpio_start = -1;
808 irq_base = 0;
809
810 /*
811 * See if we need to de-assert a reset pin.
812 *
813 * There is no known ACPI-enabled platforms that are
814 * using "reset" GPIO. Otherwise any of those platform
815 * must use _DSD method with corresponding property.
816 */
817 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
818 GPIOD_OUT_LOW);
819 if (IS_ERR(reset_gpio))
820 return PTR_ERR(reset_gpio);
821 }
822
823 chip->client = client;
824
825 reg = devm_regulator_get(&client->dev, "vcc");
826 if (IS_ERR(reg)) {
827 ret = PTR_ERR(reg);
828 if (ret != -EPROBE_DEFER)
829 dev_err(&client->dev, "reg get err: %d\n", ret);
830 return ret;
831 }
832 ret = regulator_enable(reg);
833 if (ret) {
834 dev_err(&client->dev, "reg en err: %d\n", ret);
835 return ret;
836 }
837 chip->regulator = reg;
838
839 if (i2c_id) {
840 chip->driver_data = i2c_id->driver_data;
841 } else {
842 const struct acpi_device_id *acpi_id;
843 struct device *dev = &client->dev;
844
845 chip->driver_data = (uintptr_t)of_device_get_match_data(dev);
846 if (!chip->driver_data) {
847 acpi_id = acpi_match_device(pca953x_acpi_ids, dev);
848 if (!acpi_id) {
849 ret = -ENODEV;
850 goto err_exit;
851 }
852
853 chip->driver_data = acpi_id->driver_data;
854 }
855 }
856
857 mutex_init(&chip->i2c_lock);
858 /*
859 * In case we have an i2c-mux controlled by a GPIO provided by an
860 * expander using the same driver higher on the device tree, read the
861 * i2c adapter nesting depth and use the retrieved value as lockdep
862 * subclass for chip->i2c_lock.
863 *
864 * REVISIT: This solution is not complete. It protects us from lockdep
865 * false positives when the expander controlling the i2c-mux is on
866 * a different level on the device tree, but not when it's on the same
867 * level on a different branch (in which case the subclass number
868 * would be the same).
869 *
870 * TODO: Once a correct solution is developed, a similar fix should be
871 * applied to all other i2c-controlled GPIO expanders (and potentially
872 * regmap-i2c).
873 */
874 lockdep_set_subclass(&chip->i2c_lock,
875 i2c_adapter_depth(client->adapter));
876
877 /* initialize cached registers from their original values.
878 * we can't share this chip with another i2c master.
879 */
880 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
881
882 if (chip->gpio_chip.ngpio <= 8) {
883 chip->write_regs = pca953x_write_regs_8;
884 chip->read_regs = pca953x_read_regs_8;
885 } else if (chip->gpio_chip.ngpio >= 24) {
886 chip->write_regs = pca953x_write_regs_24;
887 chip->read_regs = pca953x_read_regs_24;
888 } else {
889 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
890 chip->write_regs = pca953x_write_regs_16;
891 else
892 chip->write_regs = pca957x_write_regs_16;
893 chip->read_regs = pca953x_read_regs_16;
894 }
895
896 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
897 ret = device_pca953x_init(chip, invert);
898 else
899 ret = device_pca957x_init(chip, invert);
900 if (ret)
901 goto err_exit;
902
903 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
904 if (ret)
905 goto err_exit;
906
907 ret = pca953x_irq_setup(chip, irq_base);
908 if (ret)
909 goto err_exit;
910
911 if (pdata && pdata->setup) {
912 ret = pdata->setup(client, chip->gpio_chip.base,
913 chip->gpio_chip.ngpio, pdata->context);
914 if (ret < 0)
915 dev_warn(&client->dev, "setup failed, %d\n", ret);
916 }
917
918 i2c_set_clientdata(client, chip);
919 return 0;
920
921 err_exit:
922 regulator_disable(chip->regulator);
923 return ret;
924 }
925
926 static int pca953x_remove(struct i2c_client *client)
927 {
928 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
929 struct pca953x_chip *chip = i2c_get_clientdata(client);
930 int ret;
931
932 if (pdata && pdata->teardown) {
933 ret = pdata->teardown(client, chip->gpio_chip.base,
934 chip->gpio_chip.ngpio, pdata->context);
935 if (ret < 0)
936 dev_err(&client->dev, "%s failed, %d\n",
937 "teardown", ret);
938 } else {
939 ret = 0;
940 }
941
942 regulator_disable(chip->regulator);
943
944 return ret;
945 }
946
947 /* convenience to stop overlong match-table lines */
948 #define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
949 #define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
950
951 static const struct of_device_id pca953x_dt_ids[] = {
952 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
953 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
954 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
955 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
956 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
957 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
958 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
959 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
960 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
961 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
962 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
963 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
964 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
965 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
966
967 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_LATCH_INT), },
968 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_LATCH_INT), },
969
970 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
971 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
972 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
973 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
974 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
975
976 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
977 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
978 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
979 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
980 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
981
982 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
983
984 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
985 { }
986 };
987
988 MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
989
990 static struct i2c_driver pca953x_driver = {
991 .driver = {
992 .name = "pca953x",
993 .of_match_table = pca953x_dt_ids,
994 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
995 },
996 .probe = pca953x_probe,
997 .remove = pca953x_remove,
998 .id_table = pca953x_id,
999 };
1000
1001 static int __init pca953x_init(void)
1002 {
1003 return i2c_add_driver(&pca953x_driver);
1004 }
1005 /* register after i2c postcore initcall and before
1006 * subsys initcalls that may rely on these GPIOs
1007 */
1008 subsys_initcall(pca953x_init);
1009
1010 static void __exit pca953x_exit(void)
1011 {
1012 i2c_del_driver(&pca953x_driver);
1013 }
1014 module_exit(pca953x_exit);
1015
1016 MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
1017 MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
1018 MODULE_LICENSE("GPL");
Linux with added FPC-III support