drivers/gpio/gpio-reg.c

   1 /*
   2  * gpio-reg: single register individually fixed-direction GPIOs
   3  *
   4  * Copyright (C) 2016 Russell King
   5  *
   6  * This software is licensed under the terms of the GNU General Public
   7  * License version 2, as published by the Free Software Foundation, and
   8  * may be copied, distributed, and modified under those terms.
   9  */
  10 #include <linux/gpio/driver.h>
  11 #include <linux/gpio/gpio-reg.h>
  12 #include <linux/io.h>
  13 #include <linux/slab.h>
  14 #include <linux/spinlock.h>
  15
  16 struct gpio_reg {
  17         struct gpio_chip gc;
  18         spinlock_t lock;
  19         u32 direction;
  20         u32 out;
  21         void __iomem *reg;
  22         struct irq_domain *irqdomain;
  23         const int *irqs;
  24 };
  25
  26 #define to_gpio_reg(x) container_of(x, struct gpio_reg, gc)
  27
  28 static int gpio_reg_get_direction(struct gpio_chip *gc, unsigned offset)
  29 {
  30         struct gpio_reg *r = to_gpio_reg(gc);
  31
  32         return r->direction & BIT(offset) ? 1 : 0;
  33 }
  34
  35 static int gpio_reg_direction_output(struct gpio_chip *gc, unsigned offset,
  36         int value)
  37 {
  38         struct gpio_reg *r = to_gpio_reg(gc);
  39
  40         if (r->direction & BIT(offset))
  41                 return -ENOTSUPP;
  42
  43         gc->set(gc, offset, value);
  44         return 0;
  45 }
  46
  47 static int gpio_reg_direction_input(struct gpio_chip *gc, unsigned offset)
  48 {
  49         struct gpio_reg *r = to_gpio_reg(gc);
  50
  51         return r->direction & BIT(offset) ? 0 : -ENOTSUPP;
  52 }
  53
  54 static void gpio_reg_set(struct gpio_chip *gc, unsigned offset, int value)
  55 {
  56         struct gpio_reg *r = to_gpio_reg(gc);
  57         unsigned long flags;
  58         u32 val, mask = BIT(offset);
  59
  60         spin_lock_irqsave(&r->lock, flags);
  61         val = r->out;
  62         if (value)
  63                 val |= mask;
  64         else
  65                 val &= ~mask;
  66         r->out = val;
  67         writel_relaxed(val, r->reg);
  68         spin_unlock_irqrestore(&r->lock, flags);
  69 }
  70
  71 static int gpio_reg_get(struct gpio_chip *gc, unsigned offset)
  72 {
  73         struct gpio_reg *r = to_gpio_reg(gc);
  74         u32 val, mask = BIT(offset);
  75
  76         if (r->direction & mask) {
  77                 /*
  78                  * double-read the value, some registers latch after the
  79                  * first read.
  80                  */
  81                 readl_relaxed(r->reg);
  82                 val = readl_relaxed(r->reg);
  83         } else {
  84                 val = r->out;
  85         }
  86         return !!(val & mask);
  87 }
  88
  89 static void gpio_reg_set_multiple(struct gpio_chip *gc, unsigned long *mask,
  90         unsigned long *bits)
  91 {
  92         struct gpio_reg *r = to_gpio_reg(gc);
  93         unsigned long flags;
  94
  95         spin_lock_irqsave(&r->lock, flags);
  96         r->out = (r->out & ~*mask) | (*bits & *mask);
  97         writel_relaxed(r->out, r->reg);
  98         spin_unlock_irqrestore(&r->lock, flags);
  99 }
 100
 101 static int gpio_reg_to_irq(struct gpio_chip *gc, unsigned offset)
 102 {
 103         struct gpio_reg *r = to_gpio_reg(gc);
 104         int irq = r->irqs[offset];
 105
 106         if (irq >= 0 && r->irqdomain)
 107                 irq = irq_find_mapping(r->irqdomain, irq);
 108
 109         return irq;
 110 }
 111
 112 /**
 113  * gpio_reg_init - add a fixed in/out register as gpio
 114  * @dev: optional struct device associated with this register
 115  * @base: start gpio number, or -1 to allocate
 116  * @num: number of GPIOs, maximum 32
 117  * @label: GPIO chip label
 118  * @direction: bitmask of fixed direction, one per GPIO signal, 1 = in
 119  * @def_out: initial GPIO output value
 120  * @names: array of %num strings describing each GPIO signal or %NULL
 121  * @irqdom: irq domain or %NULL
 122  * @irqs: array of %num ints describing the interrupt mapping for each
 123  *        GPIO signal, or %NULL.  If @irqdom is %NULL, then this
 124  *        describes the Linux interrupt number, otherwise it describes
 125  *        the hardware interrupt number in the specified irq domain.
 126  *
 127  * Add a single-register GPIO device containing up to 32 GPIO signals,
 128  * where each GPIO has a fixed input or output configuration.  Only
 129  * input GPIOs are assumed to be readable from the register, and only
 130  * then after a double-read.  Output values are assumed not to be
 131  * readable.
 132  */
 133 struct gpio_chip *gpio_reg_init(struct device *dev, void __iomem *reg,
 134         int base, int num, const char *label, u32 direction, u32 def_out,
 135         const char *const *names, struct irq_domain *irqdom, const int *irqs)
 136 {
 137         struct gpio_reg *r;
 138         int ret;
 139
 140         if (dev)
 141                 r = devm_kzalloc(dev, sizeof(*r), GFP_KERNEL);
 142         else
 143                 r = kzalloc(sizeof(*r), GFP_KERNEL);
 144
 145         if (!r)
 146                 return ERR_PTR(-ENOMEM);
 147
 148         spin_lock_init(&r->lock);
 149
 150         r->gc.label = label;
 151         r->gc.get_direction = gpio_reg_get_direction;
 152         r->gc.direction_input = gpio_reg_direction_input;
 153         r->gc.direction_output = gpio_reg_direction_output;
 154         r->gc.set = gpio_reg_set;
 155         r->gc.get = gpio_reg_get;
 156         r->gc.set_multiple = gpio_reg_set_multiple;
 157         if (irqs)
 158                 r->gc.to_irq = gpio_reg_to_irq;
 159         r->gc.base = base;
 160         r->gc.ngpio = num;
 161         r->gc.names = names;
 162         r->direction = direction;
 163         r->out = def_out;
 164         r->reg = reg;
 165         r->irqs = irqs;
 166
 167         if (dev)
 168                 ret = devm_gpiochip_add_data(dev, &r->gc, r);
 169         else
 170                 ret = gpiochip_add_data(&r->gc, r);
 171
 172         return ret ? ERR_PTR(ret) : &r->gc;
 173 }
 174
 175 int gpio_reg_resume(struct gpio_chip *gc)
 176 {
 177         struct gpio_reg *r = to_gpio_reg(gc);
 178         unsigned long flags;
 179
 180         spin_lock_irqsave(&r->lock, flags);
 181         writel_relaxed(r->out, r->reg);
 182         spin_unlock_irqrestore(&r->lock, flags);
 183
 184         return 0;
 185 }