drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include <linux/delay.h>
  25 #include <linux/kernel.h>
  26 #include <linux/module.h>
  27 #include <linux/slab.h>
  28 #include <linux/types.h>
  29 #include <drm/amdgpu_drm.h>
  30 #include "smumgr.h"
  31
  32 MODULE_FIRMWARE("amdgpu/topaz_smc.bin");
  33 MODULE_FIRMWARE("amdgpu/topaz_k_smc.bin");
  34 MODULE_FIRMWARE("amdgpu/tonga_smc.bin");
  35 MODULE_FIRMWARE("amdgpu/tonga_k_smc.bin");
  36 MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
  37 MODULE_FIRMWARE("amdgpu/polaris10_smc.bin");
  38 MODULE_FIRMWARE("amdgpu/polaris10_smc_sk.bin");
  39 MODULE_FIRMWARE("amdgpu/polaris10_k_smc.bin");
  40 MODULE_FIRMWARE("amdgpu/polaris10_k2_smc.bin");
  41 MODULE_FIRMWARE("amdgpu/polaris11_smc.bin");
  42 MODULE_FIRMWARE("amdgpu/polaris11_smc_sk.bin");
  43 MODULE_FIRMWARE("amdgpu/polaris11_k_smc.bin");
  44 MODULE_FIRMWARE("amdgpu/polaris11_k2_smc.bin");
  45 MODULE_FIRMWARE("amdgpu/polaris12_smc.bin");
  46 MODULE_FIRMWARE("amdgpu/polaris12_k_smc.bin");
  47 MODULE_FIRMWARE("amdgpu/vegam_smc.bin");
  48 MODULE_FIRMWARE("amdgpu/vega10_smc.bin");
  49 MODULE_FIRMWARE("amdgpu/vega10_acg_smc.bin");
  50 MODULE_FIRMWARE("amdgpu/vega12_smc.bin");
  51 MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
  52
  53 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
  54 {
  55         if (NULL != hwmgr->smumgr_funcs->thermal_avfs_enable)
  56                 return hwmgr->smumgr_funcs->thermal_avfs_enable(hwmgr);
  57
  58         return 0;
  59 }
  60
  61 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
  62 {
  63         if (NULL != hwmgr->smumgr_funcs->thermal_setup_fan_table)
  64                 return hwmgr->smumgr_funcs->thermal_setup_fan_table(hwmgr);
  65
  66         return 0;
  67 }
  68
  69 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr)
  70 {
  71
  72         if (NULL != hwmgr->smumgr_funcs->update_sclk_threshold)
  73                 return hwmgr->smumgr_funcs->update_sclk_threshold(hwmgr);
  74
  75         return 0;
  76 }
  77
  78 int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
  79 {
  80
  81         if (NULL != hwmgr->smumgr_funcs->update_smc_table)
  82                 return hwmgr->smumgr_funcs->update_smc_table(hwmgr, type);
  83
  84         return 0;
  85 }
  86
  87 uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, uint32_t type, uint32_t member)
  88 {
  89         if (NULL != hwmgr->smumgr_funcs->get_offsetof)
  90                 return hwmgr->smumgr_funcs->get_offsetof(type, member);
  91
  92         return 0;
  93 }
  94
  95 int smum_process_firmware_header(struct pp_hwmgr *hwmgr)
  96 {
  97         if (NULL != hwmgr->smumgr_funcs->process_firmware_header)
  98                 return hwmgr->smumgr_funcs->process_firmware_header(hwmgr);
  99         return 0;
 100 }
 101
 102 uint32_t smum_get_argument(struct pp_hwmgr *hwmgr)
 103 {
 104         if (NULL != hwmgr->smumgr_funcs->get_argument)
 105                 return hwmgr->smumgr_funcs->get_argument(hwmgr);
 106
 107         return 0;
 108 }
 109
 110 uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value)
 111 {
 112         if (NULL != hwmgr->smumgr_funcs->get_mac_definition)
 113                 return hwmgr->smumgr_funcs->get_mac_definition(value);
 114
 115         return 0;
 116 }
 117
 118 int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table)
 119 {
 120         if (NULL != hwmgr->smumgr_funcs->download_pptable_settings)
 121                 return hwmgr->smumgr_funcs->download_pptable_settings(hwmgr,
 122                                                                         table);
 123         return 0;
 124 }
 125
 126 int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr)
 127 {
 128         if (NULL != hwmgr->smumgr_funcs->upload_pptable_settings)
 129                 return hwmgr->smumgr_funcs->upload_pptable_settings(hwmgr);
 130
 131         return 0;
 132 }
 133
 134 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
 135 {
 136         if (hwmgr == NULL || hwmgr->smumgr_funcs->send_msg_to_smc == NULL)
 137                 return -EINVAL;
 138
 139         return hwmgr->smumgr_funcs->send_msg_to_smc(hwmgr, msg);
 140 }
 141
 142 int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
 143                                         uint16_t msg, uint32_t parameter)
 144 {
 145         if (hwmgr == NULL ||
 146                 hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter == NULL)
 147                 return -EINVAL;
 148         return hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter(
 149                                                 hwmgr, msg, parameter);
 150 }
 151
 152 int smum_init_smc_table(struct pp_hwmgr *hwmgr)
 153 {
 154         if (NULL != hwmgr->smumgr_funcs->init_smc_table)
 155                 return hwmgr->smumgr_funcs->init_smc_table(hwmgr);
 156
 157         return 0;
 158 }
 159
 160 int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 161 {
 162         if (NULL != hwmgr->smumgr_funcs->populate_all_graphic_levels)
 163                 return hwmgr->smumgr_funcs->populate_all_graphic_levels(hwmgr);
 164
 165         return 0;
 166 }
 167
 168 int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
 169 {
 170         if (NULL != hwmgr->smumgr_funcs->populate_all_memory_levels)
 171                 return hwmgr->smumgr_funcs->populate_all_memory_levels(hwmgr);
 172
 173         return 0;
 174 }
 175
 176 /*this interface is needed by island ci/vi */
 177 int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
 178 {
 179         if (NULL != hwmgr->smumgr_funcs->initialize_mc_reg_table)
 180                 return hwmgr->smumgr_funcs->initialize_mc_reg_table(hwmgr);
 181
 182         return 0;
 183 }
 184
 185 bool smum_is_dpm_running(struct pp_hwmgr *hwmgr)
 186 {
 187         if (NULL != hwmgr->smumgr_funcs->is_dpm_running)
 188                 return hwmgr->smumgr_funcs->is_dpm_running(hwmgr);
 189
 190         return true;
 191 }
 192
 193 bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr)
 194 {
 195         if (hwmgr->smumgr_funcs->is_hw_avfs_present)
 196                 return hwmgr->smumgr_funcs->is_hw_avfs_present(hwmgr);
 197
 198         return false;
 199 }
 200
 201 int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting)
 202 {
 203         if (hwmgr->smumgr_funcs->update_dpm_settings)
 204                 return hwmgr->smumgr_funcs->update_dpm_settings(hwmgr, profile_setting);
 205
 206         return -EINVAL;
 207 }
 208
 209 int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
 210 {
 211         if (hwmgr->smumgr_funcs->smc_table_manager)
 212                 return hwmgr->smumgr_funcs->smc_table_manager(hwmgr, table, table_id, rw);
 213
 214         return -EINVAL;
 215 }