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Linux 4.19.133
[linux/fpc-iii.git] / drivers / iio / adc / at91_adc.c
blob596841a3c4db77f59f5fc7c3c3f0f1fddc21aab7
1 /*
2 * Driver for the ADC present in the Atmel AT91 evaluation boards.
3 *
4 * Copyright 2011 Free Electrons
5 *
6 * Licensed under the GPLv2 or later.
7 */
8
9 #include <linux/bitmap.h>
10 #include <linux/bitops.h>
11 #include <linux/clk.h>
12 #include <linux/err.h>
13 #include <linux/io.h>
14 #include <linux/input.h>
15 #include <linux/interrupt.h>
16 #include <linux/jiffies.h>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_device.h>
21 #include <linux/platform_device.h>
22 #include <linux/sched.h>
23 #include <linux/slab.h>
24 #include <linux/wait.h>
25
26 #include <linux/platform_data/at91_adc.h>
27
28 #include <linux/iio/iio.h>
29 #include <linux/iio/buffer.h>
30 #include <linux/iio/trigger.h>
31 #include <linux/iio/trigger_consumer.h>
32 #include <linux/iio/triggered_buffer.h>
33 #include <linux/pinctrl/consumer.h>
34
35 /* Registers */
36 #define AT91_ADC_CR 0x00 /* Control Register */
37 #define AT91_ADC_SWRST (1 << 0) /* Software Reset */
38 #define AT91_ADC_START (1 << 1) /* Start Conversion */
39
40 #define AT91_ADC_MR 0x04 /* Mode Register */
41 #define AT91_ADC_TSAMOD (3 << 0) /* ADC mode */
42 #define AT91_ADC_TSAMOD_ADC_ONLY_MODE (0 << 0) /* ADC Mode */
43 #define AT91_ADC_TSAMOD_TS_ONLY_MODE (1 << 0) /* Touch Screen Only Mode */
44 #define AT91_ADC_TRGEN (1 << 0) /* Trigger Enable */
45 #define AT91_ADC_TRGSEL (7 << 1) /* Trigger Selection */
46 #define AT91_ADC_TRGSEL_TC0 (0 << 1)
47 #define AT91_ADC_TRGSEL_TC1 (1 << 1)
48 #define AT91_ADC_TRGSEL_TC2 (2 << 1)
49 #define AT91_ADC_TRGSEL_EXTERNAL (6 << 1)
50 #define AT91_ADC_LOWRES (1 << 4) /* Low Resolution */
51 #define AT91_ADC_SLEEP (1 << 5) /* Sleep Mode */
52 #define AT91_ADC_PENDET (1 << 6) /* Pen contact detection enable */
53 #define AT91_ADC_PRESCAL_9260 (0x3f << 8) /* Prescalar Rate Selection */
54 #define AT91_ADC_PRESCAL_9G45 (0xff << 8)
55 #define AT91_ADC_PRESCAL_(x) ((x) << 8)
56 #define AT91_ADC_STARTUP_9260 (0x1f << 16) /* Startup Up Time */
57 #define AT91_ADC_STARTUP_9G45 (0x7f << 16)
58 #define AT91_ADC_STARTUP_9X5 (0xf << 16)
59 #define AT91_ADC_STARTUP_(x) ((x) << 16)
60 #define AT91_ADC_SHTIM (0xf << 24) /* Sample & Hold Time */
61 #define AT91_ADC_SHTIM_(x) ((x) << 24)
62 #define AT91_ADC_PENDBC (0x0f << 28) /* Pen Debounce time */
63 #define AT91_ADC_PENDBC_(x) ((x) << 28)
64
65 #define AT91_ADC_TSR 0x0C
66 #define AT91_ADC_TSR_SHTIM (0xf << 24) /* Sample & Hold Time */
67 #define AT91_ADC_TSR_SHTIM_(x) ((x) << 24)
68
69 #define AT91_ADC_CHER 0x10 /* Channel Enable Register */
70 #define AT91_ADC_CHDR 0x14 /* Channel Disable Register */
71 #define AT91_ADC_CHSR 0x18 /* Channel Status Register */
72 #define AT91_ADC_CH(n) (1 << (n)) /* Channel Number */
73
74 #define AT91_ADC_SR 0x1C /* Status Register */
75 #define AT91_ADC_EOC(n) (1 << (n)) /* End of Conversion on Channel N */
76 #define AT91_ADC_OVRE(n) (1 << ((n) + 8))/* Overrun Error on Channel N */
77 #define AT91_ADC_DRDY (1 << 16) /* Data Ready */
78 #define AT91_ADC_GOVRE (1 << 17) /* General Overrun Error */
79 #define AT91_ADC_ENDRX (1 << 18) /* End of RX Buffer */
80 #define AT91_ADC_RXFUFF (1 << 19) /* RX Buffer Full */
81
82 #define AT91_ADC_SR_9X5 0x30 /* Status Register for 9x5 */
83 #define AT91_ADC_SR_DRDY_9X5 (1 << 24) /* Data Ready */
84
85 #define AT91_ADC_LCDR 0x20 /* Last Converted Data Register */
86 #define AT91_ADC_LDATA (0x3ff)
87
88 #define AT91_ADC_IER 0x24 /* Interrupt Enable Register */
89 #define AT91_ADC_IDR 0x28 /* Interrupt Disable Register */
90 #define AT91_ADC_IMR 0x2C /* Interrupt Mask Register */
91 #define AT91RL_ADC_IER_PEN (1 << 20)
92 #define AT91RL_ADC_IER_NOPEN (1 << 21)
93 #define AT91_ADC_IER_PEN (1 << 29)
94 #define AT91_ADC_IER_NOPEN (1 << 30)
95 #define AT91_ADC_IER_XRDY (1 << 20)
96 #define AT91_ADC_IER_YRDY (1 << 21)
97 #define AT91_ADC_IER_PRDY (1 << 22)
98 #define AT91_ADC_ISR_PENS (1 << 31)
99
100 #define AT91_ADC_CHR(n) (0x30 + ((n) * 4)) /* Channel Data Register N */
101 #define AT91_ADC_DATA (0x3ff)
102
103 #define AT91_ADC_CDR0_9X5 (0x50) /* Channel Data Register 0 for 9X5 */
104
105 #define AT91_ADC_ACR 0x94 /* Analog Control Register */
106 #define AT91_ADC_ACR_PENDETSENS (0x3 << 0) /* pull-up resistor */
107
108 #define AT91_ADC_TSMR 0xB0
109 #define AT91_ADC_TSMR_TSMODE (3 << 0) /* Touch Screen Mode */
110 #define AT91_ADC_TSMR_TSMODE_NONE (0 << 0)
111 #define AT91_ADC_TSMR_TSMODE_4WIRE_NO_PRESS (1 << 0)
112 #define AT91_ADC_TSMR_TSMODE_4WIRE_PRESS (2 << 0)
113 #define AT91_ADC_TSMR_TSMODE_5WIRE (3 << 0)
114 #define AT91_ADC_TSMR_TSAV (3 << 4) /* Averages samples */
115 #define AT91_ADC_TSMR_TSAV_(x) ((x) << 4)
116 #define AT91_ADC_TSMR_SCTIM (0x0f << 16) /* Switch closure time */
117 #define AT91_ADC_TSMR_SCTIM_(x) ((x) << 16)
118 #define AT91_ADC_TSMR_PENDBC (0x0f << 28) /* Pen Debounce time */
119 #define AT91_ADC_TSMR_PENDBC_(x) ((x) << 28)
120 #define AT91_ADC_TSMR_NOTSDMA (1 << 22) /* No Touchscreen DMA */
121 #define AT91_ADC_TSMR_PENDET_DIS (0 << 24) /* Pen contact detection disable */
122 #define AT91_ADC_TSMR_PENDET_ENA (1 << 24) /* Pen contact detection enable */
123
124 #define AT91_ADC_TSXPOSR 0xB4
125 #define AT91_ADC_TSYPOSR 0xB8
126 #define AT91_ADC_TSPRESSR 0xBC
127
128 #define AT91_ADC_TRGR_9260 AT91_ADC_MR
129 #define AT91_ADC_TRGR_9G45 0x08
130 #define AT91_ADC_TRGR_9X5 0xC0
131
132 /* Trigger Register bit field */
133 #define AT91_ADC_TRGR_TRGPER (0xffff << 16)
134 #define AT91_ADC_TRGR_TRGPER_(x) ((x) << 16)
135 #define AT91_ADC_TRGR_TRGMOD (0x7 << 0)
136 #define AT91_ADC_TRGR_NONE (0 << 0)
137 #define AT91_ADC_TRGR_MOD_PERIOD_TRIG (5 << 0)
138
139 #define AT91_ADC_CHAN(st, ch) \
140 (st->registers->channel_base + (ch * 4))
141 #define at91_adc_readl(st, reg) \
142 (readl_relaxed(st->reg_base + reg))
143 #define at91_adc_writel(st, reg, val) \
144 (writel_relaxed(val, st->reg_base + reg))
145
146 #define DRIVER_NAME "at91_adc"
147 #define MAX_POS_BITS 12
148
149 #define TOUCH_SAMPLE_PERIOD_US 2000 /* 2ms */
150 #define TOUCH_PEN_DETECT_DEBOUNCE_US 200
151
152 #define MAX_RLPOS_BITS 10
153 #define TOUCH_SAMPLE_PERIOD_US_RL 10000 /* 10ms, the SoC can't keep up with 2ms */
154 #define TOUCH_SHTIM 0xa
155 #define TOUCH_SCTIM_US 10 /* 10us for the Touchscreen Switches Closure Time */
156
157 /**
158 * struct at91_adc_reg_desc - Various informations relative to registers
159 * @channel_base: Base offset for the channel data registers
160 * @drdy_mask: Mask of the DRDY field in the relevant registers
161 (Interruptions registers mostly)
162 * @status_register: Offset of the Interrupt Status Register
163 * @trigger_register: Offset of the Trigger setup register
164 * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
165 * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
166 */
167 struct at91_adc_reg_desc {
168 u8 channel_base;
169 u32 drdy_mask;
170 u8 status_register;
171 u8 trigger_register;
172 u32 mr_prescal_mask;
173 u32 mr_startup_mask;
174 };
175
176 struct at91_adc_caps {
177 bool has_ts; /* Support touch screen */
178 bool has_tsmr; /* only at91sam9x5, sama5d3 have TSMR reg */
179 /*
180 * Numbers of sampling data will be averaged. Can be 0~3.
181 * Hardware can average (2 ^ ts_filter_average) sample data.
182 */
183 u8 ts_filter_average;
184 /* Pen Detection input pull-up resistor, can be 0~3 */
185 u8 ts_pen_detect_sensitivity;
186
187 /* startup time calculate function */
188 u32 (*calc_startup_ticks)(u32 startup_time, u32 adc_clk_khz);
189
190 u8 num_channels;
191 struct at91_adc_reg_desc registers;
192 };
193
194 struct at91_adc_state {
195 struct clk *adc_clk;
196 u16 *buffer;
197 unsigned long channels_mask;
198 struct clk *clk;
199 bool done;
200 int irq;
201 u16 last_value;
202 int chnb;
203 struct mutex lock;
204 u8 num_channels;
205 void __iomem *reg_base;
206 struct at91_adc_reg_desc *registers;
207 u32 startup_time;
208 u8 sample_hold_time;
209 bool sleep_mode;
210 struct iio_trigger **trig;
211 struct at91_adc_trigger *trigger_list;
212 u32 trigger_number;
213 bool use_external;
214 u32 vref_mv;
215 u32 res; /* resolution used for convertions */
216 bool low_res; /* the resolution corresponds to the lowest one */
217 wait_queue_head_t wq_data_avail;
218 struct at91_adc_caps *caps;
219
220 /*
221 * Following ADC channels are shared by touchscreen:
222 *
223 * CH0 -- Touch screen XP/UL
224 * CH1 -- Touch screen XM/UR
225 * CH2 -- Touch screen YP/LL
226 * CH3 -- Touch screen YM/Sense
227 * CH4 -- Touch screen LR(5-wire only)
228 *
229 * The bitfields below represents the reserved channel in the
230 * touchscreen mode.
231 */
232 #define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 0)
233 #define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 0)
234 enum atmel_adc_ts_type touchscreen_type;
235 struct input_dev *ts_input;
236
237 u16 ts_sample_period_val;
238 u32 ts_pressure_threshold;
239 u16 ts_pendbc;
240
241 bool ts_bufferedmeasure;
242 u32 ts_prev_absx;
243 u32 ts_prev_absy;
244 };
245
246 static irqreturn_t at91_adc_trigger_handler(int irq, void *p)
247 {
248 struct iio_poll_func *pf = p;
249 struct iio_dev *idev = pf->indio_dev;
250 struct at91_adc_state *st = iio_priv(idev);
251 struct iio_chan_spec const *chan;
252 int i, j = 0;
253
254 for (i = 0; i < idev->masklength; i++) {
255 if (!test_bit(i, idev->active_scan_mask))
256 continue;
257 chan = idev->channels + i;
258 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel));
259 j++;
260 }
261
262 iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp);
263
264 iio_trigger_notify_done(idev->trig);
265
266 /* Needed to ACK the DRDY interruption */
267 at91_adc_readl(st, AT91_ADC_LCDR);
268
269 enable_irq(st->irq);
270
271 return IRQ_HANDLED;
272 }
273
274 /* Handler for classic adc channel eoc trigger */
275 static void handle_adc_eoc_trigger(int irq, struct iio_dev *idev)
276 {
277 struct at91_adc_state *st = iio_priv(idev);
278
279 if (iio_buffer_enabled(idev)) {
280 disable_irq_nosync(irq);
281 iio_trigger_poll(idev->trig);
282 } else {
283 st->last_value = at91_adc_readl(st, AT91_ADC_CHAN(st, st->chnb));
284 /* Needed to ACK the DRDY interruption */
285 at91_adc_readl(st, AT91_ADC_LCDR);
286 st->done = true;
287 wake_up_interruptible(&st->wq_data_avail);
288 }
289 }
290
291 static int at91_ts_sample(struct at91_adc_state *st)
292 {
293 unsigned int xscale, yscale, reg, z1, z2;
294 unsigned int x, y, pres, xpos, ypos;
295 unsigned int rxp = 1;
296 unsigned int factor = 1000;
297 struct iio_dev *idev = iio_priv_to_dev(st);
298
299 unsigned int xyz_mask_bits = st->res;
300 unsigned int xyz_mask = (1 << xyz_mask_bits) - 1;
301
302 /* calculate position */
303 /* x position = (x / xscale) * max, max = 2^MAX_POS_BITS - 1 */
304 reg = at91_adc_readl(st, AT91_ADC_TSXPOSR);
305 xpos = reg & xyz_mask;
306 x = (xpos << MAX_POS_BITS) - xpos;
307 xscale = (reg >> 16) & xyz_mask;
308 if (xscale == 0) {
309 dev_err(&idev->dev, "Error: xscale == 0!\n");
310 return -1;
311 }
312 x /= xscale;
313
314 /* y position = (y / yscale) * max, max = 2^MAX_POS_BITS - 1 */
315 reg = at91_adc_readl(st, AT91_ADC_TSYPOSR);
316 ypos = reg & xyz_mask;
317 y = (ypos << MAX_POS_BITS) - ypos;
318 yscale = (reg >> 16) & xyz_mask;
319 if (yscale == 0) {
320 dev_err(&idev->dev, "Error: yscale == 0!\n");
321 return -1;
322 }
323 y /= yscale;
324
325 /* calculate the pressure */
326 reg = at91_adc_readl(st, AT91_ADC_TSPRESSR);
327 z1 = reg & xyz_mask;
328 z2 = (reg >> 16) & xyz_mask;
329
330 if (z1 != 0)
331 pres = rxp * (x * factor / 1024) * (z2 * factor / z1 - factor)
332 / factor;
333 else
334 pres = st->ts_pressure_threshold; /* no pen contacted */
335
336 dev_dbg(&idev->dev, "xpos = %d, xscale = %d, ypos = %d, yscale = %d, z1 = %d, z2 = %d, press = %d\n",
337 xpos, xscale, ypos, yscale, z1, z2, pres);
338
339 if (pres < st->ts_pressure_threshold) {
340 dev_dbg(&idev->dev, "x = %d, y = %d, pressure = %d\n",
341 x, y, pres / factor);
342 input_report_abs(st->ts_input, ABS_X, x);
343 input_report_abs(st->ts_input, ABS_Y, y);
344 input_report_abs(st->ts_input, ABS_PRESSURE, pres);
345 input_report_key(st->ts_input, BTN_TOUCH, 1);
346 input_sync(st->ts_input);
347 } else {
348 dev_dbg(&idev->dev, "pressure too low: not reporting\n");
349 }
350
351 return 0;
352 }
353
354 static irqreturn_t at91_adc_rl_interrupt(int irq, void *private)
355 {
356 struct iio_dev *idev = private;
357 struct at91_adc_state *st = iio_priv(idev);
358 u32 status = at91_adc_readl(st, st->registers->status_register);
359 unsigned int reg;
360
361 status &= at91_adc_readl(st, AT91_ADC_IMR);
362 if (status & GENMASK(st->num_channels - 1, 0))
363 handle_adc_eoc_trigger(irq, idev);
364
365 if (status & AT91RL_ADC_IER_PEN) {
366 /* Disabling pen debounce is required to get a NOPEN irq */
367 reg = at91_adc_readl(st, AT91_ADC_MR);
368 reg &= ~AT91_ADC_PENDBC;
369 at91_adc_writel(st, AT91_ADC_MR, reg);
370
371 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
372 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_NOPEN
373 | AT91_ADC_EOC(3));
374 /* Set up period trigger for sampling */
375 at91_adc_writel(st, st->registers->trigger_register,
376 AT91_ADC_TRGR_MOD_PERIOD_TRIG |
377 AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
378 } else if (status & AT91RL_ADC_IER_NOPEN) {
379 reg = at91_adc_readl(st, AT91_ADC_MR);
380 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
381 at91_adc_writel(st, AT91_ADC_MR, reg);
382 at91_adc_writel(st, st->registers->trigger_register,
383 AT91_ADC_TRGR_NONE);
384
385 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_NOPEN
386 | AT91_ADC_EOC(3));
387 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
388 st->ts_bufferedmeasure = false;
389 input_report_key(st->ts_input, BTN_TOUCH, 0);
390 input_sync(st->ts_input);
391 } else if (status & AT91_ADC_EOC(3) && st->ts_input) {
392 /* Conversion finished and we've a touchscreen */
393 if (st->ts_bufferedmeasure) {
394 /*
395 * Last measurement is always discarded, since it can
396 * be erroneous.
397 * Always report previous measurement
398 */
399 input_report_abs(st->ts_input, ABS_X, st->ts_prev_absx);
400 input_report_abs(st->ts_input, ABS_Y, st->ts_prev_absy);
401 input_report_key(st->ts_input, BTN_TOUCH, 1);
402 input_sync(st->ts_input);
403 } else
404 st->ts_bufferedmeasure = true;
405
406 /* Now make new measurement */
407 st->ts_prev_absx = at91_adc_readl(st, AT91_ADC_CHAN(st, 3))
408 << MAX_RLPOS_BITS;
409 st->ts_prev_absx /= at91_adc_readl(st, AT91_ADC_CHAN(st, 2));
410
411 st->ts_prev_absy = at91_adc_readl(st, AT91_ADC_CHAN(st, 1))
412 << MAX_RLPOS_BITS;
413 st->ts_prev_absy /= at91_adc_readl(st, AT91_ADC_CHAN(st, 0));
414 }
415
416 return IRQ_HANDLED;
417 }
418
419 static irqreturn_t at91_adc_9x5_interrupt(int irq, void *private)
420 {
421 struct iio_dev *idev = private;
422 struct at91_adc_state *st = iio_priv(idev);
423 u32 status = at91_adc_readl(st, st->registers->status_register);
424 const uint32_t ts_data_irq_mask =
425 AT91_ADC_IER_XRDY |
426 AT91_ADC_IER_YRDY |
427 AT91_ADC_IER_PRDY;
428
429 if (status & GENMASK(st->num_channels - 1, 0))
430 handle_adc_eoc_trigger(irq, idev);
431
432 if (status & AT91_ADC_IER_PEN) {
433 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
434 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_NOPEN |
435 ts_data_irq_mask);
436 /* Set up period trigger for sampling */
437 at91_adc_writel(st, st->registers->trigger_register,
438 AT91_ADC_TRGR_MOD_PERIOD_TRIG |
439 AT91_ADC_TRGR_TRGPER_(st->ts_sample_period_val));
440 } else if (status & AT91_ADC_IER_NOPEN) {
441 at91_adc_writel(st, st->registers->trigger_register, 0);
442 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_NOPEN |
443 ts_data_irq_mask);
444 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
445
446 input_report_key(st->ts_input, BTN_TOUCH, 0);
447 input_sync(st->ts_input);
448 } else if ((status & ts_data_irq_mask) == ts_data_irq_mask) {
449 /* Now all touchscreen data is ready */
450
451 if (status & AT91_ADC_ISR_PENS) {
452 /* validate data by pen contact */
453 at91_ts_sample(st);
454 } else {
455 /* triggered by event that is no pen contact, just read
456 * them to clean the interrupt and discard all.
457 */
458 at91_adc_readl(st, AT91_ADC_TSXPOSR);
459 at91_adc_readl(st, AT91_ADC_TSYPOSR);
460 at91_adc_readl(st, AT91_ADC_TSPRESSR);
461 }
462 }
463
464 return IRQ_HANDLED;
465 }
466
467 static int at91_adc_channel_init(struct iio_dev *idev)
468 {
469 struct at91_adc_state *st = iio_priv(idev);
470 struct iio_chan_spec *chan_array, *timestamp;
471 int bit, idx = 0;
472 unsigned long rsvd_mask = 0;
473
474 /* If touchscreen is enable, then reserve the adc channels */
475 if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
476 rsvd_mask = CHAN_MASK_TOUCHSCREEN_4WIRE;
477 else if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_5WIRE)
478 rsvd_mask = CHAN_MASK_TOUCHSCREEN_5WIRE;
479
480 /* set up the channel mask to reserve touchscreen channels */
481 st->channels_mask &= ~rsvd_mask;
482
483 idev->num_channels = bitmap_weight(&st->channels_mask,
484 st->num_channels) + 1;
485
486 chan_array = devm_kzalloc(&idev->dev,
487 ((idev->num_channels + 1) *
488 sizeof(struct iio_chan_spec)),
489 GFP_KERNEL);
490
491 if (!chan_array)
492 return -ENOMEM;
493
494 for_each_set_bit(bit, &st->channels_mask, st->num_channels) {
495 struct iio_chan_spec *chan = chan_array + idx;
496
497 chan->type = IIO_VOLTAGE;
498 chan->indexed = 1;
499 chan->channel = bit;
500 chan->scan_index = idx;
501 chan->scan_type.sign = 'u';
502 chan->scan_type.realbits = st->res;
503 chan->scan_type.storagebits = 16;
504 chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE);
505 chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW);
506 idx++;
507 }
508 timestamp = chan_array + idx;
509
510 timestamp->type = IIO_TIMESTAMP;
511 timestamp->channel = -1;
512 timestamp->scan_index = idx;
513 timestamp->scan_type.sign = 's';
514 timestamp->scan_type.realbits = 64;
515 timestamp->scan_type.storagebits = 64;
516
517 idev->channels = chan_array;
518 return idev->num_channels;
519 }
520
521 static int at91_adc_get_trigger_value_by_name(struct iio_dev *idev,
522 struct at91_adc_trigger *triggers,
523 const char *trigger_name)
524 {
525 struct at91_adc_state *st = iio_priv(idev);
526 int i;
527
528 for (i = 0; i < st->trigger_number; i++) {
529 char *name = kasprintf(GFP_KERNEL,
530 "%s-dev%d-%s",
531 idev->name,
532 idev->id,
533 triggers[i].name);
534 if (!name)
535 return -ENOMEM;
536
537 if (strcmp(trigger_name, name) == 0) {
538 kfree(name);
539 if (triggers[i].value == 0)
540 return -EINVAL;
541 return triggers[i].value;
542 }
543
544 kfree(name);
545 }
546
547 return -EINVAL;
548 }
549
550 static int at91_adc_configure_trigger(struct iio_trigger *trig, bool state)
551 {
552 struct iio_dev *idev = iio_trigger_get_drvdata(trig);
553 struct at91_adc_state *st = iio_priv(idev);
554 struct at91_adc_reg_desc *reg = st->registers;
555 u32 status = at91_adc_readl(st, reg->trigger_register);
556 int value;
557 u8 bit;
558
559 value = at91_adc_get_trigger_value_by_name(idev,
560 st->trigger_list,
561 idev->trig->name);
562 if (value < 0)
563 return value;
564
565 if (state) {
566 st->buffer = kmalloc(idev->scan_bytes, GFP_KERNEL);
567 if (st->buffer == NULL)
568 return -ENOMEM;
569
570 at91_adc_writel(st, reg->trigger_register,
571 status | value);
572
573 for_each_set_bit(bit, idev->active_scan_mask,
574 st->num_channels) {
575 struct iio_chan_spec const *chan = idev->channels + bit;
576 at91_adc_writel(st, AT91_ADC_CHER,
577 AT91_ADC_CH(chan->channel));
578 }
579
580 at91_adc_writel(st, AT91_ADC_IER, reg->drdy_mask);
581
582 } else {
583 at91_adc_writel(st, AT91_ADC_IDR, reg->drdy_mask);
584
585 at91_adc_writel(st, reg->trigger_register,
586 status & ~value);
587
588 for_each_set_bit(bit, idev->active_scan_mask,
589 st->num_channels) {
590 struct iio_chan_spec const *chan = idev->channels + bit;
591 at91_adc_writel(st, AT91_ADC_CHDR,
592 AT91_ADC_CH(chan->channel));
593 }
594 kfree(st->buffer);
595 }
596
597 return 0;
598 }
599
600 static const struct iio_trigger_ops at91_adc_trigger_ops = {
601 .set_trigger_state = &at91_adc_configure_trigger,
602 };
603
604 static struct iio_trigger *at91_adc_allocate_trigger(struct iio_dev *idev,
605 struct at91_adc_trigger *trigger)
606 {
607 struct iio_trigger *trig;
608 int ret;
609
610 trig = iio_trigger_alloc("%s-dev%d-%s", idev->name,
611 idev->id, trigger->name);
612 if (trig == NULL)
613 return NULL;
614
615 trig->dev.parent = idev->dev.parent;
616 iio_trigger_set_drvdata(trig, idev);
617 trig->ops = &at91_adc_trigger_ops;
618
619 ret = iio_trigger_register(trig);
620 if (ret)
621 return NULL;
622
623 return trig;
624 }
625
626 static int at91_adc_trigger_init(struct iio_dev *idev)
627 {
628 struct at91_adc_state *st = iio_priv(idev);
629 int i, ret;
630
631 st->trig = devm_kcalloc(&idev->dev,
632 st->trigger_number, sizeof(*st->trig),
633 GFP_KERNEL);
634
635 if (st->trig == NULL) {
636 ret = -ENOMEM;
637 goto error_ret;
638 }
639
640 for (i = 0; i < st->trigger_number; i++) {
641 if (st->trigger_list[i].is_external && !(st->use_external))
642 continue;
643
644 st->trig[i] = at91_adc_allocate_trigger(idev,
645 st->trigger_list + i);
646 if (st->trig[i] == NULL) {
647 dev_err(&idev->dev,
648 "Could not allocate trigger %d\n", i);
649 ret = -ENOMEM;
650 goto error_trigger;
651 }
652 }
653
654 return 0;
655
656 error_trigger:
657 for (i--; i >= 0; i--) {
658 iio_trigger_unregister(st->trig[i]);
659 iio_trigger_free(st->trig[i]);
660 }
661 error_ret:
662 return ret;
663 }
664
665 static void at91_adc_trigger_remove(struct iio_dev *idev)
666 {
667 struct at91_adc_state *st = iio_priv(idev);
668 int i;
669
670 for (i = 0; i < st->trigger_number; i++) {
671 iio_trigger_unregister(st->trig[i]);
672 iio_trigger_free(st->trig[i]);
673 }
674 }
675
676 static int at91_adc_buffer_init(struct iio_dev *idev)
677 {
678 return iio_triggered_buffer_setup(idev, &iio_pollfunc_store_time,
679 &at91_adc_trigger_handler, NULL);
680 }
681
682 static void at91_adc_buffer_remove(struct iio_dev *idev)
683 {
684 iio_triggered_buffer_cleanup(idev);
685 }
686
687 static int at91_adc_read_raw(struct iio_dev *idev,
688 struct iio_chan_spec const *chan,
689 int *val, int *val2, long mask)
690 {
691 struct at91_adc_state *st = iio_priv(idev);
692 int ret;
693
694 switch (mask) {
695 case IIO_CHAN_INFO_RAW:
696 mutex_lock(&st->lock);
697
698 st->chnb = chan->channel;
699 at91_adc_writel(st, AT91_ADC_CHER,
700 AT91_ADC_CH(chan->channel));
701 at91_adc_writel(st, AT91_ADC_IER, BIT(chan->channel));
702 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_START);
703
704 ret = wait_event_interruptible_timeout(st->wq_data_avail,
705 st->done,
706 msecs_to_jiffies(1000));
707
708 /* Disable interrupts, regardless if adc conversion was
709 * successful or not
710 */
711 at91_adc_writel(st, AT91_ADC_CHDR,
712 AT91_ADC_CH(chan->channel));
713 at91_adc_writel(st, AT91_ADC_IDR, BIT(chan->channel));
714
715 if (ret > 0) {
716 /* a valid conversion took place */
717 *val = st->last_value;
718 st->last_value = 0;
719 st->done = false;
720 ret = IIO_VAL_INT;
721 } else if (ret == 0) {
722 /* conversion timeout */
723 dev_err(&idev->dev, "ADC Channel %d timeout.\n",
724 chan->channel);
725 ret = -ETIMEDOUT;
726 }
727
728 mutex_unlock(&st->lock);
729 return ret;
730
731 case IIO_CHAN_INFO_SCALE:
732 *val = st->vref_mv;
733 *val2 = chan->scan_type.realbits;
734 return IIO_VAL_FRACTIONAL_LOG2;
735 default:
736 break;
737 }
738 return -EINVAL;
739 }
740
741 static int at91_adc_of_get_resolution(struct at91_adc_state *st,
742 struct platform_device *pdev)
743 {
744 struct iio_dev *idev = iio_priv_to_dev(st);
745 struct device_node *np = pdev->dev.of_node;
746 int count, i, ret = 0;
747 char *res_name, *s;
748 u32 *resolutions;
749
750 count = of_property_count_strings(np, "atmel,adc-res-names");
751 if (count < 2) {
752 dev_err(&idev->dev, "You must specified at least two resolution names for "
753 "adc-res-names property in the DT\n");
754 return count;
755 }
756
757 resolutions = kmalloc_array(count, sizeof(*resolutions), GFP_KERNEL);
758 if (!resolutions)
759 return -ENOMEM;
760
761 if (of_property_read_u32_array(np, "atmel,adc-res", resolutions, count)) {
762 dev_err(&idev->dev, "Missing adc-res property in the DT.\n");
763 ret = -ENODEV;
764 goto ret;
765 }
766
767 if (of_property_read_string(np, "atmel,adc-use-res", (const char **)&res_name))
768 res_name = "highres";
769
770 for (i = 0; i < count; i++) {
771 if (of_property_read_string_index(np, "atmel,adc-res-names", i, (const char **)&s))
772 continue;
773
774 if (strcmp(res_name, s))
775 continue;
776
777 st->res = resolutions[i];
778 if (!strcmp(res_name, "lowres"))
779 st->low_res = true;
780 else
781 st->low_res = false;
782
783 dev_info(&idev->dev, "Resolution used: %u bits\n", st->res);
784 goto ret;
785 }
786
787 dev_err(&idev->dev, "There is no resolution for %s\n", res_name);
788
789 ret:
790 kfree(resolutions);
791 return ret;
792 }
793
794 static u32 calc_startup_ticks_9260(u32 startup_time, u32 adc_clk_khz)
795 {
796 /*
797 * Number of ticks needed to cover the startup time of the ADC
798 * as defined in the electrical characteristics of the board,
799 * divided by 8. The formula thus is :
800 * Startup Time = (ticks + 1) * 8 / ADC Clock
801 */
802 return round_up((startup_time * adc_clk_khz / 1000) - 1, 8) / 8;
803 }
804
805 static u32 calc_startup_ticks_9x5(u32 startup_time, u32 adc_clk_khz)
806 {
807 /*
808 * For sama5d3x and at91sam9x5, the formula changes to:
809 * Startup Time = <lookup_table_value> / ADC Clock
810 */
811 static const int startup_lookup[] = {
812 0, 8, 16, 24,
813 64, 80, 96, 112,
814 512, 576, 640, 704,
815 768, 832, 896, 960
816 };
817 int i, size = ARRAY_SIZE(startup_lookup);
818 unsigned int ticks;
819
820 ticks = startup_time * adc_clk_khz / 1000;
821 for (i = 0; i < size; i++)
822 if (ticks < startup_lookup[i])
823 break;
824
825 ticks = i;
826 if (ticks == size)
827 /* Reach the end of lookup table */
828 ticks = size - 1;
829
830 return ticks;
831 }
832
833 static const struct of_device_id at91_adc_dt_ids[];
834
835 static int at91_adc_probe_dt_ts(struct device_node *node,
836 struct at91_adc_state *st, struct device *dev)
837 {
838 int ret;
839 u32 prop;
840
841 ret = of_property_read_u32(node, "atmel,adc-ts-wires", &prop);
842 if (ret) {
843 dev_info(dev, "ADC Touch screen is disabled.\n");
844 return 0;
845 }
846
847 switch (prop) {
848 case 4:
849 case 5:
850 st->touchscreen_type = prop;
851 break;
852 default:
853 dev_err(dev, "Unsupported number of touchscreen wires (%d). Should be 4 or 5.\n", prop);
854 return -EINVAL;
855 }
856
857 if (!st->caps->has_tsmr)
858 return 0;
859 prop = 0;
860 of_property_read_u32(node, "atmel,adc-ts-pressure-threshold", &prop);
861 st->ts_pressure_threshold = prop;
862 if (st->ts_pressure_threshold) {
863 return 0;
864 } else {
865 dev_err(dev, "Invalid pressure threshold for the touchscreen\n");
866 return -EINVAL;
867 }
868 }
869
870 static int at91_adc_probe_dt(struct at91_adc_state *st,
871 struct platform_device *pdev)
872 {
873 struct iio_dev *idev = iio_priv_to_dev(st);
874 struct device_node *node = pdev->dev.of_node;
875 struct device_node *trig_node;
876 int i = 0, ret;
877 u32 prop;
878
879 if (!node)
880 return -EINVAL;
881
882 st->caps = (struct at91_adc_caps *)
883 of_match_device(at91_adc_dt_ids, &pdev->dev)->data;
884
885 st->use_external = of_property_read_bool(node, "atmel,adc-use-external-triggers");
886
887 if (of_property_read_u32(node, "atmel,adc-channels-used", &prop)) {
888 dev_err(&idev->dev, "Missing adc-channels-used property in the DT.\n");
889 ret = -EINVAL;
890 goto error_ret;
891 }
892 st->channels_mask = prop;
893
894 st->sleep_mode = of_property_read_bool(node, "atmel,adc-sleep-mode");
895
896 if (of_property_read_u32(node, "atmel,adc-startup-time", &prop)) {
897 dev_err(&idev->dev, "Missing adc-startup-time property in the DT.\n");
898 ret = -EINVAL;
899 goto error_ret;
900 }
901 st->startup_time = prop;
902
903 prop = 0;
904 of_property_read_u32(node, "atmel,adc-sample-hold-time", &prop);
905 st->sample_hold_time = prop;
906
907 if (of_property_read_u32(node, "atmel,adc-vref", &prop)) {
908 dev_err(&idev->dev, "Missing adc-vref property in the DT.\n");
909 ret = -EINVAL;
910 goto error_ret;
911 }
912 st->vref_mv = prop;
913
914 ret = at91_adc_of_get_resolution(st, pdev);
915 if (ret)
916 goto error_ret;
917
918 st->registers = &st->caps->registers;
919 st->num_channels = st->caps->num_channels;
920 st->trigger_number = of_get_child_count(node);
921 st->trigger_list = devm_kcalloc(&idev->dev,
922 st->trigger_number,
923 sizeof(struct at91_adc_trigger),
924 GFP_KERNEL);
925 if (!st->trigger_list) {
926 dev_err(&idev->dev, "Could not allocate trigger list memory.\n");
927 ret = -ENOMEM;
928 goto error_ret;
929 }
930
931 for_each_child_of_node(node, trig_node) {
932 struct at91_adc_trigger *trig = st->trigger_list + i;
933 const char *name;
934
935 if (of_property_read_string(trig_node, "trigger-name", &name)) {
936 dev_err(&idev->dev, "Missing trigger-name property in the DT.\n");
937 ret = -EINVAL;
938 goto error_ret;
939 }
940 trig->name = name;
941
942 if (of_property_read_u32(trig_node, "trigger-value", &prop)) {
943 dev_err(&idev->dev, "Missing trigger-value property in the DT.\n");
944 ret = -EINVAL;
945 goto error_ret;
946 }
947 trig->value = prop;
948 trig->is_external = of_property_read_bool(trig_node, "trigger-external");
949 i++;
950 }
951
952 /* Check if touchscreen is supported. */
953 if (st->caps->has_ts)
954 return at91_adc_probe_dt_ts(node, st, &idev->dev);
955 else
956 dev_info(&idev->dev, "not support touchscreen in the adc compatible string.\n");
957
958 return 0;
959
960 error_ret:
961 return ret;
962 }
963
964 static int at91_adc_probe_pdata(struct at91_adc_state *st,
965 struct platform_device *pdev)
966 {
967 struct at91_adc_data *pdata = pdev->dev.platform_data;
968
969 if (!pdata)
970 return -EINVAL;
971
972 st->caps = (struct at91_adc_caps *)
973 platform_get_device_id(pdev)->driver_data;
974
975 st->use_external = pdata->use_external_triggers;
976 st->vref_mv = pdata->vref;
977 st->channels_mask = pdata->channels_used;
978 st->num_channels = st->caps->num_channels;
979 st->startup_time = pdata->startup_time;
980 st->trigger_number = pdata->trigger_number;
981 st->trigger_list = pdata->trigger_list;
982 st->registers = &st->caps->registers;
983 st->touchscreen_type = pdata->touchscreen_type;
984
985 return 0;
986 }
987
988 static const struct iio_info at91_adc_info = {
989 .read_raw = &at91_adc_read_raw,
990 };
991
992 /* Touchscreen related functions */
993 static int atmel_ts_open(struct input_dev *dev)
994 {
995 struct at91_adc_state *st = input_get_drvdata(dev);
996
997 if (st->caps->has_tsmr)
998 at91_adc_writel(st, AT91_ADC_IER, AT91_ADC_IER_PEN);
999 else
1000 at91_adc_writel(st, AT91_ADC_IER, AT91RL_ADC_IER_PEN);
1001 return 0;
1002 }
1003
1004 static void atmel_ts_close(struct input_dev *dev)
1005 {
1006 struct at91_adc_state *st = input_get_drvdata(dev);
1007
1008 if (st->caps->has_tsmr)
1009 at91_adc_writel(st, AT91_ADC_IDR, AT91_ADC_IER_PEN);
1010 else
1011 at91_adc_writel(st, AT91_ADC_IDR, AT91RL_ADC_IER_PEN);
1012 }
1013
1014 static int at91_ts_hw_init(struct at91_adc_state *st, u32 adc_clk_khz)
1015 {
1016 struct iio_dev *idev = iio_priv_to_dev(st);
1017 u32 reg = 0;
1018 u32 tssctim = 0;
1019 int i = 0;
1020
1021 /* a Pen Detect Debounce Time is necessary for the ADC Touch to avoid
1022 * pen detect noise.
1023 * The formula is : Pen Detect Debounce Time = (2 ^ pendbc) / ADCClock
1024 */
1025 st->ts_pendbc = round_up(TOUCH_PEN_DETECT_DEBOUNCE_US * adc_clk_khz /
1026 1000, 1);
1027
1028 while (st->ts_pendbc >> ++i)
1029 ; /* Empty! Find the shift offset */
1030 if (abs(st->ts_pendbc - (1 << i)) < abs(st->ts_pendbc - (1 << (i - 1))))
1031 st->ts_pendbc = i;
1032 else
1033 st->ts_pendbc = i - 1;
1034
1035 if (!st->caps->has_tsmr) {
1036 reg = at91_adc_readl(st, AT91_ADC_MR);
1037 reg |= AT91_ADC_TSAMOD_TS_ONLY_MODE | AT91_ADC_PENDET;
1038
1039 reg |= AT91_ADC_PENDBC_(st->ts_pendbc) & AT91_ADC_PENDBC;
1040 at91_adc_writel(st, AT91_ADC_MR, reg);
1041
1042 reg = AT91_ADC_TSR_SHTIM_(TOUCH_SHTIM) & AT91_ADC_TSR_SHTIM;
1043 at91_adc_writel(st, AT91_ADC_TSR, reg);
1044
1045 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US_RL *
1046 adc_clk_khz / 1000) - 1, 1);
1047
1048 return 0;
1049 }
1050
1051 /* Touchscreen Switches Closure time needed for allowing the value to
1052 * stabilize.
1053 * Switch Closure Time = (TSSCTIM * 4) ADCClock periods
1054 */
1055 tssctim = DIV_ROUND_UP(TOUCH_SCTIM_US * adc_clk_khz / 1000, 4);
1056 dev_dbg(&idev->dev, "adc_clk at: %d KHz, tssctim at: %d\n",
1057 adc_clk_khz, tssctim);
1058
1059 if (st->touchscreen_type == ATMEL_ADC_TOUCHSCREEN_4WIRE)
1060 reg = AT91_ADC_TSMR_TSMODE_4WIRE_PRESS;
1061 else
1062 reg = AT91_ADC_TSMR_TSMODE_5WIRE;
1063
1064 reg |= AT91_ADC_TSMR_SCTIM_(tssctim) & AT91_ADC_TSMR_SCTIM;
1065 reg |= AT91_ADC_TSMR_TSAV_(st->caps->ts_filter_average)
1066 & AT91_ADC_TSMR_TSAV;
1067 reg |= AT91_ADC_TSMR_PENDBC_(st->ts_pendbc) & AT91_ADC_TSMR_PENDBC;
1068 reg |= AT91_ADC_TSMR_NOTSDMA;
1069 reg |= AT91_ADC_TSMR_PENDET_ENA;
1070 reg |= 0x03 << 8; /* TSFREQ, needs to be bigger than TSAV */
1071
1072 at91_adc_writel(st, AT91_ADC_TSMR, reg);
1073
1074 /* Change adc internal resistor value for better pen detection,
1075 * default value is 100 kOhm.
1076 * 0 = 200 kOhm, 1 = 150 kOhm, 2 = 100 kOhm, 3 = 50 kOhm
1077 * option only available on ES2 and higher
1078 */
1079 at91_adc_writel(st, AT91_ADC_ACR, st->caps->ts_pen_detect_sensitivity
1080 & AT91_ADC_ACR_PENDETSENS);
1081
1082 /* Sample Period Time = (TRGPER + 1) / ADCClock */
1083 st->ts_sample_period_val = round_up((TOUCH_SAMPLE_PERIOD_US *
1084 adc_clk_khz / 1000) - 1, 1);
1085
1086 return 0;
1087 }
1088
1089 static int at91_ts_register(struct at91_adc_state *st,
1090 struct platform_device *pdev)
1091 {
1092 struct input_dev *input;
1093 struct iio_dev *idev = iio_priv_to_dev(st);
1094 int ret;
1095
1096 input = input_allocate_device();
1097 if (!input) {
1098 dev_err(&idev->dev, "Failed to allocate TS device!\n");
1099 return -ENOMEM;
1100 }
1101
1102 input->name = DRIVER_NAME;
1103 input->id.bustype = BUS_HOST;
1104 input->dev.parent = &pdev->dev;
1105 input->open = atmel_ts_open;
1106 input->close = atmel_ts_close;
1107
1108 __set_bit(EV_ABS, input->evbit);
1109 __set_bit(EV_KEY, input->evbit);
1110 __set_bit(BTN_TOUCH, input->keybit);
1111 if (st->caps->has_tsmr) {
1112 input_set_abs_params(input, ABS_X, 0, (1 << MAX_POS_BITS) - 1,
1113 0, 0);
1114 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_POS_BITS) - 1,
1115 0, 0);
1116 input_set_abs_params(input, ABS_PRESSURE, 0, 0xffffff, 0, 0);
1117 } else {
1118 if (st->touchscreen_type != ATMEL_ADC_TOUCHSCREEN_4WIRE) {
1119 dev_err(&pdev->dev,
1120 "This touchscreen controller only support 4 wires\n");
1121 ret = -EINVAL;
1122 goto err;
1123 }
1124
1125 input_set_abs_params(input, ABS_X, 0, (1 << MAX_RLPOS_BITS) - 1,
1126 0, 0);
1127 input_set_abs_params(input, ABS_Y, 0, (1 << MAX_RLPOS_BITS) - 1,
1128 0, 0);
1129 }
1130
1131 st->ts_input = input;
1132 input_set_drvdata(input, st);
1133
1134 ret = input_register_device(input);
1135 if (ret)
1136 goto err;
1137
1138 return ret;
1139
1140 err:
1141 input_free_device(st->ts_input);
1142 return ret;
1143 }
1144
1145 static void at91_ts_unregister(struct at91_adc_state *st)
1146 {
1147 input_unregister_device(st->ts_input);
1148 }
1149
1150 static int at91_adc_probe(struct platform_device *pdev)
1151 {
1152 unsigned int prsc, mstrclk, ticks, adc_clk, adc_clk_khz, shtim;
1153 int ret;
1154 struct iio_dev *idev;
1155 struct at91_adc_state *st;
1156 struct resource *res;
1157 u32 reg;
1158
1159 idev = devm_iio_device_alloc(&pdev->dev, sizeof(struct at91_adc_state));
1160 if (!idev)
1161 return -ENOMEM;
1162
1163 st = iio_priv(idev);
1164
1165 if (pdev->dev.of_node)
1166 ret = at91_adc_probe_dt(st, pdev);
1167 else
1168 ret = at91_adc_probe_pdata(st, pdev);
1169
1170 if (ret) {
1171 dev_err(&pdev->dev, "No platform data available.\n");
1172 return -EINVAL;
1173 }
1174
1175 platform_set_drvdata(pdev, idev);
1176
1177 idev->dev.parent = &pdev->dev;
1178 idev->name = dev_name(&pdev->dev);
1179 idev->modes = INDIO_DIRECT_MODE;
1180 idev->info = &at91_adc_info;
1181
1182 st->irq = platform_get_irq(pdev, 0);
1183 if (st->irq < 0) {
1184 dev_err(&pdev->dev, "No IRQ ID is designated\n");
1185 return -ENODEV;
1186 }
1187
1188 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1189
1190 st->reg_base = devm_ioremap_resource(&pdev->dev, res);
1191 if (IS_ERR(st->reg_base))
1192 return PTR_ERR(st->reg_base);
1193
1194
1195 /*
1196 * Disable all IRQs before setting up the handler
1197 */
1198 at91_adc_writel(st, AT91_ADC_CR, AT91_ADC_SWRST);
1199 at91_adc_writel(st, AT91_ADC_IDR, 0xFFFFFFFF);
1200
1201 if (st->caps->has_tsmr)
1202 ret = request_irq(st->irq, at91_adc_9x5_interrupt, 0,
1203 pdev->dev.driver->name, idev);
1204 else
1205 ret = request_irq(st->irq, at91_adc_rl_interrupt, 0,
1206 pdev->dev.driver->name, idev);
1207 if (ret) {
1208 dev_err(&pdev->dev, "Failed to allocate IRQ.\n");
1209 return ret;
1210 }
1211
1212 st->clk = devm_clk_get(&pdev->dev, "adc_clk");
1213 if (IS_ERR(st->clk)) {
1214 dev_err(&pdev->dev, "Failed to get the clock.\n");
1215 ret = PTR_ERR(st->clk);
1216 goto error_free_irq;
1217 }
1218
1219 ret = clk_prepare_enable(st->clk);
1220 if (ret) {
1221 dev_err(&pdev->dev,
1222 "Could not prepare or enable the clock.\n");
1223 goto error_free_irq;
1224 }
1225
1226 st->adc_clk = devm_clk_get(&pdev->dev, "adc_op_clk");
1227 if (IS_ERR(st->adc_clk)) {
1228 dev_err(&pdev->dev, "Failed to get the ADC clock.\n");
1229 ret = PTR_ERR(st->adc_clk);
1230 goto error_disable_clk;
1231 }
1232
1233 ret = clk_prepare_enable(st->adc_clk);
1234 if (ret) {
1235 dev_err(&pdev->dev,
1236 "Could not prepare or enable the ADC clock.\n");
1237 goto error_disable_clk;
1238 }
1239
1240 /*
1241 * Prescaler rate computation using the formula from the Atmel's
1242 * datasheet : ADC Clock = MCK / ((Prescaler + 1) * 2), ADC Clock being
1243 * specified by the electrical characteristics of the board.
1244 */
1245 mstrclk = clk_get_rate(st->clk);
1246 adc_clk = clk_get_rate(st->adc_clk);
1247 adc_clk_khz = adc_clk / 1000;
1248
1249 dev_dbg(&pdev->dev, "Master clock is set as: %d Hz, adc_clk should set as: %d Hz\n",
1250 mstrclk, adc_clk);
1251
1252 prsc = (mstrclk / (2 * adc_clk)) - 1;
1253
1254 if (!st->startup_time) {
1255 dev_err(&pdev->dev, "No startup time available.\n");
1256 ret = -EINVAL;
1257 goto error_disable_adc_clk;
1258 }
1259 ticks = (*st->caps->calc_startup_ticks)(st->startup_time, adc_clk_khz);
1260
1261 /*
1262 * a minimal Sample and Hold Time is necessary for the ADC to guarantee
1263 * the best converted final value between two channels selection
1264 * The formula thus is : Sample and Hold Time = (shtim + 1) / ADCClock
1265 */
1266 if (st->sample_hold_time > 0)
1267 shtim = round_up((st->sample_hold_time * adc_clk_khz / 1000)
1268 - 1, 1);
1269 else
1270 shtim = 0;
1271
1272 reg = AT91_ADC_PRESCAL_(prsc) & st->registers->mr_prescal_mask;
1273 reg |= AT91_ADC_STARTUP_(ticks) & st->registers->mr_startup_mask;
1274 if (st->low_res)
1275 reg |= AT91_ADC_LOWRES;
1276 if (st->sleep_mode)
1277 reg |= AT91_ADC_SLEEP;
1278 reg |= AT91_ADC_SHTIM_(shtim) & AT91_ADC_SHTIM;
1279 at91_adc_writel(st, AT91_ADC_MR, reg);
1280
1281 /* Setup the ADC channels available on the board */
1282 ret = at91_adc_channel_init(idev);
1283 if (ret < 0) {
1284 dev_err(&pdev->dev, "Couldn't initialize the channels.\n");
1285 goto error_disable_adc_clk;
1286 }
1287
1288 init_waitqueue_head(&st->wq_data_avail);
1289 mutex_init(&st->lock);
1290
1291 /*
1292 * Since touch screen will set trigger register as period trigger. So
1293 * when touch screen is enabled, then we have to disable hardware
1294 * trigger for classic adc.
1295 */
1296 if (!st->touchscreen_type) {
1297 ret = at91_adc_buffer_init(idev);
1298 if (ret < 0) {
1299 dev_err(&pdev->dev, "Couldn't initialize the buffer.\n");
1300 goto error_disable_adc_clk;
1301 }
1302
1303 ret = at91_adc_trigger_init(idev);
1304 if (ret < 0) {
1305 dev_err(&pdev->dev, "Couldn't setup the triggers.\n");
1306 at91_adc_buffer_remove(idev);
1307 goto error_disable_adc_clk;
1308 }
1309 } else {
1310 ret = at91_ts_register(st, pdev);
1311 if (ret)
1312 goto error_disable_adc_clk;
1313
1314 at91_ts_hw_init(st, adc_clk_khz);
1315 }
1316
1317 ret = iio_device_register(idev);
1318 if (ret < 0) {
1319 dev_err(&pdev->dev, "Couldn't register the device.\n");
1320 goto error_iio_device_register;
1321 }
1322
1323 return 0;
1324
1325 error_iio_device_register:
1326 if (!st->touchscreen_type) {
1327 at91_adc_trigger_remove(idev);
1328 at91_adc_buffer_remove(idev);
1329 } else {
1330 at91_ts_unregister(st);
1331 }
1332 error_disable_adc_clk:
1333 clk_disable_unprepare(st->adc_clk);
1334 error_disable_clk:
1335 clk_disable_unprepare(st->clk);
1336 error_free_irq:
1337 free_irq(st->irq, idev);
1338 return ret;
1339 }
1340
1341 static int at91_adc_remove(struct platform_device *pdev)
1342 {
1343 struct iio_dev *idev = platform_get_drvdata(pdev);
1344 struct at91_adc_state *st = iio_priv(idev);
1345
1346 iio_device_unregister(idev);
1347 if (!st->touchscreen_type) {
1348 at91_adc_trigger_remove(idev);
1349 at91_adc_buffer_remove(idev);
1350 } else {
1351 at91_ts_unregister(st);
1352 }
1353 clk_disable_unprepare(st->adc_clk);
1354 clk_disable_unprepare(st->clk);
1355 free_irq(st->irq, idev);
1356
1357 return 0;
1358 }
1359
1360 #ifdef CONFIG_PM_SLEEP
1361 static int at91_adc_suspend(struct device *dev)
1362 {
1363 struct iio_dev *idev = platform_get_drvdata(to_platform_device(dev));
1364 struct at91_adc_state *st = iio_priv(idev);
1365
1366 pinctrl_pm_select_sleep_state(dev);
1367 clk_disable_unprepare(st->clk);
1368
1369 return 0;
1370 }
1371
1372 static int at91_adc_resume(struct device *dev)
1373 {
1374 struct iio_dev *idev = platform_get_drvdata(to_platform_device(dev));
1375 struct at91_adc_state *st = iio_priv(idev);
1376
1377 clk_prepare_enable(st->clk);
1378 pinctrl_pm_select_default_state(dev);
1379
1380 return 0;
1381 }
1382 #endif
1383
1384 static SIMPLE_DEV_PM_OPS(at91_adc_pm_ops, at91_adc_suspend, at91_adc_resume);
1385
1386 static struct at91_adc_caps at91sam9260_caps = {
1387 .calc_startup_ticks = calc_startup_ticks_9260,
1388 .num_channels = 4,
1389 .registers = {
1390 .channel_base = AT91_ADC_CHR(0),
1391 .drdy_mask = AT91_ADC_DRDY,
1392 .status_register = AT91_ADC_SR,
1393 .trigger_register = AT91_ADC_TRGR_9260,
1394 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
1395 .mr_startup_mask = AT91_ADC_STARTUP_9260,
1396 },
1397 };
1398
1399 static struct at91_adc_caps at91sam9rl_caps = {
1400 .has_ts = true,
1401 .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */
1402 .num_channels = 6,
1403 .registers = {
1404 .channel_base = AT91_ADC_CHR(0),
1405 .drdy_mask = AT91_ADC_DRDY,
1406 .status_register = AT91_ADC_SR,
1407 .trigger_register = AT91_ADC_TRGR_9G45,
1408 .mr_prescal_mask = AT91_ADC_PRESCAL_9260,
1409 .mr_startup_mask = AT91_ADC_STARTUP_9G45,
1410 },
1411 };
1412
1413 static struct at91_adc_caps at91sam9g45_caps = {
1414 .has_ts = true,
1415 .calc_startup_ticks = calc_startup_ticks_9260, /* same as 9260 */
1416 .num_channels = 8,
1417 .registers = {
1418 .channel_base = AT91_ADC_CHR(0),
1419 .drdy_mask = AT91_ADC_DRDY,
1420 .status_register = AT91_ADC_SR,
1421 .trigger_register = AT91_ADC_TRGR_9G45,
1422 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
1423 .mr_startup_mask = AT91_ADC_STARTUP_9G45,
1424 },
1425 };
1426
1427 static struct at91_adc_caps at91sam9x5_caps = {
1428 .has_ts = true,
1429 .has_tsmr = true,
1430 .ts_filter_average = 3,
1431 .ts_pen_detect_sensitivity = 2,
1432 .calc_startup_ticks = calc_startup_ticks_9x5,
1433 .num_channels = 12,
1434 .registers = {
1435 .channel_base = AT91_ADC_CDR0_9X5,
1436 .drdy_mask = AT91_ADC_SR_DRDY_9X5,
1437 .status_register = AT91_ADC_SR_9X5,
1438 .trigger_register = AT91_ADC_TRGR_9X5,
1439 /* prescal mask is same as 9G45 */
1440 .mr_prescal_mask = AT91_ADC_PRESCAL_9G45,
1441 .mr_startup_mask = AT91_ADC_STARTUP_9X5,
1442 },
1443 };
1444
1445 static const struct of_device_id at91_adc_dt_ids[] = {
1446 { .compatible = "atmel,at91sam9260-adc", .data = &at91sam9260_caps },
1447 { .compatible = "atmel,at91sam9rl-adc", .data = &at91sam9rl_caps },
1448 { .compatible = "atmel,at91sam9g45-adc", .data = &at91sam9g45_caps },
1449 { .compatible = "atmel,at91sam9x5-adc", .data = &at91sam9x5_caps },
1450 {},
1451 };
1452 MODULE_DEVICE_TABLE(of, at91_adc_dt_ids);
1453
1454 static const struct platform_device_id at91_adc_ids[] = {
1455 {
1456 .name = "at91sam9260-adc",
1457 .driver_data = (unsigned long)&at91sam9260_caps,
1458 }, {
1459 .name = "at91sam9rl-adc",
1460 .driver_data = (unsigned long)&at91sam9rl_caps,
1461 }, {
1462 .name = "at91sam9g45-adc",
1463 .driver_data = (unsigned long)&at91sam9g45_caps,
1464 }, {
1465 .name = "at91sam9x5-adc",
1466 .driver_data = (unsigned long)&at91sam9x5_caps,
1467 }, {
1468 /* terminator */
1469 }
1470 };
1471 MODULE_DEVICE_TABLE(platform, at91_adc_ids);
1472
1473 static struct platform_driver at91_adc_driver = {
1474 .probe = at91_adc_probe,
1475 .remove = at91_adc_remove,
1476 .id_table = at91_adc_ids,
1477 .driver = {
1478 .name = DRIVER_NAME,
1479 .of_match_table = of_match_ptr(at91_adc_dt_ids),
1480 .pm = &at91_adc_pm_ops,
1481 },
1482 };
1483
1484 module_platform_driver(at91_adc_driver);
1485
1486 MODULE_LICENSE("GPL");
1487 MODULE_DESCRIPTION("Atmel AT91 ADC Driver");
1488 MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>");
Linux with added FPC-III support