drivers/iio/adc/sun4i-gpadc-iio.c

   1 /* ADC driver for sunxi platforms' (A10, A13 and A31) GPADC
   2  *
   3  * Copyright (c) 2016 Quentin Schulz <quentin.schulz@free-electrons.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it under
   6  * the terms of the GNU General Public License version 2 as published by the
   7  * Free Software Foundation.
   8  *
   9  * The Allwinner SoCs all have an ADC that can also act as a touchscreen
  10  * controller and a thermal sensor.
  11  * The thermal sensor works only when the ADC acts as a touchscreen controller
  12  * and is configured to throw an interrupt every fixed periods of time (let say
  13  * every X seconds).
  14  * One would be tempted to disable the IP on the hardware side rather than
  15  * disabling interrupts to save some power but that resets the internal clock of
  16  * the IP, resulting in having to wait X seconds every time we want to read the
  17  * value of the thermal sensor.
  18  * This is also the reason of using autosuspend in pm_runtime. If there was no
  19  * autosuspend, the thermal sensor would need X seconds after every
  20  * pm_runtime_get_sync to get a value from the ADC. The autosuspend allows the
  21  * thermal sensor to be requested again in a certain time span before it gets
  22  * shutdown for not being used.
  23  */
  24
  25 #include <linux/completion.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/io.h>
  28 #include <linux/module.h>
  29 #include <linux/of.h>
  30 #include <linux/of_device.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/pm_runtime.h>
  33 #include <linux/regmap.h>
  34 #include <linux/thermal.h>
  35 #include <linux/delay.h>
  36
  37 #include <linux/iio/iio.h>
  38 #include <linux/iio/driver.h>
  39 #include <linux/iio/machine.h>
  40 #include <linux/mfd/sun4i-gpadc.h>
  41
  42 static unsigned int sun4i_gpadc_chan_select(unsigned int chan)
  43 {
  44         return SUN4I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
  45 }
  46
  47 static unsigned int sun6i_gpadc_chan_select(unsigned int chan)
  48 {
  49         return SUN6I_GPADC_CTRL1_ADC_CHAN_SELECT(chan);
  50 }
  51
  52 struct gpadc_data {
  53         int             temp_offset;
  54         int             temp_scale;
  55         unsigned int    tp_mode_en;
  56         unsigned int    tp_adc_select;
  57         unsigned int    (*adc_chan_select)(unsigned int chan);
  58         unsigned int    adc_chan_mask;
  59 };
  60
  61 static const struct gpadc_data sun4i_gpadc_data = {
  62         .temp_offset = -1932,
  63         .temp_scale = 133,
  64         .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
  65         .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
  66         .adc_chan_select = &sun4i_gpadc_chan_select,
  67         .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
  68 };
  69
  70 static const struct gpadc_data sun5i_gpadc_data = {
  71         .temp_offset = -1447,
  72         .temp_scale = 100,
  73         .tp_mode_en = SUN4I_GPADC_CTRL1_TP_MODE_EN,
  74         .tp_adc_select = SUN4I_GPADC_CTRL1_TP_ADC_SELECT,
  75         .adc_chan_select = &sun4i_gpadc_chan_select,
  76         .adc_chan_mask = SUN4I_GPADC_CTRL1_ADC_CHAN_MASK,
  77 };
  78
  79 static const struct gpadc_data sun6i_gpadc_data = {
  80         .temp_offset = -1623,
  81         .temp_scale = 167,
  82         .tp_mode_en = SUN6I_GPADC_CTRL1_TP_MODE_EN,
  83         .tp_adc_select = SUN6I_GPADC_CTRL1_TP_ADC_SELECT,
  84         .adc_chan_select = &sun6i_gpadc_chan_select,
  85         .adc_chan_mask = SUN6I_GPADC_CTRL1_ADC_CHAN_MASK,
  86 };
  87
  88 static const struct gpadc_data sun8i_a33_gpadc_data = {
  89         .temp_offset = -1662,
  90         .temp_scale = 162,
  91         .tp_mode_en = SUN8I_GPADC_CTRL1_CHOP_TEMP_EN,
  92 };
  93
  94 struct sun4i_gpadc_iio {
  95         struct iio_dev                  *indio_dev;
  96         struct completion               completion;
  97         int                             temp_data;
  98         u32                             adc_data;
  99         struct regmap                   *regmap;
 100         unsigned int                    fifo_data_irq;
 101         atomic_t                        ignore_fifo_data_irq;
 102         unsigned int                    temp_data_irq;
 103         atomic_t                        ignore_temp_data_irq;
 104         const struct gpadc_data         *data;
 105         bool                            no_irq;
 106         /* prevents concurrent reads of temperature and ADC */
 107         struct mutex                    mutex;
 108         struct thermal_zone_device      *tzd;
 109         struct device                   *sensor_device;
 110 };
 111
 112 #define SUN4I_GPADC_ADC_CHANNEL(_channel, _name) {              \
 113         .type = IIO_VOLTAGE,                                    \
 114         .indexed = 1,                                           \
 115         .channel = _channel,                                    \
 116         .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),           \
 117         .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),   \
 118         .datasheet_name = _name,                                \
 119 }
 120
 121 static struct iio_map sun4i_gpadc_hwmon_maps[] = {
 122         {
 123                 .adc_channel_label = "temp_adc",
 124                 .consumer_dev_name = "iio_hwmon.0",
 125         },
 126         { /* sentinel */ },
 127 };
 128
 129 static const struct iio_chan_spec sun4i_gpadc_channels[] = {
 130         SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
 131         SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
 132         SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
 133         SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
 134         {
 135                 .type = IIO_TEMP,
 136                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 137                                       BIT(IIO_CHAN_INFO_SCALE) |
 138                                       BIT(IIO_CHAN_INFO_OFFSET),
 139                 .datasheet_name = "temp_adc",
 140         },
 141 };
 142
 143 static const struct iio_chan_spec sun4i_gpadc_channels_no_temp[] = {
 144         SUN4I_GPADC_ADC_CHANNEL(0, "adc_chan0"),
 145         SUN4I_GPADC_ADC_CHANNEL(1, "adc_chan1"),
 146         SUN4I_GPADC_ADC_CHANNEL(2, "adc_chan2"),
 147         SUN4I_GPADC_ADC_CHANNEL(3, "adc_chan3"),
 148 };
 149
 150 static const struct iio_chan_spec sun8i_a33_gpadc_channels[] = {
 151         {
 152                 .type = IIO_TEMP,
 153                 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
 154                                       BIT(IIO_CHAN_INFO_SCALE) |
 155                                       BIT(IIO_CHAN_INFO_OFFSET),
 156                 .datasheet_name = "temp_adc",
 157         },
 158 };
 159
 160 static const struct regmap_config sun4i_gpadc_regmap_config = {
 161         .reg_bits = 32,
 162         .val_bits = 32,
 163         .reg_stride = 4,
 164         .fast_io = true,
 165 };
 166
 167 static int sun4i_prepare_for_irq(struct iio_dev *indio_dev, int channel,
 168                                  unsigned int irq)
 169 {
 170         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 171         int ret;
 172         u32 reg;
 173
 174         pm_runtime_get_sync(indio_dev->dev.parent);
 175
 176         reinit_completion(&info->completion);
 177
 178         ret = regmap_write(info->regmap, SUN4I_GPADC_INT_FIFOC,
 179                            SUN4I_GPADC_INT_FIFOC_TP_FIFO_TRIG_LEVEL(1) |
 180                            SUN4I_GPADC_INT_FIFOC_TP_FIFO_FLUSH);
 181         if (ret)
 182                 return ret;
 183
 184         ret = regmap_read(info->regmap, SUN4I_GPADC_CTRL1, &reg);
 185         if (ret)
 186                 return ret;
 187
 188         if (irq == info->fifo_data_irq) {
 189                 ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
 190                                    info->data->tp_mode_en |
 191                                    info->data->tp_adc_select |
 192                                    info->data->adc_chan_select(channel));
 193                 /*
 194                  * When the IP changes channel, it needs a bit of time to get
 195                  * correct values.
 196                  */
 197                 if ((reg & info->data->adc_chan_mask) !=
 198                          info->data->adc_chan_select(channel))
 199                         mdelay(10);
 200
 201         } else {
 202                 /*
 203                  * The temperature sensor returns valid data only when the ADC
 204                  * operates in touchscreen mode.
 205                  */
 206                 ret = regmap_write(info->regmap, SUN4I_GPADC_CTRL1,
 207                                    info->data->tp_mode_en);
 208         }
 209
 210         if (ret)
 211                 return ret;
 212
 213         /*
 214          * When the IP changes mode between ADC or touchscreen, it
 215          * needs a bit of time to get correct values.
 216          */
 217         if ((reg & info->data->tp_adc_select) != info->data->tp_adc_select)
 218                 mdelay(100);
 219
 220         return 0;
 221 }
 222
 223 static int sun4i_gpadc_read(struct iio_dev *indio_dev, int channel, int *val,
 224                             unsigned int irq)
 225 {
 226         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 227         int ret;
 228
 229         mutex_lock(&info->mutex);
 230
 231         ret = sun4i_prepare_for_irq(indio_dev, channel, irq);
 232         if (ret)
 233                 goto err;
 234
 235         enable_irq(irq);
 236
 237         /*
 238          * The temperature sensor throws an interruption periodically (currently
 239          * set at periods of ~0.6s in sun4i_gpadc_runtime_resume). A 1s delay
 240          * makes sure an interruption occurs in normal conditions. If it doesn't
 241          * occur, then there is a timeout.
 242          */
 243         if (!wait_for_completion_timeout(&info->completion,
 244                                          msecs_to_jiffies(1000))) {
 245                 ret = -ETIMEDOUT;
 246                 goto err;
 247         }
 248
 249         if (irq == info->fifo_data_irq)
 250                 *val = info->adc_data;
 251         else
 252                 *val = info->temp_data;
 253
 254         ret = 0;
 255         pm_runtime_mark_last_busy(indio_dev->dev.parent);
 256
 257 err:
 258         pm_runtime_put_autosuspend(indio_dev->dev.parent);
 259         disable_irq(irq);
 260         mutex_unlock(&info->mutex);
 261
 262         return ret;
 263 }
 264
 265 static int sun4i_gpadc_adc_read(struct iio_dev *indio_dev, int channel,
 266                                 int *val)
 267 {
 268         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 269
 270         return sun4i_gpadc_read(indio_dev, channel, val, info->fifo_data_irq);
 271 }
 272
 273 static int sun4i_gpadc_temp_read(struct iio_dev *indio_dev, int *val)
 274 {
 275         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 276
 277         if (info->no_irq) {
 278                 pm_runtime_get_sync(indio_dev->dev.parent);
 279
 280                 regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, val);
 281
 282                 pm_runtime_mark_last_busy(indio_dev->dev.parent);
 283                 pm_runtime_put_autosuspend(indio_dev->dev.parent);
 284
 285                 return 0;
 286         }
 287
 288         return sun4i_gpadc_read(indio_dev, 0, val, info->temp_data_irq);
 289 }
 290
 291 static int sun4i_gpadc_temp_offset(struct iio_dev *indio_dev, int *val)
 292 {
 293         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 294
 295         *val = info->data->temp_offset;
 296
 297         return 0;
 298 }
 299
 300 static int sun4i_gpadc_temp_scale(struct iio_dev *indio_dev, int *val)
 301 {
 302         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 303
 304         *val = info->data->temp_scale;
 305
 306         return 0;
 307 }
 308
 309 static int sun4i_gpadc_read_raw(struct iio_dev *indio_dev,
 310                                 struct iio_chan_spec const *chan, int *val,
 311                                 int *val2, long mask)
 312 {
 313         int ret;
 314
 315         switch (mask) {
 316         case IIO_CHAN_INFO_OFFSET:
 317                 ret = sun4i_gpadc_temp_offset(indio_dev, val);
 318                 if (ret)
 319                         return ret;
 320
 321                 return IIO_VAL_INT;
 322         case IIO_CHAN_INFO_RAW:
 323                 if (chan->type == IIO_VOLTAGE)
 324                         ret = sun4i_gpadc_adc_read(indio_dev, chan->channel,
 325                                                    val);
 326                 else
 327                         ret = sun4i_gpadc_temp_read(indio_dev, val);
 328
 329                 if (ret)
 330                         return ret;
 331
 332                 return IIO_VAL_INT;
 333         case IIO_CHAN_INFO_SCALE:
 334                 if (chan->type == IIO_VOLTAGE) {
 335                         /* 3000mV / 4096 * raw */
 336                         *val = 0;
 337                         *val2 = 732421875;
 338                         return IIO_VAL_INT_PLUS_NANO;
 339                 }
 340
 341                 ret = sun4i_gpadc_temp_scale(indio_dev, val);
 342                 if (ret)
 343                         return ret;
 344
 345                 return IIO_VAL_INT;
 346         default:
 347                 return -EINVAL;
 348         }
 349
 350         return -EINVAL;
 351 }
 352
 353 static const struct iio_info sun4i_gpadc_iio_info = {
 354         .read_raw = sun4i_gpadc_read_raw,
 355 };
 356
 357 static irqreturn_t sun4i_gpadc_temp_data_irq_handler(int irq, void *dev_id)
 358 {
 359         struct sun4i_gpadc_iio *info = dev_id;
 360
 361         if (atomic_read(&info->ignore_temp_data_irq))
 362                 goto out;
 363
 364         if (!regmap_read(info->regmap, SUN4I_GPADC_TEMP_DATA, &info->temp_data))
 365                 complete(&info->completion);
 366
 367 out:
 368         return IRQ_HANDLED;
 369 }
 370
 371 static irqreturn_t sun4i_gpadc_fifo_data_irq_handler(int irq, void *dev_id)
 372 {
 373         struct sun4i_gpadc_iio *info = dev_id;
 374
 375         if (atomic_read(&info->ignore_fifo_data_irq))
 376                 goto out;
 377
 378         if (!regmap_read(info->regmap, SUN4I_GPADC_DATA, &info->adc_data))
 379                 complete(&info->completion);
 380
 381 out:
 382         return IRQ_HANDLED;
 383 }
 384
 385 static int sun4i_gpadc_runtime_suspend(struct device *dev)
 386 {
 387         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
 388
 389         /* Disable the ADC on IP */
 390         regmap_write(info->regmap, SUN4I_GPADC_CTRL1, 0);
 391         /* Disable temperature sensor on IP */
 392         regmap_write(info->regmap, SUN4I_GPADC_TPR, 0);
 393
 394         return 0;
 395 }
 396
 397 static int sun4i_gpadc_runtime_resume(struct device *dev)
 398 {
 399         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(dev));
 400
 401         /* clkin = 6MHz */
 402         regmap_write(info->regmap, SUN4I_GPADC_CTRL0,
 403                      SUN4I_GPADC_CTRL0_ADC_CLK_DIVIDER(2) |
 404                      SUN4I_GPADC_CTRL0_FS_DIV(7) |
 405                      SUN4I_GPADC_CTRL0_T_ACQ(63));
 406         regmap_write(info->regmap, SUN4I_GPADC_CTRL1, info->data->tp_mode_en);
 407         regmap_write(info->regmap, SUN4I_GPADC_CTRL3,
 408                      SUN4I_GPADC_CTRL3_FILTER_EN |
 409                      SUN4I_GPADC_CTRL3_FILTER_TYPE(1));
 410         /* period = SUN4I_GPADC_TPR_TEMP_PERIOD * 256 * 16 / clkin; ~0.6s */
 411         regmap_write(info->regmap, SUN4I_GPADC_TPR,
 412                      SUN4I_GPADC_TPR_TEMP_ENABLE |
 413                      SUN4I_GPADC_TPR_TEMP_PERIOD(800));
 414
 415         return 0;
 416 }
 417
 418 static int sun4i_gpadc_get_temp(void *data, int *temp)
 419 {
 420         struct sun4i_gpadc_iio *info = data;
 421         int val, scale, offset;
 422
 423         if (sun4i_gpadc_temp_read(info->indio_dev, &val))
 424                 return -ETIMEDOUT;
 425
 426         sun4i_gpadc_temp_scale(info->indio_dev, &scale);
 427         sun4i_gpadc_temp_offset(info->indio_dev, &offset);
 428
 429         *temp = (val + offset) * scale;
 430
 431         return 0;
 432 }
 433
 434 static const struct thermal_zone_of_device_ops sun4i_ts_tz_ops = {
 435         .get_temp = &sun4i_gpadc_get_temp,
 436 };
 437
 438 static const struct dev_pm_ops sun4i_gpadc_pm_ops = {
 439         .runtime_suspend = &sun4i_gpadc_runtime_suspend,
 440         .runtime_resume = &sun4i_gpadc_runtime_resume,
 441 };
 442
 443 static int sun4i_irq_init(struct platform_device *pdev, const char *name,
 444                           irq_handler_t handler, const char *devname,
 445                           unsigned int *irq, atomic_t *atomic)
 446 {
 447         int ret;
 448         struct sun4i_gpadc_dev *mfd_dev = dev_get_drvdata(pdev->dev.parent);
 449         struct sun4i_gpadc_iio *info = iio_priv(dev_get_drvdata(&pdev->dev));
 450
 451         /*
 452          * Once the interrupt is activated, the IP continuously performs
 453          * conversions thus throws interrupts. The interrupt is activated right
 454          * after being requested but we want to control when these interrupts
 455          * occur thus we disable it right after being requested. However, an
 456          * interrupt might occur between these two instructions and we have to
 457          * make sure that does not happen, by using atomic flags. We set the
 458          * flag before requesting the interrupt and unset it right after
 459          * disabling the interrupt. When an interrupt occurs between these two
 460          * instructions, reading the atomic flag will tell us to ignore the
 461          * interrupt.
 462          */
 463         atomic_set(atomic, 1);
 464
 465         ret = platform_get_irq_byname(pdev, name);
 466         if (ret < 0) {
 467                 dev_err(&pdev->dev, "no %s interrupt registered\n", name);
 468                 return ret;
 469         }
 470
 471         ret = regmap_irq_get_virq(mfd_dev->regmap_irqc, ret);
 472         if (ret < 0) {
 473                 dev_err(&pdev->dev, "failed to get virq for irq %s\n", name);
 474                 return ret;
 475         }
 476
 477         *irq = ret;
 478         ret = devm_request_any_context_irq(&pdev->dev, *irq, handler, 0,
 479                                            devname, info);
 480         if (ret < 0) {
 481                 dev_err(&pdev->dev, "could not request %s interrupt: %d\n",
 482                         name, ret);
 483                 return ret;
 484         }
 485
 486         disable_irq(*irq);
 487         atomic_set(atomic, 0);
 488
 489         return 0;
 490 }
 491
 492 static const struct of_device_id sun4i_gpadc_of_id[] = {
 493         {
 494                 .compatible = "allwinner,sun8i-a33-ths",
 495                 .data = &sun8i_a33_gpadc_data,
 496         },
 497         { /* sentinel */ }
 498 };
 499
 500 static int sun4i_gpadc_probe_dt(struct platform_device *pdev,
 501                                 struct iio_dev *indio_dev)
 502 {
 503         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 504         struct resource *mem;
 505         void __iomem *base;
 506         int ret;
 507
 508         info->data = of_device_get_match_data(&pdev->dev);
 509         if (!info->data)
 510                 return -ENODEV;
 511
 512         info->no_irq = true;
 513         indio_dev->num_channels = ARRAY_SIZE(sun8i_a33_gpadc_channels);
 514         indio_dev->channels = sun8i_a33_gpadc_channels;
 515
 516         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 517         base = devm_ioremap_resource(&pdev->dev, mem);
 518         if (IS_ERR(base))
 519                 return PTR_ERR(base);
 520
 521         info->regmap = devm_regmap_init_mmio(&pdev->dev, base,
 522                                              &sun4i_gpadc_regmap_config);
 523         if (IS_ERR(info->regmap)) {
 524                 ret = PTR_ERR(info->regmap);
 525                 dev_err(&pdev->dev, "failed to init regmap: %d\n", ret);
 526                 return ret;
 527         }
 528
 529         if (IS_ENABLED(CONFIG_THERMAL_OF))
 530                 info->sensor_device = &pdev->dev;
 531
 532         return 0;
 533 }
 534
 535 static int sun4i_gpadc_probe_mfd(struct platform_device *pdev,
 536                                  struct iio_dev *indio_dev)
 537 {
 538         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 539         struct sun4i_gpadc_dev *sun4i_gpadc_dev =
 540                 dev_get_drvdata(pdev->dev.parent);
 541         int ret;
 542
 543         info->no_irq = false;
 544         info->regmap = sun4i_gpadc_dev->regmap;
 545
 546         indio_dev->num_channels = ARRAY_SIZE(sun4i_gpadc_channels);
 547         indio_dev->channels = sun4i_gpadc_channels;
 548
 549         info->data = (struct gpadc_data *)platform_get_device_id(pdev)->driver_data;
 550
 551         /*
 552          * Since the controller needs to be in touchscreen mode for its thermal
 553          * sensor to operate properly, and that switching between the two modes
 554          * needs a delay, always registering in the thermal framework will
 555          * significantly slow down the conversion rate of the ADCs.
 556          *
 557          * Therefore, instead of depending on THERMAL_OF in Kconfig, we only
 558          * register the sensor if that option is enabled, eventually leaving
 559          * that choice to the user.
 560          */
 561
 562         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
 563                 /*
 564                  * This driver is a child of an MFD which has a node in the DT
 565                  * but not its children, because of DT backward compatibility
 566                  * for A10, A13 and A31 SoCs. Therefore, the resulting devices
 567                  * of this driver do not have an of_node variable.
 568                  * However, its parent (the MFD driver) has an of_node variable
 569                  * and since devm_thermal_zone_of_sensor_register uses its first
 570                  * argument to match the phandle defined in the node of the
 571                  * thermal driver with the of_node of the device passed as first
 572                  * argument and the third argument to call ops from
 573                  * thermal_zone_of_device_ops, the solution is to use the parent
 574                  * device as first argument to match the phandle with its
 575                  * of_node, and the device from this driver as third argument to
 576                  * return the temperature.
 577                  */
 578                 info->sensor_device = pdev->dev.parent;
 579         } else {
 580                 indio_dev->num_channels =
 581                         ARRAY_SIZE(sun4i_gpadc_channels_no_temp);
 582                 indio_dev->channels = sun4i_gpadc_channels_no_temp;
 583         }
 584
 585         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
 586                 ret = sun4i_irq_init(pdev, "TEMP_DATA_PENDING",
 587                                      sun4i_gpadc_temp_data_irq_handler,
 588                                      "temp_data", &info->temp_data_irq,
 589                                      &info->ignore_temp_data_irq);
 590                 if (ret < 0)
 591                         return ret;
 592         }
 593
 594         ret = sun4i_irq_init(pdev, "FIFO_DATA_PENDING",
 595                              sun4i_gpadc_fifo_data_irq_handler, "fifo_data",
 596                              &info->fifo_data_irq, &info->ignore_fifo_data_irq);
 597         if (ret < 0)
 598                 return ret;
 599
 600         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
 601                 ret = iio_map_array_register(indio_dev, sun4i_gpadc_hwmon_maps);
 602                 if (ret < 0) {
 603                         dev_err(&pdev->dev,
 604                                 "failed to register iio map array\n");
 605                         return ret;
 606                 }
 607         }
 608
 609         return 0;
 610 }
 611
 612 static int sun4i_gpadc_probe(struct platform_device *pdev)
 613 {
 614         struct sun4i_gpadc_iio *info;
 615         struct iio_dev *indio_dev;
 616         int ret;
 617
 618         indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
 619         if (!indio_dev)
 620                 return -ENOMEM;
 621
 622         info = iio_priv(indio_dev);
 623         platform_set_drvdata(pdev, indio_dev);
 624
 625         mutex_init(&info->mutex);
 626         info->indio_dev = indio_dev;
 627         init_completion(&info->completion);
 628         indio_dev->name = dev_name(&pdev->dev);
 629         indio_dev->dev.parent = &pdev->dev;
 630         indio_dev->dev.of_node = pdev->dev.of_node;
 631         indio_dev->info = &sun4i_gpadc_iio_info;
 632         indio_dev->modes = INDIO_DIRECT_MODE;
 633
 634         if (pdev->dev.of_node)
 635                 ret = sun4i_gpadc_probe_dt(pdev, indio_dev);
 636         else
 637                 ret = sun4i_gpadc_probe_mfd(pdev, indio_dev);
 638
 639         if (ret)
 640                 return ret;
 641
 642         pm_runtime_set_autosuspend_delay(&pdev->dev,
 643                                          SUN4I_GPADC_AUTOSUSPEND_DELAY);
 644         pm_runtime_use_autosuspend(&pdev->dev);
 645         pm_runtime_set_suspended(&pdev->dev);
 646         pm_runtime_enable(&pdev->dev);
 647
 648         if (IS_ENABLED(CONFIG_THERMAL_OF)) {
 649                 info->tzd = thermal_zone_of_sensor_register(info->sensor_device,
 650                                                             0, info,
 651                                                             &sun4i_ts_tz_ops);
 652                 /*
 653                  * Do not fail driver probing when failing to register in
 654                  * thermal because no thermal DT node is found.
 655                  */
 656                 if (IS_ERR(info->tzd) && PTR_ERR(info->tzd) != -ENODEV) {
 657                         dev_err(&pdev->dev,
 658                                 "could not register thermal sensor: %ld\n",
 659                                 PTR_ERR(info->tzd));
 660                         return PTR_ERR(info->tzd);
 661                 }
 662         }
 663
 664         ret = devm_iio_device_register(&pdev->dev, indio_dev);
 665         if (ret < 0) {
 666                 dev_err(&pdev->dev, "could not register the device\n");
 667                 goto err_map;
 668         }
 669
 670         return 0;
 671
 672 err_map:
 673         if (!info->no_irq && IS_ENABLED(CONFIG_THERMAL_OF))
 674                 iio_map_array_unregister(indio_dev);
 675
 676         pm_runtime_put(&pdev->dev);
 677         pm_runtime_disable(&pdev->dev);
 678
 679         return ret;
 680 }
 681
 682 static int sun4i_gpadc_remove(struct platform_device *pdev)
 683 {
 684         struct iio_dev *indio_dev = platform_get_drvdata(pdev);
 685         struct sun4i_gpadc_iio *info = iio_priv(indio_dev);
 686
 687         pm_runtime_put(&pdev->dev);
 688         pm_runtime_disable(&pdev->dev);
 689
 690         if (!IS_ENABLED(CONFIG_THERMAL_OF))
 691                 return 0;
 692
 693         thermal_zone_of_sensor_unregister(info->sensor_device, info->tzd);
 694
 695         if (!info->no_irq)
 696                 iio_map_array_unregister(indio_dev);
 697
 698         return 0;
 699 }
 700
 701 static const struct platform_device_id sun4i_gpadc_id[] = {
 702         { "sun4i-a10-gpadc-iio", (kernel_ulong_t)&sun4i_gpadc_data },
 703         { "sun5i-a13-gpadc-iio", (kernel_ulong_t)&sun5i_gpadc_data },
 704         { "sun6i-a31-gpadc-iio", (kernel_ulong_t)&sun6i_gpadc_data },
 705         { /* sentinel */ },
 706 };
 707 MODULE_DEVICE_TABLE(platform, sun4i_gpadc_id);
 708
 709 static struct platform_driver sun4i_gpadc_driver = {
 710         .driver = {
 711                 .name = "sun4i-gpadc-iio",
 712                 .of_match_table = sun4i_gpadc_of_id,
 713                 .pm = &sun4i_gpadc_pm_ops,
 714         },
 715         .id_table = sun4i_gpadc_id,
 716         .probe = sun4i_gpadc_probe,
 717         .remove = sun4i_gpadc_remove,
 718 };
 719 MODULE_DEVICE_TABLE(of, sun4i_gpadc_of_id);
 720
 721 module_platform_driver(sun4i_gpadc_driver);
 722
 723 MODULE_DESCRIPTION("ADC driver for sunxi platforms");
 724 MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>");
 725 MODULE_LICENSE("GPL v2");