| blob | 6ef63b86787962668f9adf5bbad199910cd887d3 |
1 /*
2 * Driver for the Conexant CX25821 PCIe bridge
3 *
4 * Copyright (C) 2009 Conexant Systems Inc.
5 * Authors <shu.lin@conexant.com>, <hiep.huynh@conexant.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 *
16 * GNU General Public License for more details.
17 */
19 #ifndef __MEDUSA_REGISTERS__
20 #define __MEDUSA_REGISTERS__
22 /* Serial Slave Registers */
23 #define HOST_REGISTER1 0x0000
24 #define HOST_REGISTER2 0x0001
26 /* Chip Configuration Registers */
27 #define CHIP_CTRL 0x0100
28 #define AFE_AB_CTRL 0x0104
29 #define AFE_CD_CTRL 0x0108
30 #define AFE_EF_CTRL 0x010C
31 #define AFE_GH_CTRL 0x0110
32 #define DENC_AB_CTRL 0x0114
33 #define BYP_AB_CTRL 0x0118
34 #define MON_A_CTRL 0x011C
35 #define DISP_SEQ_A 0x0120
36 #define DISP_SEQ_B 0x0124
37 #define DISP_AB_CNT 0x0128
38 #define DISP_CD_CNT 0x012C
39 #define DISP_EF_CNT 0x0130
40 #define DISP_GH_CNT 0x0134
41 #define DISP_IJ_CNT 0x0138
42 #define PIN_OE_CTRL 0x013C
43 #define PIN_SPD_CTRL 0x0140
44 #define PIN_SPD_CTRL2 0x0144
45 #define IRQ_STAT_CTRL 0x0148
46 #define POWER_CTRL_AB 0x014C
47 #define POWER_CTRL_CD 0x0150
48 #define POWER_CTRL_EF 0x0154
49 #define POWER_CTRL_GH 0x0158
50 #define TUNE_CTRL 0x015C
51 #define BIAS_CTRL 0x0160
52 #define AFE_AB_DIAG_CTRL 0x0164
53 #define AFE_CD_DIAG_CTRL 0x0168
54 #define AFE_EF_DIAG_CTRL 0x016C
55 #define AFE_GH_DIAG_CTRL 0x0170
56 #define PLL_AB_DIAG_CTRL 0x0174
57 #define PLL_CD_DIAG_CTRL 0x0178
58 #define PLL_EF_DIAG_CTRL 0x017C
59 #define PLL_GH_DIAG_CTRL 0x0180
60 #define TEST_CTRL 0x0184
61 #define BIST_STAT 0x0188
62 #define BIST_STAT2 0x018C
63 #define BIST_VID_PLL_AB_STAT 0x0190
64 #define BIST_VID_PLL_CD_STAT 0x0194
65 #define BIST_VID_PLL_EF_STAT 0x0198
66 #define BIST_VID_PLL_GH_STAT 0x019C
67 #define DLL_DIAG_CTRL 0x01A0
68 #define DEV_CH_ID_CTRL 0x01A4
69 #define ABIST_CTRL_STATUS 0x01A8
70 #define ABIST_FREQ 0x01AC
71 #define ABIST_GOERT_SHIFT 0x01B0
72 #define ABIST_COEF12 0x01B4
73 #define ABIST_COEF34 0x01B8
74 #define ABIST_COEF56 0x01BC
75 #define ABIST_COEF7_SNR 0x01C0
76 #define ABIST_ADC_CAL 0x01C4
77 #define ABIST_BIN1_VGA0 0x01C8
78 #define ABIST_BIN2_VGA1 0x01CC
79 #define ABIST_BIN3_VGA2 0x01D0
80 #define ABIST_BIN4_VGA3 0x01D4
81 #define ABIST_BIN5_VGA4 0x01D8
82 #define ABIST_BIN6_VGA5 0x01DC
83 #define ABIST_BIN7_VGA6 0x01E0
84 #define ABIST_CLAMP_A 0x01E4
85 #define ABIST_CLAMP_B 0x01E8
86 #define ABIST_CLAMP_C 0x01EC
87 #define ABIST_CLAMP_D 0x01F0
88 #define ABIST_CLAMP_E 0x01F4
89 #define ABIST_CLAMP_F 0x01F8
91 /* Digital Video Encoder A Registers */
92 #define DENC_A_REG_1 0x0200
93 #define DENC_A_REG_2 0x0204
94 #define DENC_A_REG_3 0x0208
95 #define DENC_A_REG_4 0x020C
96 #define DENC_A_REG_5 0x0210
97 #define DENC_A_REG_6 0x0214
98 #define DENC_A_REG_7 0x0218
99 #define DENC_A_REG_8 0x021C
101 /* Digital Video Encoder B Registers */
102 #define DENC_B_REG_1 0x0300
103 #define DENC_B_REG_2 0x0304
104 #define DENC_B_REG_3 0x0308
105 #define DENC_B_REG_4 0x030C
106 #define DENC_B_REG_5 0x0310
107 #define DENC_B_REG_6 0x0314
108 #define DENC_B_REG_7 0x0318
109 #define DENC_B_REG_8 0x031C
111 /* Video Decoder A Registers */
112 #define MODE_CTRL 0x1000
113 #define OUT_CTRL1 0x1004
114 #define OUT_CTRL_NS 0x1008
115 #define GEN_STAT 0x100C
116 #define INT_STAT_MASK 0x1010
117 #define LUMA_CTRL 0x1014
118 #define CHROMA_CTRL 0x1018
119 #define CRUSH_CTRL 0x101C
120 #define HORIZ_TIM_CTRL 0x1020
121 #define VERT_TIM_CTRL 0x1024
122 #define MISC_TIM_CTRL 0x1028
123 #define FIELD_COUNT 0x102C
124 #define HSCALE_CTRL 0x1030
125 #define VSCALE_CTRL 0x1034
126 #define MAN_VGA_CTRL 0x1038
127 #define MAN_AGC_CTRL 0x103C
128 #define DFE_CTRL1 0x1040
129 #define DFE_CTRL2 0x1044
130 #define DFE_CTRL3 0x1048
131 #define PLL_CTRL 0x104C
132 #define PLL_CTRL_FAST 0x1050
133 #define HTL_CTRL 0x1054
134 #define SRC_CFG 0x1058
135 #define SC_STEP_SIZE 0x105C
136 #define SC_CONVERGE_CTRL 0x1060
137 #define SC_LOOP_CTRL 0x1064
138 #define COMB_2D_HFS_CFG 0x1068
139 #define COMB_2D_HFD_CFG 0x106C
140 #define COMB_2D_LF_CFG 0x1070
141 #define COMB_2D_BLEND 0x1074
142 #define COMB_MISC_CTRL 0x1078
143 #define COMB_FLAT_THRESH_CTRL 0x107C
144 #define COMB_TEST 0x1080
145 #define BP_MISC_CTRL 0x1084
146 #define VCR_DET_CTRL 0x1088
147 #define NOISE_DET_CTRL 0x108C
148 #define COMB_FLAT_NOISE_CTRL 0x1090
149 #define VERSION 0x11F8
150 #define SOFT_RST_CTRL 0x11FC
152 /* Video Decoder B Registers */
153 #define VDEC_B_MODE_CTRL 0x1200
154 #define VDEC_B_OUT_CTRL1 0x1204
155 #define VDEC_B_OUT_CTRL_NS 0x1208
156 #define VDEC_B_GEN_STAT 0x120C
157 #define VDEC_B_INT_STAT_MASK 0x1210
158 #define VDEC_B_LUMA_CTRL 0x1214
159 #define VDEC_B_CHROMA_CTRL 0x1218
160 #define VDEC_B_CRUSH_CTRL 0x121C
161 #define VDEC_B_HORIZ_TIM_CTRL 0x1220
162 #define VDEC_B_VERT_TIM_CTRL 0x1224
163 #define VDEC_B_MISC_TIM_CTRL 0x1228
164 #define VDEC_B_FIELD_COUNT 0x122C
165 #define VDEC_B_HSCALE_CTRL 0x1230
166 #define VDEC_B_VSCALE_CTRL 0x1234
167 #define VDEC_B_MAN_VGA_CTRL 0x1238
168 #define VDEC_B_MAN_AGC_CTRL 0x123C
169 #define VDEC_B_DFE_CTRL1 0x1240
170 #define VDEC_B_DFE_CTRL2 0x1244
171 #define VDEC_B_DFE_CTRL3 0x1248
172 #define VDEC_B_PLL_CTRL 0x124C
173 #define VDEC_B_PLL_CTRL_FAST 0x1250
174 #define VDEC_B_HTL_CTRL 0x1254
175 #define VDEC_B_SRC_CFG 0x1258
176 #define VDEC_B_SC_STEP_SIZE 0x125C
177 #define VDEC_B_SC_CONVERGE_CTRL 0x1260
178 #define VDEC_B_SC_LOOP_CTRL 0x1264
179 #define VDEC_B_COMB_2D_HFS_CFG 0x1268
180 #define VDEC_B_COMB_2D_HFD_CFG 0x126C
181 #define VDEC_B_COMB_2D_LF_CFG 0x1270
182 #define VDEC_B_COMB_2D_BLEND 0x1274
183 #define VDEC_B_COMB_MISC_CTRL 0x1278
184 #define VDEC_B_COMB_FLAT_THRESH_CTRL 0x127C
185 #define VDEC_B_COMB_TEST 0x1280
186 #define VDEC_B_BP_MISC_CTRL 0x1284
187 #define VDEC_B_VCR_DET_CTRL 0x1288
188 #define VDEC_B_NOISE_DET_CTRL 0x128C
189 #define VDEC_B_COMB_FLAT_NOISE_CTRL 0x1290
190 #define VDEC_B_VERSION 0x13F8
191 #define VDEC_B_SOFT_RST_CTRL 0x13FC
193 /* Video Decoder C Registers */
194 #define VDEC_C_MODE_CTRL 0x1400
195 #define VDEC_C_OUT_CTRL1 0x1404
196 #define VDEC_C_OUT_CTRL_NS 0x1408
197 #define VDEC_C_GEN_STAT 0x140C
198 #define VDEC_C_INT_STAT_MASK 0x1410
199 #define VDEC_C_LUMA_CTRL 0x1414
200 #define VDEC_C_CHROMA_CTRL 0x1418
201 #define VDEC_C_CRUSH_CTRL 0x141C
202 #define VDEC_C_HORIZ_TIM_CTRL 0x1420
203 #define VDEC_C_VERT_TIM_CTRL 0x1424
204 #define VDEC_C_MISC_TIM_CTRL 0x1428
205 #define VDEC_C_FIELD_COUNT 0x142C
206 #define VDEC_C_HSCALE_CTRL 0x1430
207 #define VDEC_C_VSCALE_CTRL 0x1434
208 #define VDEC_C_MAN_VGA_CTRL 0x1438
209 #define VDEC_C_MAN_AGC_CTRL 0x143C
210 #define VDEC_C_DFE_CTRL1 0x1440
211 #define VDEC_C_DFE_CTRL2 0x1444
212 #define VDEC_C_DFE_CTRL3 0x1448
213 #define VDEC_C_PLL_CTRL 0x144C
214 #define VDEC_C_PLL_CTRL_FAST 0x1450
215 #define VDEC_C_HTL_CTRL 0x1454
216 #define VDEC_C_SRC_CFG 0x1458
217 #define VDEC_C_SC_STEP_SIZE 0x145C
218 #define VDEC_C_SC_CONVERGE_CTRL 0x1460
219 #define VDEC_C_SC_LOOP_CTRL 0x1464
220 #define VDEC_C_COMB_2D_HFS_CFG 0x1468
221 #define VDEC_C_COMB_2D_HFD_CFG 0x146C
222 #define VDEC_C_COMB_2D_LF_CFG 0x1470
223 #define VDEC_C_COMB_2D_BLEND 0x1474
224 #define VDEC_C_COMB_MISC_CTRL 0x1478
225 #define VDEC_C_COMB_FLAT_THRESH_CTRL 0x147C
226 #define VDEC_C_COMB_TEST 0x1480
227 #define VDEC_C_BP_MISC_CTRL 0x1484
228 #define VDEC_C_VCR_DET_CTRL 0x1488
229 #define VDEC_C_NOISE_DET_CTRL 0x148C
230 #define VDEC_C_COMB_FLAT_NOISE_CTRL 0x1490
231 #define VDEC_C_VERSION 0x15F8
232 #define VDEC_C_SOFT_RST_CTRL 0x15FC
234 /* Video Decoder D Registers */
235 #define VDEC_D_MODE_CTRL 0x1600
236 #define VDEC_D_OUT_CTRL1 0x1604
237 #define VDEC_D_OUT_CTRL_NS 0x1608
238 #define VDEC_D_GEN_STAT 0x160C
239 #define VDEC_D_INT_STAT_MASK 0x1610
240 #define VDEC_D_LUMA_CTRL 0x1614
241 #define VDEC_D_CHROMA_CTRL 0x1618
242 #define VDEC_D_CRUSH_CTRL 0x161C
243 #define VDEC_D_HORIZ_TIM_CTRL 0x1620
244 #define VDEC_D_VERT_TIM_CTRL 0x1624
245 #define VDEC_D_MISC_TIM_CTRL 0x1628
246 #define VDEC_D_FIELD_COUNT 0x162C
247 #define VDEC_D_HSCALE_CTRL 0x1630
248 #define VDEC_D_VSCALE_CTRL 0x1634
249 #define VDEC_D_MAN_VGA_CTRL 0x1638
250 #define VDEC_D_MAN_AGC_CTRL 0x163C
251 #define VDEC_D_DFE_CTRL1 0x1640
252 #define VDEC_D_DFE_CTRL2 0x1644
253 #define VDEC_D_DFE_CTRL3 0x1648
254 #define VDEC_D_PLL_CTRL 0x164C
255 #define VDEC_D_PLL_CTRL_FAST 0x1650
256 #define VDEC_D_HTL_CTRL 0x1654
257 #define VDEC_D_SRC_CFG 0x1658
258 #define VDEC_D_SC_STEP_SIZE 0x165C
259 #define VDEC_D_SC_CONVERGE_CTRL 0x1660
260 #define VDEC_D_SC_LOOP_CTRL 0x1664
261 #define VDEC_D_COMB_2D_HFS_CFG 0x1668
262 #define VDEC_D_COMB_2D_HFD_CFG 0x166C
263 #define VDEC_D_COMB_2D_LF_CFG 0x1670
264 #define VDEC_D_COMB_2D_BLEND 0x1674
265 #define VDEC_D_COMB_MISC_CTRL 0x1678
266 #define VDEC_D_COMB_FLAT_THRESH_CTRL 0x167C
267 #define VDEC_D_COMB_TEST 0x1680
268 #define VDEC_D_BP_MISC_CTRL 0x1684
269 #define VDEC_D_VCR_DET_CTRL 0x1688
270 #define VDEC_D_NOISE_DET_CTRL 0x168C
271 #define VDEC_D_COMB_FLAT_NOISE_CTRL 0x1690
272 #define VDEC_D_VERSION 0x17F8
273 #define VDEC_D_SOFT_RST_CTRL 0x17FC
275 /* Video Decoder E Registers */
276 #define VDEC_E_MODE_CTRL 0x1800
277 #define VDEC_E_OUT_CTRL1 0x1804
278 #define VDEC_E_OUT_CTRL_NS 0x1808
279 #define VDEC_E_GEN_STAT 0x180C
280 #define VDEC_E_INT_STAT_MASK 0x1810
281 #define VDEC_E_LUMA_CTRL 0x1814
282 #define VDEC_E_CHROMA_CTRL 0x1818
283 #define VDEC_E_CRUSH_CTRL 0x181C
284 #define VDEC_E_HORIZ_TIM_CTRL 0x1820
285 #define VDEC_E_VERT_TIM_CTRL 0x1824
286 #define VDEC_E_MISC_TIM_CTRL 0x1828
287 #define VDEC_E_FIELD_COUNT 0x182C
288 #define VDEC_E_HSCALE_CTRL 0x1830
289 #define VDEC_E_VSCALE_CTRL 0x1834
290 #define VDEC_E_MAN_VGA_CTRL 0x1838
291 #define VDEC_E_MAN_AGC_CTRL 0x183C
292 #define VDEC_E_DFE_CTRL1 0x1840
293 #define VDEC_E_DFE_CTRL2 0x1844
294 #define VDEC_E_DFE_CTRL3 0x1848
295 #define VDEC_E_PLL_CTRL 0x184C
296 #define VDEC_E_PLL_CTRL_FAST 0x1850
297 #define VDEC_E_HTL_CTRL 0x1854
298 #define VDEC_E_SRC_CFG 0x1858
299 #define VDEC_E_SC_STEP_SIZE 0x185C
300 #define VDEC_E_SC_CONVERGE_CTRL 0x1860
301 #define VDEC_E_SC_LOOP_CTRL 0x1864
302 #define VDEC_E_COMB_2D_HFS_CFG 0x1868
303 #define VDEC_E_COMB_2D_HFD_CFG 0x186C
304 #define VDEC_E_COMB_2D_LF_CFG 0x1870
305 #define VDEC_E_COMB_2D_BLEND 0x1874
306 #define VDEC_E_COMB_MISC_CTRL 0x1878
307 #define VDEC_E_COMB_FLAT_THRESH_CTRL 0x187C
308 #define VDEC_E_COMB_TEST 0x1880
309 #define VDEC_E_BP_MISC_CTRL 0x1884
310 #define VDEC_E_VCR_DET_CTRL 0x1888
311 #define VDEC_E_NOISE_DET_CTRL 0x188C
312 #define VDEC_E_COMB_FLAT_NOISE_CTRL 0x1890
313 #define VDEC_E_VERSION 0x19F8
314 #define VDEC_E_SOFT_RST_CTRL 0x19FC
316 /* Video Decoder F Registers */
317 #define VDEC_F_MODE_CTRL 0x1A00
318 #define VDEC_F_OUT_CTRL1 0x1A04
319 #define VDEC_F_OUT_CTRL_NS 0x1A08
320 #define VDEC_F_GEN_STAT 0x1A0C
321 #define VDEC_F_INT_STAT_MASK 0x1A10
322 #define VDEC_F_LUMA_CTRL 0x1A14
323 #define VDEC_F_CHROMA_CTRL 0x1A18
324 #define VDEC_F_CRUSH_CTRL 0x1A1C
325 #define VDEC_F_HORIZ_TIM_CTRL 0x1A20
326 #define VDEC_F_VERT_TIM_CTRL 0x1A24
327 #define VDEC_F_MISC_TIM_CTRL 0x1A28
328 #define VDEC_F_FIELD_COUNT 0x1A2C
329 #define VDEC_F_HSCALE_CTRL 0x1A30
330 #define VDEC_F_VSCALE_CTRL 0x1A34
331 #define VDEC_F_MAN_VGA_CTRL 0x1A38
332 #define VDEC_F_MAN_AGC_CTRL 0x1A3C
333 #define VDEC_F_DFE_CTRL1 0x1A40
334 #define VDEC_F_DFE_CTRL2 0x1A44
335 #define VDEC_F_DFE_CTRL3 0x1A48
336 #define VDEC_F_PLL_CTRL 0x1A4C
337 #define VDEC_F_PLL_CTRL_FAST 0x1A50
338 #define VDEC_F_HTL_CTRL 0x1A54
339 #define VDEC_F_SRC_CFG 0x1A58
340 #define VDEC_F_SC_STEP_SIZE 0x1A5C
341 #define VDEC_F_SC_CONVERGE_CTRL 0x1A60
342 #define VDEC_F_SC_LOOP_CTRL 0x1A64
343 #define VDEC_F_COMB_2D_HFS_CFG 0x1A68
344 #define VDEC_F_COMB_2D_HFD_CFG 0x1A6C
345 #define VDEC_F_COMB_2D_LF_CFG 0x1A70
346 #define VDEC_F_COMB_2D_BLEND 0x1A74
347 #define VDEC_F_COMB_MISC_CTRL 0x1A78
348 #define VDEC_F_COMB_FLAT_THRESH_CTRL 0x1A7C
349 #define VDEC_F_COMB_TEST 0x1A80
350 #define VDEC_F_BP_MISC_CTRL 0x1A84
351 #define VDEC_F_VCR_DET_CTRL 0x1A88
352 #define VDEC_F_NOISE_DET_CTRL 0x1A8C
353 #define VDEC_F_COMB_FLAT_NOISE_CTRL 0x1A90
354 #define VDEC_F_VERSION 0x1BF8
355 #define VDEC_F_SOFT_RST_CTRL 0x1BFC
357 /* Video Decoder G Registers */
358 #define VDEC_G_MODE_CTRL 0x1C00
359 #define VDEC_G_OUT_CTRL1 0x1C04
360 #define VDEC_G_OUT_CTRL_NS 0x1C08
361 #define VDEC_G_GEN_STAT 0x1C0C
362 #define VDEC_G_INT_STAT_MASK 0x1C10
363 #define VDEC_G_LUMA_CTRL 0x1C14
364 #define VDEC_G_CHROMA_CTRL 0x1C18
365 #define VDEC_G_CRUSH_CTRL 0x1C1C
366 #define VDEC_G_HORIZ_TIM_CTRL 0x1C20
367 #define VDEC_G_VERT_TIM_CTRL 0x1C24
368 #define VDEC_G_MISC_TIM_CTRL 0x1C28
369 #define VDEC_G_FIELD_COUNT 0x1C2C
370 #define VDEC_G_HSCALE_CTRL 0x1C30
371 #define VDEC_G_VSCALE_CTRL 0x1C34
372 #define VDEC_G_MAN_VGA_CTRL 0x1C38
373 #define VDEC_G_MAN_AGC_CTRL 0x1C3C
374 #define VDEC_G_DFE_CTRL1 0x1C40
375 #define VDEC_G_DFE_CTRL2 0x1C44
376 #define VDEC_G_DFE_CTRL3 0x1C48
377 #define VDEC_G_PLL_CTRL 0x1C4C
378 #define VDEC_G_PLL_CTRL_FAST 0x1C50
379 #define VDEC_G_HTL_CTRL 0x1C54
380 #define VDEC_G_SRC_CFG 0x1C58
381 #define VDEC_G_SC_STEP_SIZE 0x1C5C
382 #define VDEC_G_SC_CONVERGE_CTRL 0x1C60
383 #define VDEC_G_SC_LOOP_CTRL 0x1C64
384 #define VDEC_G_COMB_2D_HFS_CFG 0x1C68
385 #define VDEC_G_COMB_2D_HFD_CFG 0x1C6C
386 #define VDEC_G_COMB_2D_LF_CFG 0x1C70
387 #define VDEC_G_COMB_2D_BLEND 0x1C74
388 #define VDEC_G_COMB_MISC_CTRL 0x1C78
389 #define VDEC_G_COMB_FLAT_THRESH_CTRL 0x1C7C
390 #define VDEC_G_COMB_TEST 0x1C80
391 #define VDEC_G_BP_MISC_CTRL 0x1C84
392 #define VDEC_G_VCR_DET_CTRL 0x1C88
393 #define VDEC_G_NOISE_DET_CTRL 0x1C8C
394 #define VDEC_G_COMB_FLAT_NOISE_CTRL 0x1C90
395 #define VDEC_G_VERSION 0x1DF8
396 #define VDEC_G_SOFT_RST_CTRL 0x1DFC
398 /* Video Decoder H Registers */
399 #define VDEC_H_MODE_CTRL 0x1E00
400 #define VDEC_H_OUT_CTRL1 0x1E04
401 #define VDEC_H_OUT_CTRL_NS 0x1E08
402 #define VDEC_H_GEN_STAT 0x1E0C
403 #define VDEC_H_INT_STAT_MASK 0x1E1E
404 #define VDEC_H_LUMA_CTRL 0x1E14
405 #define VDEC_H_CHROMA_CTRL 0x1E18
406 #define VDEC_H_CRUSH_CTRL 0x1E1C
407 #define VDEC_H_HORIZ_TIM_CTRL 0x1E20
408 #define VDEC_H_VERT_TIM_CTRL 0x1E24
409 #define VDEC_H_MISC_TIM_CTRL 0x1E28
410 #define VDEC_H_FIELD_COUNT 0x1E2C
411 #define VDEC_H_HSCALE_CTRL 0x1E30
412 #define VDEC_H_VSCALE_CTRL 0x1E34
413 #define VDEC_H_MAN_VGA_CTRL 0x1E38
414 #define VDEC_H_MAN_AGC_CTRL 0x1E3C
415 #define VDEC_H_DFE_CTRL1 0x1E40
416 #define VDEC_H_DFE_CTRL2 0x1E44
417 #define VDEC_H_DFE_CTRL3 0x1E48
418 #define VDEC_H_PLL_CTRL 0x1E4C
419 #define VDEC_H_PLL_CTRL_FAST 0x1E50
420 #define VDEC_H_HTL_CTRL 0x1E54
421 #define VDEC_H_SRC_CFG 0x1E58
422 #define VDEC_H_SC_STEP_SIZE 0x1E5C
423 #define VDEC_H_SC_CONVERGE_CTRL 0x1E60
424 #define VDEC_H_SC_LOOP_CTRL 0x1E64
425 #define VDEC_H_COMB_2D_HFS_CFG 0x1E68
426 #define VDEC_H_COMB_2D_HFD_CFG 0x1E6C
427 #define VDEC_H_COMB_2D_LF_CFG 0x1E70
428 #define VDEC_H_COMB_2D_BLEND 0x1E74
429 #define VDEC_H_COMB_MISC_CTRL 0x1E78
430 #define VDEC_H_COMB_FLAT_THRESH_CTRL 0x1E7C
431 #define VDEC_H_COMB_TEST 0x1E80
432 #define VDEC_H_BP_MISC_CTRL 0x1E84
433 #define VDEC_H_VCR_DET_CTRL 0x1E88
434 #define VDEC_H_NOISE_DET_CTRL 0x1E8C
435 #define VDEC_H_COMB_FLAT_NOISE_CTRL 0x1E90
436 #define VDEC_H_VERSION 0x1FF8
437 #define VDEC_H_SOFT_RST_CTRL 0x1FFC
439 /*****************************************************************************/
440 /* LUMA_CTRL register fields */
441 #define VDEC_A_BRITE_CTRL 0x1014
442 #define VDEC_A_CNTRST_CTRL 0x1015
443 #define VDEC_A_PEAK_SEL 0x1016
445 /*****************************************************************************/
446 /* CHROMA_CTRL register fields */
447 #define VDEC_A_USAT_CTRL 0x1018
448 #define VDEC_A_VSAT_CTRL 0x1019
449 #define VDEC_A_HUE_CTRL 0x101A
451 #endif