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Linux 4.19.133
[linux/fpc-iii.git] / drivers / media / pci / ddbridge / ddbridge-core.c
blobc1b982e8e6c9b8f811decaba0e2c276908adbe75
1 /*
2 * ddbridge-core.c: Digital Devices bridge core functions
3 *
4 * Copyright (C) 2010-2017 Digital Devices GmbH
5 * Marcus Metzler <mocm@metzlerbros.de>
6 * Ralph Metzler <rjkm@metzlerbros.de>
7 *
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 only, as published by the Free Software Foundation.
12 *
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * To obtain the license, point your browser to
20 * http://www.gnu.org/copyleft/gpl.html
21 */
22
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/interrupt.h>
26 #include <linux/delay.h>
27 #include <linux/slab.h>
28 #include <linux/poll.h>
29 #include <linux/io.h>
30 #include <linux/pci.h>
31 #include <linux/pci_ids.h>
32 #include <linux/timer.h>
33 #include <linux/i2c.h>
34 #include <linux/swab.h>
35 #include <linux/vmalloc.h>
36
37 #include "ddbridge.h"
38 #include "ddbridge-i2c.h"
39 #include "ddbridge-regs.h"
40 #include "ddbridge-max.h"
41 #include "ddbridge-ci.h"
42 #include "ddbridge-io.h"
43
44 #include "tda18271c2dd.h"
45 #include "stv6110x.h"
46 #include "stv090x.h"
47 #include "lnbh24.h"
48 #include "drxk.h"
49 #include "stv0367.h"
50 #include "stv0367_priv.h"
51 #include "cxd2841er.h"
52 #include "tda18212.h"
53 #include "stv0910.h"
54 #include "stv6111.h"
55 #include "lnbh25.h"
56 #include "cxd2099.h"
57 #include "dvb_dummy_fe.h"
58
59 /****************************************************************************/
60
61 #define DDB_MAX_ADAPTER 64
62
63 /****************************************************************************/
64
65 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
66
67 static int adapter_alloc;
68 module_param(adapter_alloc, int, 0444);
69 MODULE_PARM_DESC(adapter_alloc,
70 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
71
72 static int ci_bitrate = 70000;
73 module_param(ci_bitrate, int, 0444);
74 MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI.");
75
76 static int ts_loop = -1;
77 module_param(ts_loop, int, 0444);
78 MODULE_PARM_DESC(ts_loop, "TS in/out test loop on port ts_loop");
79
80 static int xo2_speed = 2;
81 module_param(xo2_speed, int, 0444);
82 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards");
83
84 #ifdef __arm__
85 static int alt_dma = 1;
86 #else
87 static int alt_dma;
88 #endif
89 module_param(alt_dma, int, 0444);
90 MODULE_PARM_DESC(alt_dma, "use alternative DMA buffer handling");
91
92 static int no_init;
93 module_param(no_init, int, 0444);
94 MODULE_PARM_DESC(no_init, "do not initialize most devices");
95
96 static int stv0910_single;
97 module_param(stv0910_single, int, 0444);
98 MODULE_PARM_DESC(stv0910_single, "use stv0910 cards as single demods");
99
100 static int dma_buf_num = 8;
101 module_param(dma_buf_num, int, 0444);
102 MODULE_PARM_DESC(dma_buf_num, "Number of DMA buffers, possible values: 8-32");
103
104 static int dma_buf_size = 21;
105 module_param(dma_buf_size, int, 0444);
106 MODULE_PARM_DESC(dma_buf_size,
107 "DMA buffer size as multiple of 128*47, possible values: 1-43");
108
109 static int dummy_tuner;
110 module_param(dummy_tuner, int, 0444);
111 MODULE_PARM_DESC(dummy_tuner,
112 "attach dummy tuner to port 0 on Octopus V3 or Octopus Mini cards");
113
114 /****************************************************************************/
115
116 static DEFINE_MUTEX(redirect_lock);
117
118 static struct workqueue_struct *ddb_wq;
119
120 static struct ddb *ddbs[DDB_MAX_ADAPTER];
121
122 /****************************************************************************/
123 /****************************************************************************/
124 /****************************************************************************/
125
126 struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr,
127 void (*handler)(void *), void *data)
128 {
129 struct ddb_irq *irq = &dev->link[link].irq[nr];
130
131 irq->handler = handler;
132 irq->data = data;
133 return irq;
134 }
135
136 static void ddb_set_dma_table(struct ddb_io *io)
137 {
138 struct ddb *dev = io->port->dev;
139 struct ddb_dma *dma = io->dma;
140 u32 i;
141 u64 mem;
142
143 if (!dma)
144 return;
145 for (i = 0; i < dma->num; i++) {
146 mem = dma->pbuf[i];
147 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8);
148 ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4);
149 }
150 dma->bufval = ((dma->div & 0x0f) << 16) |
151 ((dma->num & 0x1f) << 11) |
152 ((dma->size >> 7) & 0x7ff);
153 }
154
155 static void ddb_set_dma_tables(struct ddb *dev)
156 {
157 u32 i;
158
159 for (i = 0; i < DDB_MAX_PORT; i++) {
160 if (dev->port[i].input[0])
161 ddb_set_dma_table(dev->port[i].input[0]);
162 if (dev->port[i].input[1])
163 ddb_set_dma_table(dev->port[i].input[1]);
164 if (dev->port[i].output)
165 ddb_set_dma_table(dev->port[i].output);
166 }
167 }
168
169 /****************************************************************************/
170 /****************************************************************************/
171 /****************************************************************************/
172
173 static void ddb_redirect_dma(struct ddb *dev,
174 struct ddb_dma *sdma,
175 struct ddb_dma *ddma)
176 {
177 u32 i, base;
178 u64 mem;
179
180 sdma->bufval = ddma->bufval;
181 base = sdma->bufregs;
182 for (i = 0; i < ddma->num; i++) {
183 mem = ddma->pbuf[i];
184 ddbwritel(dev, mem & 0xffffffff, base + i * 8);
185 ddbwritel(dev, mem >> 32, base + i * 8 + 4);
186 }
187 }
188
189 static int ddb_unredirect(struct ddb_port *port)
190 {
191 struct ddb_input *oredi, *iredi = NULL;
192 struct ddb_output *iredo = NULL;
193
194 /* dev_info(port->dev->dev,
195 * "unredirect %d.%d\n", port->dev->nr, port->nr);
196 */
197 mutex_lock(&redirect_lock);
198 if (port->output->dma->running) {
199 mutex_unlock(&redirect_lock);
200 return -EBUSY;
201 }
202 oredi = port->output->redi;
203 if (!oredi)
204 goto done;
205 if (port->input[0]) {
206 iredi = port->input[0]->redi;
207 iredo = port->input[0]->redo;
208
209 if (iredo) {
210 iredo->port->output->redi = oredi;
211 if (iredo->port->input[0]) {
212 iredo->port->input[0]->redi = iredi;
213 ddb_redirect_dma(oredi->port->dev,
214 oredi->dma, iredo->dma);
215 }
216 port->input[0]->redo = NULL;
217 ddb_set_dma_table(port->input[0]);
218 }
219 oredi->redi = iredi;
220 port->input[0]->redi = NULL;
221 }
222 oredi->redo = NULL;
223 port->output->redi = NULL;
224
225 ddb_set_dma_table(oredi);
226 done:
227 mutex_unlock(&redirect_lock);
228 return 0;
229 }
230
231 static int ddb_redirect(u32 i, u32 p)
232 {
233 struct ddb *idev = ddbs[(i >> 4) & 0x3f];
234 struct ddb_input *input, *input2;
235 struct ddb *pdev = ddbs[(p >> 4) & 0x3f];
236 struct ddb_port *port;
237
238 if (!idev || !pdev)
239 return -EINVAL;
240 if (!idev->has_dma || !pdev->has_dma)
241 return -EINVAL;
242
243 port = &pdev->port[p & 0x0f];
244 if (!port->output)
245 return -EINVAL;
246 if (ddb_unredirect(port))
247 return -EBUSY;
248
249 if (i == 8)
250 return 0;
251
252 input = &idev->input[i & 7];
253 if (!input)
254 return -EINVAL;
255
256 mutex_lock(&redirect_lock);
257 if (port->output->dma->running || input->dma->running) {
258 mutex_unlock(&redirect_lock);
259 return -EBUSY;
260 }
261 input2 = port->input[0];
262 if (input2) {
263 if (input->redi) {
264 input2->redi = input->redi;
265 input->redi = NULL;
266 } else {
267 input2->redi = input;
268 }
269 }
270 input->redo = port->output;
271 port->output->redi = input;
272
273 ddb_redirect_dma(input->port->dev, input->dma, port->output->dma);
274 mutex_unlock(&redirect_lock);
275 return 0;
276 }
277
278 /****************************************************************************/
279 /****************************************************************************/
280 /****************************************************************************/
281
282 static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
283 {
284 int i;
285
286 if (!dma)
287 return;
288 for (i = 0; i < dma->num; i++) {
289 if (dma->vbuf[i]) {
290 if (alt_dma) {
291 dma_unmap_single(&pdev->dev, dma->pbuf[i],
292 dma->size,
293 dir ? DMA_TO_DEVICE :
294 DMA_FROM_DEVICE);
295 kfree(dma->vbuf[i]);
296 dma->vbuf[i] = NULL;
297 } else {
298 dma_free_coherent(&pdev->dev, dma->size,
299 dma->vbuf[i], dma->pbuf[i]);
300 }
301
302 dma->vbuf[i] = NULL;
303 }
304 }
305 }
306
307 static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
308 {
309 int i;
310
311 if (!dma)
312 return 0;
313 for (i = 0; i < dma->num; i++) {
314 if (alt_dma) {
315 dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL);
316 if (!dma->vbuf[i])
317 return -ENOMEM;
318 dma->pbuf[i] = dma_map_single(&pdev->dev,
319 dma->vbuf[i],
320 dma->size,
321 dir ? DMA_TO_DEVICE :
322 DMA_FROM_DEVICE);
323 if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) {
324 kfree(dma->vbuf[i]);
325 dma->vbuf[i] = NULL;
326 return -ENOMEM;
327 }
328 } else {
329 dma->vbuf[i] = dma_alloc_coherent(&pdev->dev,
330 dma->size,
331 &dma->pbuf[i],
332 GFP_KERNEL);
333 if (!dma->vbuf[i])
334 return -ENOMEM;
335 }
336 }
337 return 0;
338 }
339
340 int ddb_buffers_alloc(struct ddb *dev)
341 {
342 int i;
343 struct ddb_port *port;
344
345 for (i = 0; i < dev->port_num; i++) {
346 port = &dev->port[i];
347 switch (port->class) {
348 case DDB_PORT_TUNER:
349 if (port->input[0]->dma)
350 if (dma_alloc(dev->pdev, port->input[0]->dma, 0)
351 < 0)
352 return -1;
353 if (port->input[1]->dma)
354 if (dma_alloc(dev->pdev, port->input[1]->dma, 0)
355 < 0)
356 return -1;
357 break;
358 case DDB_PORT_CI:
359 case DDB_PORT_LOOP:
360 if (port->input[0]->dma)
361 if (dma_alloc(dev->pdev, port->input[0]->dma, 0)
362 < 0)
363 return -1;
364 if (port->output->dma)
365 if (dma_alloc(dev->pdev, port->output->dma, 1)
366 < 0)
367 return -1;
368 break;
369 default:
370 break;
371 }
372 }
373 ddb_set_dma_tables(dev);
374 return 0;
375 }
376
377 void ddb_buffers_free(struct ddb *dev)
378 {
379 int i;
380 struct ddb_port *port;
381
382 for (i = 0; i < dev->port_num; i++) {
383 port = &dev->port[i];
384
385 if (port->input[0] && port->input[0]->dma)
386 dma_free(dev->pdev, port->input[0]->dma, 0);
387 if (port->input[1] && port->input[1]->dma)
388 dma_free(dev->pdev, port->input[1]->dma, 0);
389 if (port->output && port->output->dma)
390 dma_free(dev->pdev, port->output->dma, 1);
391 }
392 }
393
394 static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
395 {
396 struct ddb *dev = output->port->dev;
397 u32 bitrate = output->port->obr, max_bitrate = 72000;
398 u32 gap = 4, nco = 0;
399
400 *con = 0x1c;
401 if (output->port->gap != 0xffffffff) {
402 flags |= 1;
403 gap = output->port->gap;
404 max_bitrate = 0;
405 }
406 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) {
407 *con = 0x10c;
408 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) {
409 if (!(flags & 2)) {
410 /* NCO */
411 max_bitrate = 0;
412 gap = 0;
413 if (bitrate != 72000) {
414 if (bitrate >= 96000) {
415 *con |= 0x800;
416 } else {
417 *con |= 0x1000;
418 nco = (bitrate * 8192 + 71999)
419 / 72000;
420 }
421 }
422 } else {
423 /* Divider and gap */
424 *con |= 0x1810;
425 if (bitrate <= 64000) {
426 max_bitrate = 64000;
427 nco = 8;
428 } else if (bitrate <= 72000) {
429 max_bitrate = 72000;
430 nco = 7;
431 } else {
432 max_bitrate = 96000;
433 nco = 5;
434 }
435 }
436 } else {
437 if (bitrate > 72000) {
438 *con |= 0x810; /* 96 MBit/s and gap */
439 max_bitrate = 96000;
440 }
441 *con |= 0x10; /* enable gap */
442 }
443 }
444 if (max_bitrate > 0) {
445 if (bitrate > max_bitrate)
446 bitrate = max_bitrate;
447 if (bitrate < 31000)
448 bitrate = 31000;
449 gap = ((max_bitrate - bitrate) * 94) / bitrate;
450 if (gap < 2)
451 *con &= ~0x10; /* Disable gap */
452 else
453 gap -= 2;
454 if (gap > 127)
455 gap = 127;
456 }
457
458 *con2 = (nco << 16) | gap;
459 }
460
461 static void ddb_output_start(struct ddb_output *output)
462 {
463 struct ddb *dev = output->port->dev;
464 u32 con = 0x11c, con2 = 0;
465
466 spin_lock_irq(&output->dma->lock);
467 output->dma->cbuf = 0;
468 output->dma->coff = 0;
469 output->dma->stat = 0;
470 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
471
472 if (output->port->input[0]->port->class == DDB_PORT_LOOP)
473 con = (1UL << 13) | 0x14;
474 else
475 calc_con(output, &con, &con2, 0);
476
477 ddbwritel(dev, 0, TS_CONTROL(output));
478 ddbwritel(dev, 2, TS_CONTROL(output));
479 ddbwritel(dev, 0, TS_CONTROL(output));
480 ddbwritel(dev, con, TS_CONTROL(output));
481 ddbwritel(dev, con2, TS_CONTROL2(output));
482
483 ddbwritel(dev, output->dma->bufval,
484 DMA_BUFFER_SIZE(output->dma));
485 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma));
486 ddbwritel(dev, 1, DMA_BASE_READ);
487 ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma));
488
489 ddbwritel(dev, con | 1, TS_CONTROL(output));
490
491 output->dma->running = 1;
492 spin_unlock_irq(&output->dma->lock);
493 }
494
495 static void ddb_output_stop(struct ddb_output *output)
496 {
497 struct ddb *dev = output->port->dev;
498
499 spin_lock_irq(&output->dma->lock);
500
501 ddbwritel(dev, 0, TS_CONTROL(output));
502
503 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
504 output->dma->running = 0;
505 spin_unlock_irq(&output->dma->lock);
506 }
507
508 static void ddb_input_stop(struct ddb_input *input)
509 {
510 struct ddb *dev = input->port->dev;
511 u32 tag = DDB_LINK_TAG(input->port->lnr);
512
513 spin_lock_irq(&input->dma->lock);
514
515 ddbwritel(dev, 0, tag | TS_CONTROL(input));
516
517 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma));
518 input->dma->running = 0;
519 spin_unlock_irq(&input->dma->lock);
520 }
521
522 static void ddb_input_start(struct ddb_input *input)
523 {
524 struct ddb *dev = input->port->dev;
525
526 spin_lock_irq(&input->dma->lock);
527 input->dma->cbuf = 0;
528 input->dma->coff = 0;
529 input->dma->stat = 0;
530 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma));
531
532 ddbwritel(dev, 0, TS_CONTROL(input));
533 ddbwritel(dev, 2, TS_CONTROL(input));
534 ddbwritel(dev, 0, TS_CONTROL(input));
535
536 ddbwritel(dev, input->dma->bufval,
537 DMA_BUFFER_SIZE(input->dma));
538 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma));
539 ddbwritel(dev, 1, DMA_BASE_WRITE);
540 ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma));
541
542 ddbwritel(dev, 0x09, TS_CONTROL(input));
543
544 if (input->port->type == DDB_TUNER_DUMMY)
545 ddbwritel(dev, 0x000fff01, TS_CONTROL2(input));
546
547 input->dma->running = 1;
548 spin_unlock_irq(&input->dma->lock);
549 }
550
551 static void ddb_input_start_all(struct ddb_input *input)
552 {
553 struct ddb_input *i = input;
554 struct ddb_output *o;
555
556 mutex_lock(&redirect_lock);
557 while (i && (o = i->redo)) {
558 ddb_output_start(o);
559 i = o->port->input[0];
560 if (i)
561 ddb_input_start(i);
562 }
563 ddb_input_start(input);
564 mutex_unlock(&redirect_lock);
565 }
566
567 static void ddb_input_stop_all(struct ddb_input *input)
568 {
569 struct ddb_input *i = input;
570 struct ddb_output *o;
571
572 mutex_lock(&redirect_lock);
573 ddb_input_stop(input);
574 while (i && (o = i->redo)) {
575 ddb_output_stop(o);
576 i = o->port->input[0];
577 if (i)
578 ddb_input_stop(i);
579 }
580 mutex_unlock(&redirect_lock);
581 }
582
583 static u32 ddb_output_free(struct ddb_output *output)
584 {
585 u32 idx, off, stat = output->dma->stat;
586 s32 diff;
587
588 idx = (stat >> 11) & 0x1f;
589 off = (stat & 0x7ff) << 7;
590
591 if (output->dma->cbuf != idx) {
592 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) &&
593 (output->dma->size - output->dma->coff <= (2 * 188)))
594 return 0;
595 return 188;
596 }
597 diff = off - output->dma->coff;
598 if (diff <= 0 || diff > (2 * 188))
599 return 188;
600 return 0;
601 }
602
603 static ssize_t ddb_output_write(struct ddb_output *output,
604 const __user u8 *buf, size_t count)
605 {
606 struct ddb *dev = output->port->dev;
607 u32 idx, off, stat = output->dma->stat;
608 u32 left = count, len;
609
610 idx = (stat >> 11) & 0x1f;
611 off = (stat & 0x7ff) << 7;
612
613 while (left) {
614 len = output->dma->size - output->dma->coff;
615 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) &&
616 off == 0) {
617 if (len <= 188)
618 break;
619 len -= 188;
620 }
621 if (output->dma->cbuf == idx) {
622 if (off > output->dma->coff) {
623 len = off - output->dma->coff;
624 len -= (len % 188);
625 if (len <= 188)
626 break;
627 len -= 188;
628 }
629 }
630 if (len > left)
631 len = left;
632 if (copy_from_user(output->dma->vbuf[output->dma->cbuf] +
633 output->dma->coff,
634 buf, len))
635 return -EIO;
636 if (alt_dma)
637 dma_sync_single_for_device(
638 dev->dev,
639 output->dma->pbuf[output->dma->cbuf],
640 output->dma->size, DMA_TO_DEVICE);
641 left -= len;
642 buf += len;
643 output->dma->coff += len;
644 if (output->dma->coff == output->dma->size) {
645 output->dma->coff = 0;
646 output->dma->cbuf = ((output->dma->cbuf + 1) %
647 output->dma->num);
648 }
649 ddbwritel(dev,
650 (output->dma->cbuf << 11) |
651 (output->dma->coff >> 7),
652 DMA_BUFFER_ACK(output->dma));
653 }
654 return count - left;
655 }
656
657 static u32 ddb_input_avail(struct ddb_input *input)
658 {
659 struct ddb *dev = input->port->dev;
660 u32 idx, off, stat = input->dma->stat;
661 u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma));
662
663 idx = (stat >> 11) & 0x1f;
664 off = (stat & 0x7ff) << 7;
665
666 if (ctrl & 4) {
667 dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl);
668 ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma));
669 return 0;
670 }
671 if (input->dma->cbuf != idx)
672 return 188;
673 return 0;
674 }
675
676 static ssize_t ddb_input_read(struct ddb_input *input,
677 __user u8 *buf, size_t count)
678 {
679 struct ddb *dev = input->port->dev;
680 u32 left = count;
681 u32 idx, free, stat = input->dma->stat;
682 int ret;
683
684 idx = (stat >> 11) & 0x1f;
685
686 while (left) {
687 if (input->dma->cbuf == idx)
688 return count - left;
689 free = input->dma->size - input->dma->coff;
690 if (free > left)
691 free = left;
692 if (alt_dma)
693 dma_sync_single_for_cpu(
694 dev->dev,
695 input->dma->pbuf[input->dma->cbuf],
696 input->dma->size, DMA_FROM_DEVICE);
697 ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] +
698 input->dma->coff, free);
699 if (ret)
700 return -EFAULT;
701 input->dma->coff += free;
702 if (input->dma->coff == input->dma->size) {
703 input->dma->coff = 0;
704 input->dma->cbuf = (input->dma->cbuf + 1) %
705 input->dma->num;
706 }
707 left -= free;
708 buf += free;
709 ddbwritel(dev,
710 (input->dma->cbuf << 11) | (input->dma->coff >> 7),
711 DMA_BUFFER_ACK(input->dma));
712 }
713 return count;
714 }
715
716 /****************************************************************************/
717 /****************************************************************************/
718
719 static ssize_t ts_write(struct file *file, const __user char *buf,
720 size_t count, loff_t *ppos)
721 {
722 struct dvb_device *dvbdev = file->private_data;
723 struct ddb_output *output = dvbdev->priv;
724 struct ddb *dev = output->port->dev;
725 size_t left = count;
726 int stat;
727
728 if (!dev->has_dma)
729 return -EINVAL;
730 while (left) {
731 if (ddb_output_free(output) < 188) {
732 if (file->f_flags & O_NONBLOCK)
733 break;
734 if (wait_event_interruptible(
735 output->dma->wq,
736 ddb_output_free(output) >= 188) < 0)
737 break;
738 }
739 stat = ddb_output_write(output, buf, left);
740 if (stat < 0)
741 return stat;
742 buf += stat;
743 left -= stat;
744 }
745 return (left == count) ? -EAGAIN : (count - left);
746 }
747
748 static ssize_t ts_read(struct file *file, __user char *buf,
749 size_t count, loff_t *ppos)
750 {
751 struct dvb_device *dvbdev = file->private_data;
752 struct ddb_output *output = dvbdev->priv;
753 struct ddb_input *input = output->port->input[0];
754 struct ddb *dev = output->port->dev;
755 size_t left = count;
756 int stat;
757
758 if (!dev->has_dma)
759 return -EINVAL;
760 while (left) {
761 if (ddb_input_avail(input) < 188) {
762 if (file->f_flags & O_NONBLOCK)
763 break;
764 if (wait_event_interruptible(
765 input->dma->wq,
766 ddb_input_avail(input) >= 188) < 0)
767 break;
768 }
769 stat = ddb_input_read(input, buf, left);
770 if (stat < 0)
771 return stat;
772 left -= stat;
773 buf += stat;
774 }
775 return (count && (left == count)) ? -EAGAIN : (count - left);
776 }
777
778 static __poll_t ts_poll(struct file *file, poll_table *wait)
779 {
780 struct dvb_device *dvbdev = file->private_data;
781 struct ddb_output *output = dvbdev->priv;
782 struct ddb_input *input = output->port->input[0];
783
784 __poll_t mask = 0;
785
786 poll_wait(file, &input->dma->wq, wait);
787 poll_wait(file, &output->dma->wq, wait);
788 if (ddb_input_avail(input) >= 188)
789 mask |= EPOLLIN | EPOLLRDNORM;
790 if (ddb_output_free(output) >= 188)
791 mask |= EPOLLOUT | EPOLLWRNORM;
792 return mask;
793 }
794
795 static int ts_release(struct inode *inode, struct file *file)
796 {
797 struct dvb_device *dvbdev = file->private_data;
798 struct ddb_output *output = NULL;
799 struct ddb_input *input = NULL;
800
801 if (dvbdev) {
802 output = dvbdev->priv;
803 input = output->port->input[0];
804 }
805
806 if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
807 if (!input)
808 return -EINVAL;
809 ddb_input_stop(input);
810 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
811 if (!output)
812 return -EINVAL;
813 ddb_output_stop(output);
814 }
815 return dvb_generic_release(inode, file);
816 }
817
818 static int ts_open(struct inode *inode, struct file *file)
819 {
820 int err;
821 struct dvb_device *dvbdev = file->private_data;
822 struct ddb_output *output = NULL;
823 struct ddb_input *input = NULL;
824
825 if (dvbdev) {
826 output = dvbdev->priv;
827 input = output->port->input[0];
828 }
829
830 if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
831 if (!input)
832 return -EINVAL;
833 if (input->redo || input->redi)
834 return -EBUSY;
835 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
836 if (!output)
837 return -EINVAL;
838 } else {
839 return -EINVAL;
840 }
841
842 err = dvb_generic_open(inode, file);
843 if (err < 0)
844 return err;
845 if ((file->f_flags & O_ACCMODE) == O_RDONLY)
846 ddb_input_start(input);
847 else if ((file->f_flags & O_ACCMODE) == O_WRONLY)
848 ddb_output_start(output);
849 return err;
850 }
851
852 static const struct file_operations ci_fops = {
853 .owner = THIS_MODULE,
854 .read = ts_read,
855 .write = ts_write,
856 .open = ts_open,
857 .release = ts_release,
858 .poll = ts_poll,
859 .mmap = NULL,
860 };
861
862 static struct dvb_device dvbdev_ci = {
863 .priv = NULL,
864 .readers = 1,
865 .writers = 1,
866 .users = 2,
867 .fops = &ci_fops,
868 };
869
870 /****************************************************************************/
871 /****************************************************************************/
872
873 static int locked_gate_ctrl(struct dvb_frontend *fe, int enable)
874 {
875 struct ddb_input *input = fe->sec_priv;
876 struct ddb_port *port = input->port;
877 struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
878 int status;
879
880 if (enable) {
881 mutex_lock(&port->i2c_gate_lock);
882 status = dvb->i2c_gate_ctrl(fe, 1);
883 } else {
884 status = dvb->i2c_gate_ctrl(fe, 0);
885 mutex_unlock(&port->i2c_gate_lock);
886 }
887 return status;
888 }
889
890 static int demod_attach_drxk(struct ddb_input *input)
891 {
892 struct i2c_adapter *i2c = &input->port->i2c->adap;
893 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
894 struct device *dev = input->port->dev->dev;
895 struct drxk_config config;
896
897 memset(&config, 0, sizeof(config));
898 config.adr = 0x29 + (input->nr & 1);
899 config.microcode_name = "drxk_a3.mc";
900
901 dvb->fe = dvb_attach(drxk_attach, &config, i2c);
902 if (!dvb->fe) {
903 dev_err(dev, "No DRXK found!\n");
904 return -ENODEV;
905 }
906 dvb->fe->sec_priv = input;
907 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
908 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
909 return 0;
910 }
911
912 static int tuner_attach_tda18271(struct ddb_input *input)
913 {
914 struct i2c_adapter *i2c = &input->port->i2c->adap;
915 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
916 struct device *dev = input->port->dev->dev;
917 struct dvb_frontend *fe;
918
919 if (dvb->fe->ops.i2c_gate_ctrl)
920 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1);
921 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60);
922 if (dvb->fe->ops.i2c_gate_ctrl)
923 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0);
924 if (!fe) {
925 dev_err(dev, "No TDA18271 found!\n");
926 return -ENODEV;
927 }
928 return 0;
929 }
930
931 /******************************************************************************/
932 /******************************************************************************/
933 /******************************************************************************/
934
935 static struct stv0367_config ddb_stv0367_config[] = {
936 {
937 .demod_address = 0x1f,
938 .xtal = 27000000,
939 .if_khz = 0,
940 .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
941 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
942 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
943 }, {
944 .demod_address = 0x1e,
945 .xtal = 27000000,
946 .if_khz = 0,
947 .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
948 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
949 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
950 },
951 };
952
953 static int demod_attach_stv0367(struct ddb_input *input)
954 {
955 struct i2c_adapter *i2c = &input->port->i2c->adap;
956 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
957 struct device *dev = input->port->dev->dev;
958
959 /* attach frontend */
960 dvb->fe = dvb_attach(stv0367ddb_attach,
961 &ddb_stv0367_config[(input->nr & 1)], i2c);
962
963 if (!dvb->fe) {
964 dev_err(dev, "No stv0367 found!\n");
965 return -ENODEV;
966 }
967 dvb->fe->sec_priv = input;
968 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
969 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
970 return 0;
971 }
972
973 static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr)
974 {
975 struct i2c_adapter *adapter = &input->port->i2c->adap;
976 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
977 struct device *dev = input->port->dev->dev;
978 u8 tda_id[2];
979 u8 subaddr = 0x00;
980
981 dev_dbg(dev, "stv0367-tda18212 tuner ping\n");
982 if (dvb->fe->ops.i2c_gate_ctrl)
983 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1);
984
985 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
986 dev_dbg(dev, "tda18212 ping 1 fail\n");
987 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
988 dev_warn(dev, "tda18212 ping failed, expect problems\n");
989
990 if (dvb->fe->ops.i2c_gate_ctrl)
991 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0);
992
993 return 0;
994 }
995
996 static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24)
997 {
998 struct i2c_adapter *i2c = &input->port->i2c->adap;
999 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1000 struct device *dev = input->port->dev->dev;
1001 struct cxd2841er_config cfg;
1002
1003 /* the cxd2841er driver expects 8bit/shifted I2C addresses */
1004 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1;
1005
1006 cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500;
1007 cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE |
1008 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG |
1009 CXD2841ER_TSBITS;
1010
1011 if (!par)
1012 cfg.flags |= CXD2841ER_TS_SERIAL;
1013
1014 /* attach frontend */
1015 dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c);
1016
1017 if (!dvb->fe) {
1018 dev_err(dev, "No cxd2837/38/43/54 found!\n");
1019 return -ENODEV;
1020 }
1021 dvb->fe->sec_priv = input;
1022 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
1023 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
1024 return 0;
1025 }
1026
1027 static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype)
1028 {
1029 struct i2c_adapter *adapter = &input->port->i2c->adap;
1030 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1031 struct device *dev = input->port->dev->dev;
1032 struct i2c_client *client;
1033 struct tda18212_config config = {
1034 .fe = dvb->fe,
1035 .if_dvbt_6 = 3550,
1036 .if_dvbt_7 = 3700,
1037 .if_dvbt_8 = 4150,
1038 .if_dvbt2_6 = 3250,
1039 .if_dvbt2_7 = 4000,
1040 .if_dvbt2_8 = 4000,
1041 .if_dvbc = 5000,
1042 };
1043 u8 addr = (input->nr & 1) ? 0x63 : 0x60;
1044
1045 /* due to a hardware quirk with the I2C gate on the stv0367+tda18212
1046 * combo, the tda18212 must be probed by reading it's id _twice_ when
1047 * cold started, or it very likely will fail.
1048 */
1049 if (porttype == DDB_TUNER_DVBCT_ST)
1050 tuner_tda18212_ping(input, addr);
1051
1052 /* perform tuner probe/init/attach */
1053 client = dvb_module_probe("tda18212", NULL, adapter, addr, &config);
1054 if (!client)
1055 goto err;
1056
1057 dvb->i2c_client[0] = client;
1058 return 0;
1059 err:
1060 dev_err(dev, "TDA18212 tuner not found. Device is not fully operational.\n");
1061 return -ENODEV;
1062 }
1063
1064 /****************************************************************************/
1065 /****************************************************************************/
1066 /****************************************************************************/
1067
1068 static struct stv090x_config stv0900 = {
1069 .device = STV0900,
1070 .demod_mode = STV090x_DUAL,
1071 .clk_mode = STV090x_CLK_EXT,
1072
1073 .xtal = 27000000,
1074 .address = 0x69,
1075
1076 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1077 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1078
1079 .ts1_tei = 1,
1080 .ts2_tei = 1,
1081
1082 .repeater_level = STV090x_RPTLEVEL_16,
1083
1084 .adc1_range = STV090x_ADC_1Vpp,
1085 .adc2_range = STV090x_ADC_1Vpp,
1086
1087 .diseqc_envelope_mode = true,
1088 };
1089
1090 static struct stv090x_config stv0900_aa = {
1091 .device = STV0900,
1092 .demod_mode = STV090x_DUAL,
1093 .clk_mode = STV090x_CLK_EXT,
1094
1095 .xtal = 27000000,
1096 .address = 0x68,
1097
1098 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1099 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1100
1101 .ts1_tei = 1,
1102 .ts2_tei = 1,
1103
1104 .repeater_level = STV090x_RPTLEVEL_16,
1105
1106 .adc1_range = STV090x_ADC_1Vpp,
1107 .adc2_range = STV090x_ADC_1Vpp,
1108
1109 .diseqc_envelope_mode = true,
1110 };
1111
1112 static struct stv6110x_config stv6110a = {
1113 .addr = 0x60,
1114 .refclk = 27000000,
1115 .clk_div = 1,
1116 };
1117
1118 static struct stv6110x_config stv6110b = {
1119 .addr = 0x63,
1120 .refclk = 27000000,
1121 .clk_div = 1,
1122 };
1123
1124 static int demod_attach_stv0900(struct ddb_input *input, int type)
1125 {
1126 struct i2c_adapter *i2c = &input->port->i2c->adap;
1127 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
1128 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1129 struct device *dev = input->port->dev->dev;
1130
1131 dvb->fe = dvb_attach(stv090x_attach, feconf, i2c,
1132 (input->nr & 1) ? STV090x_DEMODULATOR_1
1133 : STV090x_DEMODULATOR_0);
1134 if (!dvb->fe) {
1135 dev_err(dev, "No STV0900 found!\n");
1136 return -ENODEV;
1137 }
1138 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0,
1139 0, (input->nr & 1) ?
1140 (0x09 - type) : (0x0b - type))) {
1141 dev_err(dev, "No LNBH24 found!\n");
1142 dvb_frontend_detach(dvb->fe);
1143 return -ENODEV;
1144 }
1145 return 0;
1146 }
1147
1148 static int tuner_attach_stv6110(struct ddb_input *input, int type)
1149 {
1150 struct i2c_adapter *i2c = &input->port->i2c->adap;
1151 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1152 struct device *dev = input->port->dev->dev;
1153 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
1154 struct stv6110x_config *tunerconf = (input->nr & 1) ?
1155 &stv6110b : &stv6110a;
1156 const struct stv6110x_devctl *ctl;
1157
1158 ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c);
1159 if (!ctl) {
1160 dev_err(dev, "No STV6110X found!\n");
1161 return -ENODEV;
1162 }
1163 dev_info(dev, "attach tuner input %d adr %02x\n",
1164 input->nr, tunerconf->addr);
1165
1166 feconf->tuner_init = ctl->tuner_init;
1167 feconf->tuner_sleep = ctl->tuner_sleep;
1168 feconf->tuner_set_mode = ctl->tuner_set_mode;
1169 feconf->tuner_set_frequency = ctl->tuner_set_frequency;
1170 feconf->tuner_get_frequency = ctl->tuner_get_frequency;
1171 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
1172 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
1173 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
1174 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
1175 feconf->tuner_set_refclk = ctl->tuner_set_refclk;
1176 feconf->tuner_get_status = ctl->tuner_get_status;
1177
1178 return 0;
1179 }
1180
1181 static const struct stv0910_cfg stv0910_p = {
1182 .adr = 0x68,
1183 .parallel = 1,
1184 .rptlvl = 4,
1185 .clk = 30000000,
1186 .tsspeed = 0x28,
1187 };
1188
1189 static const struct lnbh25_config lnbh25_cfg = {
1190 .i2c_address = 0x0c << 1,
1191 .data2_config = LNBH25_TEN
1192 };
1193
1194 static int has_lnbh25(struct i2c_adapter *i2c, u8 adr)
1195 {
1196 u8 val;
1197
1198 return i2c_read_reg(i2c, adr, 0, &val) ? 0 : 1;
1199 }
1200
1201 static int demod_attach_stv0910(struct ddb_input *input, int type, int tsfast)
1202 {
1203 struct i2c_adapter *i2c = &input->port->i2c->adap;
1204 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1205 struct device *dev = input->port->dev->dev;
1206 struct stv0910_cfg cfg = stv0910_p;
1207 struct lnbh25_config lnbcfg = lnbh25_cfg;
1208
1209 if (stv0910_single)
1210 cfg.single = 1;
1211
1212 if (type)
1213 cfg.parallel = 2;
1214
1215 if (tsfast) {
1216 dev_info(dev, "Enabling stv0910 higher speed TS\n");
1217 cfg.tsspeed = 0x10;
1218 }
1219
1220 dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1));
1221 if (!dvb->fe) {
1222 cfg.adr = 0x6c;
1223 dvb->fe = dvb_attach(stv0910_attach, i2c,
1224 &cfg, (input->nr & 1));
1225 }
1226 if (!dvb->fe) {
1227 dev_err(dev, "No STV0910 found!\n");
1228 return -ENODEV;
1229 }
1230
1231 /* attach lnbh25 - leftshift by one as the lnbh25 driver expects 8bit
1232 * i2c addresses
1233 */
1234 if (has_lnbh25(i2c, 0x0d))
1235 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1);
1236 else
1237 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1);
1238
1239 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) {
1240 dev_err(dev, "No LNBH25 found!\n");
1241 dvb_frontend_detach(dvb->fe);
1242 return -ENODEV;
1243 }
1244
1245 return 0;
1246 }
1247
1248 static int tuner_attach_stv6111(struct ddb_input *input, int type)
1249 {
1250 struct i2c_adapter *i2c = &input->port->i2c->adap;
1251 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1252 struct device *dev = input->port->dev->dev;
1253 struct dvb_frontend *fe;
1254 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60);
1255
1256 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr);
1257 if (!fe) {
1258 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4);
1259 if (!fe) {
1260 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr);
1261 return -ENODEV;
1262 }
1263 }
1264 return 0;
1265 }
1266
1267 static int demod_attach_dummy(struct ddb_input *input)
1268 {
1269 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1270 struct device *dev = input->port->dev->dev;
1271
1272 dvb->fe = dvb_attach(dvb_dummy_fe_qam_attach);
1273 if (!dvb->fe) {
1274 dev_err(dev, "QAM dummy attach failed!\n");
1275 return -ENODEV;
1276 }
1277
1278 return 0;
1279 }
1280
1281 static int start_feed(struct dvb_demux_feed *dvbdmxfeed)
1282 {
1283 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
1284 struct ddb_input *input = dvbdmx->priv;
1285 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1286
1287 if (!dvb->users)
1288 ddb_input_start_all(input);
1289
1290 return ++dvb->users;
1291 }
1292
1293 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed)
1294 {
1295 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
1296 struct ddb_input *input = dvbdmx->priv;
1297 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1298
1299 if (--dvb->users)
1300 return dvb->users;
1301
1302 ddb_input_stop_all(input);
1303 return 0;
1304 }
1305
1306 static void dvb_input_detach(struct ddb_input *input)
1307 {
1308 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1309 struct dvb_demux *dvbdemux = &dvb->demux;
1310
1311 switch (dvb->attached) {
1312 case 0x31:
1313 if (dvb->fe2)
1314 dvb_unregister_frontend(dvb->fe2);
1315 if (dvb->fe)
1316 dvb_unregister_frontend(dvb->fe);
1317 /* fallthrough */
1318 case 0x30:
1319 dvb_module_release(dvb->i2c_client[0]);
1320 dvb->i2c_client[0] = NULL;
1321
1322 if (dvb->fe2)
1323 dvb_frontend_detach(dvb->fe2);
1324 if (dvb->fe)
1325 dvb_frontend_detach(dvb->fe);
1326 dvb->fe = NULL;
1327 dvb->fe2 = NULL;
1328 /* fallthrough */
1329 case 0x20:
1330 dvb_net_release(&dvb->dvbnet);
1331 /* fallthrough */
1332 case 0x12:
1333 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1334 &dvb->hw_frontend);
1335 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1336 &dvb->mem_frontend);
1337 /* fallthrough */
1338 case 0x11:
1339 dvb_dmxdev_release(&dvb->dmxdev);
1340 /* fallthrough */
1341 case 0x10:
1342 dvb_dmx_release(&dvb->demux);
1343 /* fallthrough */
1344 case 0x01:
1345 break;
1346 }
1347 dvb->attached = 0x00;
1348 }
1349
1350 static int dvb_register_adapters(struct ddb *dev)
1351 {
1352 int i, ret = 0;
1353 struct ddb_port *port;
1354 struct dvb_adapter *adap;
1355
1356 if (adapter_alloc == 3) {
1357 port = &dev->port[0];
1358 adap = port->dvb[0].adap;
1359 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE,
1360 port->dev->dev,
1361 adapter_nr);
1362 if (ret < 0)
1363 return ret;
1364 port->dvb[0].adap_registered = 1;
1365 for (i = 0; i < dev->port_num; i++) {
1366 port = &dev->port[i];
1367 port->dvb[0].adap = adap;
1368 port->dvb[1].adap = adap;
1369 }
1370 return 0;
1371 }
1372
1373 for (i = 0; i < dev->port_num; i++) {
1374 port = &dev->port[i];
1375 switch (port->class) {
1376 case DDB_PORT_TUNER:
1377 adap = port->dvb[0].adap;
1378 ret = dvb_register_adapter(adap, "DDBridge",
1379 THIS_MODULE,
1380 port->dev->dev,
1381 adapter_nr);
1382 if (ret < 0)
1383 return ret;
1384 port->dvb[0].adap_registered = 1;
1385
1386 if (adapter_alloc > 0) {
1387 port->dvb[1].adap = port->dvb[0].adap;
1388 break;
1389 }
1390 adap = port->dvb[1].adap;
1391 ret = dvb_register_adapter(adap, "DDBridge",
1392 THIS_MODULE,
1393 port->dev->dev,
1394 adapter_nr);
1395 if (ret < 0)
1396 return ret;
1397 port->dvb[1].adap_registered = 1;
1398 break;
1399
1400 case DDB_PORT_CI:
1401 case DDB_PORT_LOOP:
1402 adap = port->dvb[0].adap;
1403 ret = dvb_register_adapter(adap, "DDBridge",
1404 THIS_MODULE,
1405 port->dev->dev,
1406 adapter_nr);
1407 if (ret < 0)
1408 return ret;
1409 port->dvb[0].adap_registered = 1;
1410 break;
1411 default:
1412 if (adapter_alloc < 2)
1413 break;
1414 adap = port->dvb[0].adap;
1415 ret = dvb_register_adapter(adap, "DDBridge",
1416 THIS_MODULE,
1417 port->dev->dev,
1418 adapter_nr);
1419 if (ret < 0)
1420 return ret;
1421 port->dvb[0].adap_registered = 1;
1422 break;
1423 }
1424 }
1425 return ret;
1426 }
1427
1428 static void dvb_unregister_adapters(struct ddb *dev)
1429 {
1430 int i;
1431 struct ddb_port *port;
1432 struct ddb_dvb *dvb;
1433
1434 for (i = 0; i < dev->link[0].info->port_num; i++) {
1435 port = &dev->port[i];
1436
1437 dvb = &port->dvb[0];
1438 if (dvb->adap_registered)
1439 dvb_unregister_adapter(dvb->adap);
1440 dvb->adap_registered = 0;
1441
1442 dvb = &port->dvb[1];
1443 if (dvb->adap_registered)
1444 dvb_unregister_adapter(dvb->adap);
1445 dvb->adap_registered = 0;
1446 }
1447 }
1448
1449 static int dvb_input_attach(struct ddb_input *input)
1450 {
1451 int ret = 0;
1452 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1453 struct ddb_port *port = input->port;
1454 struct dvb_adapter *adap = dvb->adap;
1455 struct dvb_demux *dvbdemux = &dvb->demux;
1456 struct ddb_ids *devids = &input->port->dev->link[input->port->lnr].ids;
1457 int par = 0, osc24 = 0, tsfast = 0;
1458
1459 /*
1460 * Determine if bridges with stv0910 demods can run with fast TS and
1461 * thus support high bandwidth transponders.
1462 * STV0910_PR and STV0910_P tuner types covers all relevant bridges,
1463 * namely the CineS2 V7(A) and the Octopus CI S2 Pro/Advanced. All
1464 * DuoFlex S2 V4(A) have type=DDB_TUNER_DVBS_STV0910 without any suffix
1465 * and are limited by the serial link to the bridge, thus won't work
1466 * in fast TS mode.
1467 */
1468 if (port->nr == 0 &&
1469 (port->type == DDB_TUNER_DVBS_STV0910_PR ||
1470 port->type == DDB_TUNER_DVBS_STV0910_P)) {
1471 /* fast TS on port 0 requires FPGA version >= 1.7 */
1472 if ((devids->hwid & 0x00ffffff) >= 0x00010007)
1473 tsfast = 1;
1474 }
1475
1476 dvb->attached = 0x01;
1477
1478 dvbdemux->priv = input;
1479 dvbdemux->dmx.capabilities = DMX_TS_FILTERING |
1480 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
1481 dvbdemux->start_feed = start_feed;
1482 dvbdemux->stop_feed = stop_feed;
1483 dvbdemux->filternum = 256;
1484 dvbdemux->feednum = 256;
1485 ret = dvb_dmx_init(dvbdemux);
1486 if (ret < 0)
1487 return ret;
1488 dvb->attached = 0x10;
1489
1490 dvb->dmxdev.filternum = 256;
1491 dvb->dmxdev.demux = &dvbdemux->dmx;
1492 ret = dvb_dmxdev_init(&dvb->dmxdev, adap);
1493 if (ret < 0)
1494 goto err_detach;
1495 dvb->attached = 0x11;
1496
1497 dvb->mem_frontend.source = DMX_MEMORY_FE;
1498 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend);
1499 dvb->hw_frontend.source = DMX_FRONTEND_0;
1500 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend);
1501 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend);
1502 if (ret < 0)
1503 goto err_detach;
1504 dvb->attached = 0x12;
1505
1506 ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux);
1507 if (ret < 0)
1508 goto err_detach;
1509 dvb->attached = 0x20;
1510
1511 dvb->fe = NULL;
1512 dvb->fe2 = NULL;
1513 switch (port->type) {
1514 case DDB_TUNER_MXL5XX:
1515 if (ddb_fe_attach_mxl5xx(input) < 0)
1516 goto err_detach;
1517 break;
1518 case DDB_TUNER_DVBS_ST:
1519 if (demod_attach_stv0900(input, 0) < 0)
1520 goto err_detach;
1521 if (tuner_attach_stv6110(input, 0) < 0)
1522 goto err_tuner;
1523 break;
1524 case DDB_TUNER_DVBS_ST_AA:
1525 if (demod_attach_stv0900(input, 1) < 0)
1526 goto err_detach;
1527 if (tuner_attach_stv6110(input, 1) < 0)
1528 goto err_tuner;
1529 break;
1530 case DDB_TUNER_DVBS_STV0910:
1531 if (demod_attach_stv0910(input, 0, tsfast) < 0)
1532 goto err_detach;
1533 if (tuner_attach_stv6111(input, 0) < 0)
1534 goto err_tuner;
1535 break;
1536 case DDB_TUNER_DVBS_STV0910_PR:
1537 if (demod_attach_stv0910(input, 1, tsfast) < 0)
1538 goto err_detach;
1539 if (tuner_attach_stv6111(input, 1) < 0)
1540 goto err_tuner;
1541 break;
1542 case DDB_TUNER_DVBS_STV0910_P:
1543 if (demod_attach_stv0910(input, 0, tsfast) < 0)
1544 goto err_detach;
1545 if (tuner_attach_stv6111(input, 1) < 0)
1546 goto err_tuner;
1547 break;
1548 case DDB_TUNER_DVBCT_TR:
1549 if (demod_attach_drxk(input) < 0)
1550 goto err_detach;
1551 if (tuner_attach_tda18271(input) < 0)
1552 goto err_tuner;
1553 break;
1554 case DDB_TUNER_DVBCT_ST:
1555 if (demod_attach_stv0367(input) < 0)
1556 goto err_detach;
1557 if (tuner_attach_tda18212(input, port->type) < 0)
1558 goto err_tuner;
1559 break;
1560 case DDB_TUNER_DVBC2T2I_SONY_P:
1561 if (input->port->dev->link[input->port->lnr].info->ts_quirks &
1562 TS_QUIRK_ALT_OSC)
1563 osc24 = 0;
1564 else
1565 osc24 = 1;
1566 /* fall-through */
1567 case DDB_TUNER_DVBCT2_SONY_P:
1568 case DDB_TUNER_DVBC2T2_SONY_P:
1569 case DDB_TUNER_ISDBT_SONY_P:
1570 if (input->port->dev->link[input->port->lnr].info->ts_quirks
1571 & TS_QUIRK_SERIAL)
1572 par = 0;
1573 else
1574 par = 1;
1575 if (demod_attach_cxd28xx(input, par, osc24) < 0)
1576 goto err_detach;
1577 if (tuner_attach_tda18212(input, port->type) < 0)
1578 goto err_tuner;
1579 break;
1580 case DDB_TUNER_DVBC2T2I_SONY:
1581 osc24 = 1;
1582 /* fall-through */
1583 case DDB_TUNER_DVBCT2_SONY:
1584 case DDB_TUNER_DVBC2T2_SONY:
1585 case DDB_TUNER_ISDBT_SONY:
1586 if (demod_attach_cxd28xx(input, 0, osc24) < 0)
1587 goto err_detach;
1588 if (tuner_attach_tda18212(input, port->type) < 0)
1589 goto err_tuner;
1590 break;
1591 case DDB_TUNER_DUMMY:
1592 if (demod_attach_dummy(input) < 0)
1593 goto err_detach;
1594 break;
1595 case DDB_TUNER_MCI_SX8:
1596 if (ddb_fe_attach_mci(input, port->type) < 0)
1597 goto err_detach;
1598 break;
1599 default:
1600 return 0;
1601 }
1602 dvb->attached = 0x30;
1603
1604 if (dvb->fe) {
1605 if (dvb_register_frontend(adap, dvb->fe) < 0)
1606 goto err_detach;
1607
1608 if (dvb->fe2) {
1609 if (dvb_register_frontend(adap, dvb->fe2) < 0) {
1610 dvb_unregister_frontend(dvb->fe);
1611 goto err_detach;
1612 }
1613 dvb->fe2->tuner_priv = dvb->fe->tuner_priv;
1614 memcpy(&dvb->fe2->ops.tuner_ops,
1615 &dvb->fe->ops.tuner_ops,
1616 sizeof(struct dvb_tuner_ops));
1617 }
1618 }
1619
1620 dvb->attached = 0x31;
1621 return 0;
1622
1623 err_tuner:
1624 dev_err(port->dev->dev, "tuner attach failed!\n");
1625
1626 if (dvb->fe2)
1627 dvb_frontend_detach(dvb->fe2);
1628 if (dvb->fe)
1629 dvb_frontend_detach(dvb->fe);
1630 err_detach:
1631 dvb_input_detach(input);
1632
1633 /* return error from ret if set */
1634 if (ret < 0)
1635 return ret;
1636
1637 return -ENODEV;
1638 }
1639
1640 static int port_has_encti(struct ddb_port *port)
1641 {
1642 struct device *dev = port->dev->dev;
1643 u8 val;
1644 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val);
1645
1646 if (!ret)
1647 dev_info(dev, "[0x20]=0x%02x\n", val);
1648 return ret ? 0 : 1;
1649 }
1650
1651 static int port_has_cxd(struct ddb_port *port, u8 *type)
1652 {
1653 u8 val;
1654 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4];
1655 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0,
1656 .buf = probe, .len = 4 },
1657 { .addr = 0x40, .flags = I2C_M_RD,
1658 .buf = data, .len = 4 } };
1659 val = i2c_transfer(&port->i2c->adap, msgs, 2);
1660 if (val != 2)
1661 return 0;
1662
1663 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43)
1664 *type = 2;
1665 else
1666 *type = 1;
1667 return 1;
1668 }
1669
1670 static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id)
1671 {
1672 u8 probe[1] = { 0x00 }, data[4];
1673
1674 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4))
1675 return 0;
1676 if (data[0] == 'D' && data[1] == 'F') {
1677 *id = data[2];
1678 *type = 1;
1679 return 1;
1680 }
1681 if (data[0] == 'C' && data[1] == 'I') {
1682 *id = data[2];
1683 *type = 2;
1684 return 1;
1685 }
1686 return 0;
1687 }
1688
1689 static int port_has_stv0900(struct ddb_port *port)
1690 {
1691 u8 val;
1692
1693 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0)
1694 return 0;
1695 return 1;
1696 }
1697
1698 static int port_has_stv0900_aa(struct ddb_port *port, u8 *id)
1699 {
1700 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0)
1701 return 0;
1702 return 1;
1703 }
1704
1705 static int port_has_drxks(struct ddb_port *port)
1706 {
1707 u8 val;
1708
1709 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0)
1710 return 0;
1711 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0)
1712 return 0;
1713 return 1;
1714 }
1715
1716 static int port_has_stv0367(struct ddb_port *port)
1717 {
1718 u8 val;
1719
1720 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0)
1721 return 0;
1722 if (val != 0x60)
1723 return 0;
1724 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0)
1725 return 0;
1726 if (val != 0x60)
1727 return 0;
1728 return 1;
1729 }
1730
1731 static int init_xo2(struct ddb_port *port)
1732 {
1733 struct i2c_adapter *i2c = &port->i2c->adap;
1734 struct ddb *dev = port->dev;
1735 u8 val, data[2];
1736 int res;
1737
1738 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
1739 if (res < 0)
1740 return res;
1741
1742 if (data[0] != 0x01) {
1743 dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr);
1744 return -1;
1745 }
1746
1747 i2c_read_reg(i2c, 0x10, 0x08, &val);
1748 if (val != 0) {
1749 i2c_write_reg(i2c, 0x10, 0x08, 0x00);
1750 msleep(100);
1751 }
1752 /* Enable tuner power, disable pll, reset demods */
1753 i2c_write_reg(i2c, 0x10, 0x08, 0x04);
1754 usleep_range(2000, 3000);
1755 /* Release demod resets */
1756 i2c_write_reg(i2c, 0x10, 0x08, 0x07);
1757
1758 /* speed: 0=55,1=75,2=90,3=104 MBit/s */
1759 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed);
1760
1761 if (dev->link[port->lnr].info->con_clock) {
1762 dev_info(dev->dev, "Setting continuous clock for XO2\n");
1763 i2c_write_reg(i2c, 0x10, 0x0a, 0x03);
1764 i2c_write_reg(i2c, 0x10, 0x0b, 0x03);
1765 } else {
1766 i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
1767 i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
1768 }
1769
1770 usleep_range(2000, 3000);
1771 /* Start XO2 PLL */
1772 i2c_write_reg(i2c, 0x10, 0x08, 0x87);
1773
1774 return 0;
1775 }
1776
1777 static int init_xo2_ci(struct ddb_port *port)
1778 {
1779 struct i2c_adapter *i2c = &port->i2c->adap;
1780 struct ddb *dev = port->dev;
1781 u8 val, data[2];
1782 int res;
1783
1784 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
1785 if (res < 0)
1786 return res;
1787
1788 if (data[0] > 1) {
1789 dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n",
1790 port->nr, data[0]);
1791 return -1;
1792 }
1793 dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n",
1794 port->nr, data[0], data[1]);
1795
1796 i2c_read_reg(i2c, 0x10, 0x08, &val);
1797 if (val != 0) {
1798 i2c_write_reg(i2c, 0x10, 0x08, 0x00);
1799 msleep(100);
1800 }
1801 /* Enable both CI */
1802 i2c_write_reg(i2c, 0x10, 0x08, 3);
1803 usleep_range(2000, 3000);
1804
1805 /* speed: 0=55,1=75,2=90,3=104 MBit/s */
1806 i2c_write_reg(i2c, 0x10, 0x09, 1);
1807
1808 i2c_write_reg(i2c, 0x10, 0x08, 0x83);
1809 usleep_range(2000, 3000);
1810
1811 if (dev->link[port->lnr].info->con_clock) {
1812 dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n");
1813 i2c_write_reg(i2c, 0x10, 0x0a, 0x03);
1814 i2c_write_reg(i2c, 0x10, 0x0b, 0x03);
1815 } else {
1816 i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
1817 i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
1818 }
1819 return 0;
1820 }
1821
1822 static int port_has_cxd28xx(struct ddb_port *port, u8 *id)
1823 {
1824 struct i2c_adapter *i2c = &port->i2c->adap;
1825 int status;
1826
1827 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0);
1828 if (status)
1829 return 0;
1830 status = i2c_read_reg(i2c, 0x6e, 0xfd, id);
1831 if (status)
1832 return 0;
1833 return 1;
1834 }
1835
1836 static char *xo2names[] = {
1837 "DUAL DVB-S2", "DUAL DVB-C/T/T2",
1838 "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2",
1839 "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T",
1840 "", ""
1841 };
1842
1843 static char *xo2types[] = {
1844 "DVBS_ST", "DVBCT2_SONY",
1845 "ISDBT_SONY", "DVBC2T2_SONY",
1846 "ATSC_ST", "DVBC2T2I_SONY"
1847 };
1848
1849 static void ddb_port_probe(struct ddb_port *port)
1850 {
1851 struct ddb *dev = port->dev;
1852 u32 l = port->lnr;
1853 struct ddb_link *link = &dev->link[l];
1854 u8 id, type;
1855
1856 port->name = "NO MODULE";
1857 port->type_name = "NONE";
1858 port->class = DDB_PORT_NONE;
1859
1860 /* Handle missing ports and ports without I2C */
1861
1862 if (dummy_tuner && !port->nr &&
1863 link->ids.device == 0x0005) {
1864 port->name = "DUMMY";
1865 port->class = DDB_PORT_TUNER;
1866 port->type = DDB_TUNER_DUMMY;
1867 port->type_name = "DUMMY";
1868 return;
1869 }
1870
1871 if (port->nr == ts_loop) {
1872 port->name = "TS LOOP";
1873 port->class = DDB_PORT_LOOP;
1874 return;
1875 }
1876
1877 if (port->nr == 1 && link->info->type == DDB_OCTOPUS_CI &&
1878 link->info->i2c_mask == 1) {
1879 port->name = "NO TAB";
1880 port->class = DDB_PORT_NONE;
1881 return;
1882 }
1883
1884 if (link->info->type == DDB_OCTOPUS_MAX) {
1885 port->name = "DUAL DVB-S2 MAX";
1886 port->type_name = "MXL5XX";
1887 port->class = DDB_PORT_TUNER;
1888 port->type = DDB_TUNER_MXL5XX;
1889 if (port->i2c)
1890 ddbwritel(dev, I2C_SPEED_400,
1891 port->i2c->regs + I2C_TIMING);
1892 return;
1893 }
1894
1895 if (link->info->type == DDB_OCTOPUS_MCI) {
1896 if (port->nr >= link->info->mci_ports)
1897 return;
1898 port->name = "DUAL MCI";
1899 port->type_name = "MCI";
1900 port->class = DDB_PORT_TUNER;
1901 port->type = DDB_TUNER_MCI + link->info->mci_type;
1902 return;
1903 }
1904
1905 if (port->nr > 1 && link->info->type == DDB_OCTOPUS_CI) {
1906 port->name = "CI internal";
1907 port->type_name = "INTERNAL";
1908 port->class = DDB_PORT_CI;
1909 port->type = DDB_CI_INTERNAL;
1910 }
1911
1912 if (!port->i2c)
1913 return;
1914
1915 /* Probe ports with I2C */
1916
1917 if (port_has_cxd(port, &id)) {
1918 if (id == 1) {
1919 port->name = "CI";
1920 port->type_name = "CXD2099";
1921 port->class = DDB_PORT_CI;
1922 port->type = DDB_CI_EXTERNAL_SONY;
1923 ddbwritel(dev, I2C_SPEED_400,
1924 port->i2c->regs + I2C_TIMING);
1925 } else {
1926 dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n",
1927 port->nr);
1928 return;
1929 }
1930 } else if (port_has_xo2(port, &type, &id)) {
1931 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1932 /*dev_info(dev->dev, "XO2 ID %02x\n", id);*/
1933 if (type == 2) {
1934 port->name = "DuoFlex CI";
1935 port->class = DDB_PORT_CI;
1936 port->type = DDB_CI_EXTERNAL_XO2;
1937 port->type_name = "CI_XO2";
1938 init_xo2_ci(port);
1939 return;
1940 }
1941 id >>= 2;
1942 if (id > 5) {
1943 port->name = "unknown XO2 DuoFlex";
1944 port->type_name = "UNKNOWN";
1945 } else {
1946 port->name = xo2names[id];
1947 port->class = DDB_PORT_TUNER;
1948 port->type = DDB_TUNER_XO2 + id;
1949 port->type_name = xo2types[id];
1950 init_xo2(port);
1951 }
1952 } else if (port_has_cxd28xx(port, &id)) {
1953 switch (id) {
1954 case 0xa4:
1955 port->name = "DUAL DVB-C2T2 CXD2843";
1956 port->type = DDB_TUNER_DVBC2T2_SONY_P;
1957 port->type_name = "DVBC2T2_SONY";
1958 break;
1959 case 0xb1:
1960 port->name = "DUAL DVB-CT2 CXD2837";
1961 port->type = DDB_TUNER_DVBCT2_SONY_P;
1962 port->type_name = "DVBCT2_SONY";
1963 break;
1964 case 0xb0:
1965 port->name = "DUAL ISDB-T CXD2838";
1966 port->type = DDB_TUNER_ISDBT_SONY_P;
1967 port->type_name = "ISDBT_SONY";
1968 break;
1969 case 0xc1:
1970 port->name = "DUAL DVB-C2T2 ISDB-T CXD2854";
1971 port->type = DDB_TUNER_DVBC2T2I_SONY_P;
1972 port->type_name = "DVBC2T2I_ISDBT_SONY";
1973 break;
1974 default:
1975 return;
1976 }
1977 port->class = DDB_PORT_TUNER;
1978 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1979 } else if (port_has_stv0900(port)) {
1980 port->name = "DUAL DVB-S2";
1981 port->class = DDB_PORT_TUNER;
1982 port->type = DDB_TUNER_DVBS_ST;
1983 port->type_name = "DVBS_ST";
1984 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1985 } else if (port_has_stv0900_aa(port, &id)) {
1986 port->name = "DUAL DVB-S2";
1987 port->class = DDB_PORT_TUNER;
1988 if (id == 0x51) {
1989 if (port->nr == 0 &&
1990 link->info->ts_quirks & TS_QUIRK_REVERSED)
1991 port->type = DDB_TUNER_DVBS_STV0910_PR;
1992 else
1993 port->type = DDB_TUNER_DVBS_STV0910_P;
1994 port->type_name = "DVBS_ST_0910";
1995 } else {
1996 port->type = DDB_TUNER_DVBS_ST_AA;
1997 port->type_name = "DVBS_ST_AA";
1998 }
1999 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
2000 } else if (port_has_drxks(port)) {
2001 port->name = "DUAL DVB-C/T";
2002 port->class = DDB_PORT_TUNER;
2003 port->type = DDB_TUNER_DVBCT_TR;
2004 port->type_name = "DVBCT_TR";
2005 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
2006 } else if (port_has_stv0367(port)) {
2007 port->name = "DUAL DVB-C/T";
2008 port->class = DDB_PORT_TUNER;
2009 port->type = DDB_TUNER_DVBCT_ST;
2010 port->type_name = "DVBCT_ST";
2011 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
2012 } else if (port_has_encti(port)) {
2013 port->name = "ENCTI";
2014 port->class = DDB_PORT_LOOP;
2015 }
2016 }
2017
2018 /****************************************************************************/
2019 /****************************************************************************/
2020 /****************************************************************************/
2021
2022 static int ddb_port_attach(struct ddb_port *port)
2023 {
2024 int ret = 0;
2025
2026 switch (port->class) {
2027 case DDB_PORT_TUNER:
2028 ret = dvb_input_attach(port->input[0]);
2029 if (ret < 0)
2030 break;
2031 ret = dvb_input_attach(port->input[1]);
2032 if (ret < 0) {
2033 dvb_input_detach(port->input[0]);
2034 break;
2035 }
2036 port->input[0]->redi = port->input[0];
2037 port->input[1]->redi = port->input[1];
2038 break;
2039 case DDB_PORT_CI:
2040 ret = ddb_ci_attach(port, ci_bitrate);
2041 if (ret < 0)
2042 break;
2043 /* fall-through */
2044 case DDB_PORT_LOOP:
2045 ret = dvb_register_device(port->dvb[0].adap,
2046 &port->dvb[0].dev,
2047 &dvbdev_ci, (void *)port->output,
2048 DVB_DEVICE_SEC, 0);
2049 break;
2050 default:
2051 break;
2052 }
2053 if (ret < 0)
2054 dev_err(port->dev->dev, "port_attach on port %d failed\n",
2055 port->nr);
2056 return ret;
2057 }
2058
2059 int ddb_ports_attach(struct ddb *dev)
2060 {
2061 int i, numports, err_ports = 0, ret = 0;
2062 struct ddb_port *port;
2063
2064 if (dev->port_num) {
2065 ret = dvb_register_adapters(dev);
2066 if (ret < 0) {
2067 dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n");
2068 return ret;
2069 }
2070 }
2071
2072 numports = dev->port_num;
2073
2074 for (i = 0; i < dev->port_num; i++) {
2075 port = &dev->port[i];
2076 if (port->class != DDB_PORT_NONE) {
2077 ret = ddb_port_attach(port);
2078 if (ret)
2079 err_ports++;
2080 } else {
2081 numports--;
2082 }
2083 }
2084
2085 if (err_ports) {
2086 if (err_ports == numports) {
2087 dev_err(dev->dev, "All connected ports failed to initialise!\n");
2088 return -ENODEV;
2089 }
2090
2091 dev_warn(dev->dev, "%d of %d connected ports failed to initialise!\n",
2092 err_ports, numports);
2093 }
2094
2095 return 0;
2096 }
2097
2098 void ddb_ports_detach(struct ddb *dev)
2099 {
2100 int i;
2101 struct ddb_port *port;
2102
2103 for (i = 0; i < dev->port_num; i++) {
2104 port = &dev->port[i];
2105
2106 switch (port->class) {
2107 case DDB_PORT_TUNER:
2108 dvb_input_detach(port->input[1]);
2109 dvb_input_detach(port->input[0]);
2110 break;
2111 case DDB_PORT_CI:
2112 case DDB_PORT_LOOP:
2113 ddb_ci_detach(port);
2114 break;
2115 }
2116 }
2117 dvb_unregister_adapters(dev);
2118 }
2119
2120 /* Copy input DMA pointers to output DMA and ACK. */
2121
2122 static void input_write_output(struct ddb_input *input,
2123 struct ddb_output *output)
2124 {
2125 ddbwritel(output->port->dev,
2126 input->dma->stat, DMA_BUFFER_ACK(output->dma));
2127 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f;
2128 output->dma->coff = (input->dma->stat & 0x7ff) << 7;
2129 }
2130
2131 static void output_ack_input(struct ddb_output *output,
2132 struct ddb_input *input)
2133 {
2134 ddbwritel(input->port->dev,
2135 output->dma->stat, DMA_BUFFER_ACK(input->dma));
2136 }
2137
2138 static void input_write_dvb(struct ddb_input *input,
2139 struct ddb_input *input2)
2140 {
2141 struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1];
2142 struct ddb_dma *dma, *dma2;
2143 struct ddb *dev = input->port->dev;
2144 int ack = 1;
2145
2146 dma = input->dma;
2147 dma2 = input->dma;
2148 /*
2149 * if there also is an output connected, do not ACK.
2150 * input_write_output will ACK.
2151 */
2152 if (input->redo) {
2153 dma2 = input->redo->dma;
2154 ack = 0;
2155 }
2156 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) ||
2157 (4 & dma->ctrl)) {
2158 if (4 & dma->ctrl) {
2159 /* dev_err(dev->dev, "Overflow dma %d\n", dma->nr); */
2160 ack = 1;
2161 }
2162 if (alt_dma)
2163 dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf],
2164 dma2->size, DMA_FROM_DEVICE);
2165 dvb_dmx_swfilter_packets(&dvb->demux,
2166 dma2->vbuf[dma->cbuf],
2167 dma2->size / 188);
2168 dma->cbuf = (dma->cbuf + 1) % dma2->num;
2169 if (ack)
2170 ddbwritel(dev, (dma->cbuf << 11),
2171 DMA_BUFFER_ACK(dma));
2172 dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2173 dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2174 }
2175 }
2176
2177 static void input_work(struct work_struct *work)
2178 {
2179 struct ddb_dma *dma = container_of(work, struct ddb_dma, work);
2180 struct ddb_input *input = (struct ddb_input *)dma->io;
2181 struct ddb *dev = input->port->dev;
2182 unsigned long flags;
2183
2184 spin_lock_irqsave(&dma->lock, flags);
2185 if (!dma->running) {
2186 spin_unlock_irqrestore(&dma->lock, flags);
2187 return;
2188 }
2189 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2190 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2191
2192 if (input->redi)
2193 input_write_dvb(input, input->redi);
2194 if (input->redo)
2195 input_write_output(input, input->redo);
2196 wake_up(&dma->wq);
2197 spin_unlock_irqrestore(&dma->lock, flags);
2198 }
2199
2200 static void input_handler(void *data)
2201 {
2202 struct ddb_input *input = (struct ddb_input *)data;
2203 struct ddb_dma *dma = input->dma;
2204
2205 queue_work(ddb_wq, &dma->work);
2206 }
2207
2208 static void output_work(struct work_struct *work)
2209 {
2210 struct ddb_dma *dma = container_of(work, struct ddb_dma, work);
2211 struct ddb_output *output = (struct ddb_output *)dma->io;
2212 struct ddb *dev = output->port->dev;
2213 unsigned long flags;
2214
2215 spin_lock_irqsave(&dma->lock, flags);
2216 if (!dma->running)
2217 goto unlock_exit;
2218 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2219 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2220 if (output->redi)
2221 output_ack_input(output, output->redi);
2222 wake_up(&dma->wq);
2223 unlock_exit:
2224 spin_unlock_irqrestore(&dma->lock, flags);
2225 }
2226
2227 static void output_handler(void *data)
2228 {
2229 struct ddb_output *output = (struct ddb_output *)data;
2230 struct ddb_dma *dma = output->dma;
2231
2232 queue_work(ddb_wq, &dma->work);
2233 }
2234
2235 /****************************************************************************/
2236 /****************************************************************************/
2237
2238 static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link)
2239 {
2240 const struct ddb_info *info;
2241
2242 if (link)
2243 info = io->port->dev->link[io->port->lnr].info;
2244 else
2245 info = io->port->dev->link[0].info;
2246
2247 if (!info)
2248 return NULL;
2249
2250 return info->regmap;
2251 }
2252
2253 static void ddb_dma_init(struct ddb_io *io, int nr, int out)
2254 {
2255 struct ddb_dma *dma;
2256 const struct ddb_regmap *rm = io_regmap(io, 0);
2257
2258 dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr];
2259 io->dma = dma;
2260 dma->io = io;
2261
2262 spin_lock_init(&dma->lock);
2263 init_waitqueue_head(&dma->wq);
2264 if (out) {
2265 INIT_WORK(&dma->work, output_work);
2266 dma->regs = rm->odma->base + rm->odma->size * nr;
2267 dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr;
2268 dma->num = dma_buf_num;
2269 dma->size = dma_buf_size * 128 * 47;
2270 dma->div = 1;
2271 } else {
2272 INIT_WORK(&dma->work, input_work);
2273 dma->regs = rm->idma->base + rm->idma->size * nr;
2274 dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr;
2275 dma->num = dma_buf_num;
2276 dma->size = dma_buf_size * 128 * 47;
2277 dma->div = 1;
2278 }
2279 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma));
2280 dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n",
2281 io->port->lnr, io->nr, nr, dma->regs, dma->bufregs);
2282 }
2283
2284 static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr)
2285 {
2286 struct ddb *dev = port->dev;
2287 struct ddb_input *input = &dev->input[anr];
2288 const struct ddb_regmap *rm;
2289
2290 port->input[pnr] = input;
2291 input->nr = nr;
2292 input->port = port;
2293 rm = io_regmap(input, 1);
2294 input->regs = DDB_LINK_TAG(port->lnr) |
2295 (rm->input->base + rm->input->size * nr);
2296 dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n",
2297 port->lnr, nr, input->regs);
2298
2299 if (dev->has_dma) {
2300 const struct ddb_regmap *rm0 = io_regmap(input, 0);
2301 u32 base = rm0->irq_base_idma;
2302 u32 dma_nr = nr;
2303
2304 if (port->lnr)
2305 dma_nr += 32 + (port->lnr - 1) * 8;
2306
2307 dev_dbg(dev->dev, "init link %u, input %u, handler %u\n",
2308 port->lnr, nr, dma_nr + base);
2309
2310 ddb_irq_set(dev, 0, dma_nr + base, &input_handler, input);
2311 ddb_dma_init(input, dma_nr, 0);
2312 }
2313 }
2314
2315 static void ddb_output_init(struct ddb_port *port, int nr)
2316 {
2317 struct ddb *dev = port->dev;
2318 struct ddb_output *output = &dev->output[nr];
2319 const struct ddb_regmap *rm;
2320
2321 port->output = output;
2322 output->nr = nr;
2323 output->port = port;
2324 rm = io_regmap(output, 1);
2325 output->regs = DDB_LINK_TAG(port->lnr) |
2326 (rm->output->base + rm->output->size * nr);
2327
2328 dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n",
2329 port->lnr, nr, output->regs);
2330
2331 if (dev->has_dma) {
2332 const struct ddb_regmap *rm0 = io_regmap(output, 0);
2333 u32 base = rm0->irq_base_odma;
2334
2335 ddb_irq_set(dev, 0, nr + base, &output_handler, output);
2336 ddb_dma_init(output, nr, 1);
2337 }
2338 }
2339
2340 static int ddb_port_match_i2c(struct ddb_port *port)
2341 {
2342 struct ddb *dev = port->dev;
2343 u32 i;
2344
2345 for (i = 0; i < dev->i2c_num; i++) {
2346 if (dev->i2c[i].link == port->lnr &&
2347 dev->i2c[i].nr == port->nr) {
2348 port->i2c = &dev->i2c[i];
2349 return 1;
2350 }
2351 }
2352 return 0;
2353 }
2354
2355 static int ddb_port_match_link_i2c(struct ddb_port *port)
2356 {
2357 struct ddb *dev = port->dev;
2358 u32 i;
2359
2360 for (i = 0; i < dev->i2c_num; i++) {
2361 if (dev->i2c[i].link == port->lnr) {
2362 port->i2c = &dev->i2c[i];
2363 return 1;
2364 }
2365 }
2366 return 0;
2367 }
2368
2369 void ddb_ports_init(struct ddb *dev)
2370 {
2371 u32 i, l, p;
2372 struct ddb_port *port;
2373 const struct ddb_info *info;
2374 const struct ddb_regmap *rm;
2375
2376 for (p = l = 0; l < DDB_MAX_LINK; l++) {
2377 info = dev->link[l].info;
2378 if (!info)
2379 continue;
2380 rm = info->regmap;
2381 if (!rm)
2382 continue;
2383 for (i = 0; i < info->port_num; i++, p++) {
2384 port = &dev->port[p];
2385 port->dev = dev;
2386 port->nr = i;
2387 port->lnr = l;
2388 port->pnr = p;
2389 port->gap = 0xffffffff;
2390 port->obr = ci_bitrate;
2391 mutex_init(&port->i2c_gate_lock);
2392
2393 if (!ddb_port_match_i2c(port)) {
2394 if (info->type == DDB_OCTOPUS_MAX)
2395 ddb_port_match_link_i2c(port);
2396 }
2397
2398 ddb_port_probe(port);
2399
2400 port->dvb[0].adap = &dev->adap[2 * p];
2401 port->dvb[1].adap = &dev->adap[2 * p + 1];
2402
2403 if (port->class == DDB_PORT_NONE && i && p &&
2404 dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) {
2405 port->class = DDB_PORT_CI;
2406 port->type = DDB_CI_EXTERNAL_XO2_B;
2407 port->name = "DuoFlex CI_B";
2408 port->i2c = dev->port[p - 1].i2c;
2409 }
2410
2411 dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n",
2412 port->pnr, port->lnr, port->nr, port->nr + 1,
2413 port->name);
2414
2415 if (port->class == DDB_PORT_CI &&
2416 port->type == DDB_CI_EXTERNAL_XO2) {
2417 ddb_input_init(port, 2 * i, 0, 2 * i);
2418 ddb_output_init(port, i);
2419 continue;
2420 }
2421
2422 if (port->class == DDB_PORT_CI &&
2423 port->type == DDB_CI_EXTERNAL_XO2_B) {
2424 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1);
2425 ddb_output_init(port, i);
2426 continue;
2427 }
2428
2429 if (port->class == DDB_PORT_NONE)
2430 continue;
2431
2432 switch (dev->link[l].info->type) {
2433 case DDB_OCTOPUS_CI:
2434 if (i >= 2) {
2435 ddb_input_init(port, 2 + i, 0, 2 + i);
2436 ddb_input_init(port, 4 + i, 1, 4 + i);
2437 ddb_output_init(port, i);
2438 break;
2439 } /* fallthrough */
2440 case DDB_OCTOPUS:
2441 ddb_input_init(port, 2 * i, 0, 2 * i);
2442 ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1);
2443 ddb_output_init(port, i);
2444 break;
2445 case DDB_OCTOPUS_MAX:
2446 case DDB_OCTOPUS_MAX_CT:
2447 case DDB_OCTOPUS_MCI:
2448 ddb_input_init(port, 2 * i, 0, 2 * p);
2449 ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1);
2450 break;
2451 default:
2452 break;
2453 }
2454 }
2455 }
2456 dev->port_num = p;
2457 }
2458
2459 void ddb_ports_release(struct ddb *dev)
2460 {
2461 int i;
2462 struct ddb_port *port;
2463
2464 for (i = 0; i < dev->port_num; i++) {
2465 port = &dev->port[i];
2466 if (port->input[0] && port->input[0]->dma)
2467 cancel_work_sync(&port->input[0]->dma->work);
2468 if (port->input[1] && port->input[1]->dma)
2469 cancel_work_sync(&port->input[1]->dma->work);
2470 if (port->output && port->output->dma)
2471 cancel_work_sync(&port->output->dma->work);
2472 }
2473 }
2474
2475 /****************************************************************************/
2476 /****************************************************************************/
2477 /****************************************************************************/
2478
2479 #define IRQ_HANDLE(_nr) \
2480 do { if ((s & (1UL << ((_nr) & 0x1f))) && \
2481 dev->link[0].irq[_nr].handler) \
2482 dev->link[0].irq[_nr].handler(dev->link[0].irq[_nr].data); } \
2483 while (0)
2484
2485 #define IRQ_HANDLE_NIBBLE(_shift) { \
2486 if (s & (0x0000000f << ((_shift) & 0x1f))) { \
2487 IRQ_HANDLE(0 + (_shift)); \
2488 IRQ_HANDLE(1 + (_shift)); \
2489 IRQ_HANDLE(2 + (_shift)); \
2490 IRQ_HANDLE(3 + (_shift)); \
2491 } \
2492 }
2493
2494 #define IRQ_HANDLE_BYTE(_shift) { \
2495 if (s & (0x000000ff << ((_shift) & 0x1f))) { \
2496 IRQ_HANDLE(0 + (_shift)); \
2497 IRQ_HANDLE(1 + (_shift)); \
2498 IRQ_HANDLE(2 + (_shift)); \
2499 IRQ_HANDLE(3 + (_shift)); \
2500 IRQ_HANDLE(4 + (_shift)); \
2501 IRQ_HANDLE(5 + (_shift)); \
2502 IRQ_HANDLE(6 + (_shift)); \
2503 IRQ_HANDLE(7 + (_shift)); \
2504 } \
2505 }
2506
2507 static void irq_handle_msg(struct ddb *dev, u32 s)
2508 {
2509 dev->i2c_irq++;
2510 IRQ_HANDLE_NIBBLE(0);
2511 }
2512
2513 static void irq_handle_io(struct ddb *dev, u32 s)
2514 {
2515 dev->ts_irq++;
2516 IRQ_HANDLE_NIBBLE(4);
2517 IRQ_HANDLE_BYTE(8);
2518 IRQ_HANDLE_BYTE(16);
2519 IRQ_HANDLE_BYTE(24);
2520 }
2521
2522 irqreturn_t ddb_irq_handler0(int irq, void *dev_id)
2523 {
2524 struct ddb *dev = (struct ddb *)dev_id;
2525 u32 mask = 0x8fffff00;
2526 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS);
2527
2528 if (!s)
2529 return IRQ_NONE;
2530 do {
2531 if (s & 0x80000000)
2532 return IRQ_NONE;
2533 ddbwritel(dev, s, INTERRUPT_ACK);
2534 irq_handle_io(dev, s);
2535 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS)));
2536
2537 return IRQ_HANDLED;
2538 }
2539
2540 irqreturn_t ddb_irq_handler1(int irq, void *dev_id)
2541 {
2542 struct ddb *dev = (struct ddb *)dev_id;
2543 u32 mask = 0x8000000f;
2544 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS);
2545
2546 if (!s)
2547 return IRQ_NONE;
2548 do {
2549 if (s & 0x80000000)
2550 return IRQ_NONE;
2551 ddbwritel(dev, s, INTERRUPT_ACK);
2552 irq_handle_msg(dev, s);
2553 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS)));
2554
2555 return IRQ_HANDLED;
2556 }
2557
2558 irqreturn_t ddb_irq_handler(int irq, void *dev_id)
2559 {
2560 struct ddb *dev = (struct ddb *)dev_id;
2561 u32 s = ddbreadl(dev, INTERRUPT_STATUS);
2562 int ret = IRQ_HANDLED;
2563
2564 if (!s)
2565 return IRQ_NONE;
2566 do {
2567 if (s & 0x80000000)
2568 return IRQ_NONE;
2569 ddbwritel(dev, s, INTERRUPT_ACK);
2570
2571 if (s & 0x0000000f)
2572 irq_handle_msg(dev, s);
2573 if (s & 0x0fffff00)
2574 irq_handle_io(dev, s);
2575 } while ((s = ddbreadl(dev, INTERRUPT_STATUS)));
2576
2577 return ret;
2578 }
2579
2580 /****************************************************************************/
2581 /****************************************************************************/
2582 /****************************************************************************/
2583
2584 static int reg_wait(struct ddb *dev, u32 reg, u32 bit)
2585 {
2586 u32 count = 0;
2587
2588 while (safe_ddbreadl(dev, reg) & bit) {
2589 ndelay(10);
2590 if (++count == 100)
2591 return -1;
2592 }
2593 return 0;
2594 }
2595
2596 static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf,
2597 u32 rlen)
2598 {
2599 u32 data, shift;
2600 u32 tag = DDB_LINK_TAG(lnr);
2601 struct ddb_link *link = &dev->link[lnr];
2602
2603 mutex_lock(&link->flash_mutex);
2604 if (wlen > 4)
2605 ddbwritel(dev, 1, tag | SPI_CONTROL);
2606 while (wlen > 4) {
2607 /* FIXME: check for big-endian */
2608 data = swab32(*(u32 *)wbuf);
2609 wbuf += 4;
2610 wlen -= 4;
2611 ddbwritel(dev, data, tag | SPI_DATA);
2612 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2613 goto fail;
2614 }
2615 if (rlen)
2616 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00),
2617 tag | SPI_CONTROL);
2618 else
2619 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00),
2620 tag | SPI_CONTROL);
2621
2622 data = 0;
2623 shift = ((4 - wlen) * 8);
2624 while (wlen) {
2625 data <<= 8;
2626 data |= *wbuf;
2627 wlen--;
2628 wbuf++;
2629 }
2630 if (shift)
2631 data <<= shift;
2632 ddbwritel(dev, data, tag | SPI_DATA);
2633 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2634 goto fail;
2635
2636 if (!rlen) {
2637 ddbwritel(dev, 0, tag | SPI_CONTROL);
2638 goto exit;
2639 }
2640 if (rlen > 4)
2641 ddbwritel(dev, 1, tag | SPI_CONTROL);
2642
2643 while (rlen > 4) {
2644 ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
2645 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2646 goto fail;
2647 data = ddbreadl(dev, tag | SPI_DATA);
2648 *(u32 *)rbuf = swab32(data);
2649 rbuf += 4;
2650 rlen -= 4;
2651 }
2652 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00),
2653 tag | SPI_CONTROL);
2654 ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
2655 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2656 goto fail;
2657
2658 data = ddbreadl(dev, tag | SPI_DATA);
2659 ddbwritel(dev, 0, tag | SPI_CONTROL);
2660
2661 if (rlen < 4)
2662 data <<= ((4 - rlen) * 8);
2663
2664 while (rlen > 0) {
2665 *rbuf = ((data >> 24) & 0xff);
2666 data <<= 8;
2667 rbuf++;
2668 rlen--;
2669 }
2670 exit:
2671 mutex_unlock(&link->flash_mutex);
2672 return 0;
2673 fail:
2674 mutex_unlock(&link->flash_mutex);
2675 return -1;
2676 }
2677
2678 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len)
2679 {
2680 u8 cmd[4] = {0x03, (addr >> 16) & 0xff,
2681 (addr >> 8) & 0xff, addr & 0xff};
2682
2683 return flashio(dev, link, cmd, 4, buf, len);
2684 }
2685
2686 /*
2687 * TODO/FIXME: add/implement IOCTLs from upstream driver
2688 */
2689
2690 #define DDB_NAME "ddbridge"
2691
2692 static u32 ddb_num;
2693 static int ddb_major;
2694 static DEFINE_MUTEX(ddb_mutex);
2695
2696 static int ddb_release(struct inode *inode, struct file *file)
2697 {
2698 struct ddb *dev = file->private_data;
2699
2700 dev->ddb_dev_users--;
2701 return 0;
2702 }
2703
2704 static int ddb_open(struct inode *inode, struct file *file)
2705 {
2706 struct ddb *dev = ddbs[iminor(inode)];
2707
2708 if (dev->ddb_dev_users)
2709 return -EBUSY;
2710 dev->ddb_dev_users++;
2711 file->private_data = dev;
2712 return 0;
2713 }
2714
2715 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
2716 {
2717 struct ddb *dev = file->private_data;
2718
2719 dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n",
2720 cmd, arg);
2721
2722 return -ENOTTY;
2723 }
2724
2725 static const struct file_operations ddb_fops = {
2726 .unlocked_ioctl = ddb_ioctl,
2727 .open = ddb_open,
2728 .release = ddb_release,
2729 };
2730
2731 static char *ddb_devnode(struct device *device, umode_t *mode)
2732 {
2733 struct ddb *dev = dev_get_drvdata(device);
2734
2735 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr);
2736 }
2737
2738 #define __ATTR_MRO(_name, _show) { \
2739 .attr = { .name = __stringify(_name), .mode = 0444 }, \
2740 .show = _show, \
2741 }
2742
2743 #define __ATTR_MWO(_name, _store) { \
2744 .attr = { .name = __stringify(_name), .mode = 0222 }, \
2745 .store = _store, \
2746 }
2747
2748 static ssize_t ports_show(struct device *device,
2749 struct device_attribute *attr, char *buf)
2750 {
2751 struct ddb *dev = dev_get_drvdata(device);
2752
2753 return sprintf(buf, "%d\n", dev->port_num);
2754 }
2755
2756 static ssize_t ts_irq_show(struct device *device,
2757 struct device_attribute *attr, char *buf)
2758 {
2759 struct ddb *dev = dev_get_drvdata(device);
2760
2761 return sprintf(buf, "%d\n", dev->ts_irq);
2762 }
2763
2764 static ssize_t i2c_irq_show(struct device *device,
2765 struct device_attribute *attr, char *buf)
2766 {
2767 struct ddb *dev = dev_get_drvdata(device);
2768
2769 return sprintf(buf, "%d\n", dev->i2c_irq);
2770 }
2771
2772 static ssize_t fan_show(struct device *device,
2773 struct device_attribute *attr, char *buf)
2774 {
2775 struct ddb *dev = dev_get_drvdata(device);
2776 u32 val;
2777
2778 val = ddbreadl(dev, GPIO_OUTPUT) & 1;
2779 return sprintf(buf, "%d\n", val);
2780 }
2781
2782 static ssize_t fan_store(struct device *device, struct device_attribute *d,
2783 const char *buf, size_t count)
2784 {
2785 struct ddb *dev = dev_get_drvdata(device);
2786 u32 val;
2787
2788 if (sscanf(buf, "%u\n", &val) != 1)
2789 return -EINVAL;
2790 ddbwritel(dev, 1, GPIO_DIRECTION);
2791 ddbwritel(dev, val & 1, GPIO_OUTPUT);
2792 return count;
2793 }
2794
2795 static ssize_t fanspeed_show(struct device *device,
2796 struct device_attribute *attr, char *buf)
2797 {
2798 struct ddb *dev = dev_get_drvdata(device);
2799 int num = attr->attr.name[8] - 0x30;
2800 struct ddb_link *link = &dev->link[num];
2801 u32 spd;
2802
2803 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff;
2804 return sprintf(buf, "%u\n", spd * 100);
2805 }
2806
2807 static ssize_t temp_show(struct device *device,
2808 struct device_attribute *attr, char *buf)
2809 {
2810 struct ddb *dev = dev_get_drvdata(device);
2811 struct ddb_link *link = &dev->link[0];
2812 struct i2c_adapter *adap;
2813 int temp, temp2;
2814 u8 tmp[2];
2815
2816 if (!link->info->temp_num)
2817 return sprintf(buf, "no sensor\n");
2818 adap = &dev->i2c[link->info->temp_bus].adap;
2819 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0)
2820 return sprintf(buf, "read_error\n");
2821 temp = (tmp[0] << 3) | (tmp[1] >> 5);
2822 temp *= 125;
2823 if (link->info->temp_num == 2) {
2824 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
2825 return sprintf(buf, "read_error\n");
2826 temp2 = (tmp[0] << 3) | (tmp[1] >> 5);
2827 temp2 *= 125;
2828 return sprintf(buf, "%d %d\n", temp, temp2);
2829 }
2830 return sprintf(buf, "%d\n", temp);
2831 }
2832
2833 static ssize_t ctemp_show(struct device *device,
2834 struct device_attribute *attr, char *buf)
2835 {
2836 struct ddb *dev = dev_get_drvdata(device);
2837 struct i2c_adapter *adap;
2838 int temp;
2839 u8 tmp[2];
2840 int num = attr->attr.name[4] - 0x30;
2841
2842 adap = &dev->i2c[num].adap;
2843 if (!adap)
2844 return 0;
2845 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
2846 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0)
2847 return sprintf(buf, "no sensor\n");
2848 temp = tmp[0] * 1000;
2849 return sprintf(buf, "%d\n", temp);
2850 }
2851
2852 static ssize_t led_show(struct device *device,
2853 struct device_attribute *attr, char *buf)
2854 {
2855 struct ddb *dev = dev_get_drvdata(device);
2856 int num = attr->attr.name[3] - 0x30;
2857
2858 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0);
2859 }
2860
2861 static void ddb_set_led(struct ddb *dev, int num, int val)
2862 {
2863 if (!dev->link[0].info->led_num)
2864 return;
2865 switch (dev->port[num].class) {
2866 case DDB_PORT_TUNER:
2867 switch (dev->port[num].type) {
2868 case DDB_TUNER_DVBS_ST:
2869 i2c_write_reg16(&dev->i2c[num].adap,
2870 0x69, 0xf14c, val ? 2 : 0);
2871 break;
2872 case DDB_TUNER_DVBCT_ST:
2873 i2c_write_reg16(&dev->i2c[num].adap,
2874 0x1f, 0xf00e, 0);
2875 i2c_write_reg16(&dev->i2c[num].adap,
2876 0x1f, 0xf00f, val ? 1 : 0);
2877 break;
2878 case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY:
2879 {
2880 u8 v;
2881
2882 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v);
2883 v = (v & ~0x10) | (val ? 0x10 : 0);
2884 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v);
2885 break;
2886 }
2887 default:
2888 break;
2889 }
2890 break;
2891 }
2892 }
2893
2894 static ssize_t led_store(struct device *device,
2895 struct device_attribute *attr,
2896 const char *buf, size_t count)
2897 {
2898 struct ddb *dev = dev_get_drvdata(device);
2899 int num = attr->attr.name[3] - 0x30;
2900 u32 val;
2901
2902 if (sscanf(buf, "%u\n", &val) != 1)
2903 return -EINVAL;
2904 if (val)
2905 dev->leds |= (1 << num);
2906 else
2907 dev->leds &= ~(1 << num);
2908 ddb_set_led(dev, num, val);
2909 return count;
2910 }
2911
2912 static ssize_t snr_show(struct device *device,
2913 struct device_attribute *attr, char *buf)
2914 {
2915 struct ddb *dev = dev_get_drvdata(device);
2916 char snr[32];
2917 int num = attr->attr.name[3] - 0x30;
2918
2919 if (dev->port[num].type >= DDB_TUNER_XO2) {
2920 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0)
2921 return sprintf(buf, "NO SNR\n");
2922 snr[16] = 0;
2923 } else {
2924 /* serial number at 0x100-0x11f */
2925 if (i2c_read_regs16(&dev->i2c[num].adap,
2926 0x57, 0x100, snr, 32) < 0)
2927 if (i2c_read_regs16(&dev->i2c[num].adap,
2928 0x50, 0x100, snr, 32) < 0)
2929 return sprintf(buf, "NO SNR\n");
2930 snr[31] = 0; /* in case it is not terminated on EEPROM */
2931 }
2932 return sprintf(buf, "%s\n", snr);
2933 }
2934
2935 static ssize_t bsnr_show(struct device *device,
2936 struct device_attribute *attr, char *buf)
2937 {
2938 struct ddb *dev = dev_get_drvdata(device);
2939 char snr[16];
2940
2941 ddbridge_flashread(dev, 0, snr, 0x10, 15);
2942 snr[15] = 0; /* in case it is not terminated on EEPROM */
2943 return sprintf(buf, "%s\n", snr);
2944 }
2945
2946 static ssize_t bpsnr_show(struct device *device,
2947 struct device_attribute *attr, char *buf)
2948 {
2949 struct ddb *dev = dev_get_drvdata(device);
2950 unsigned char snr[32];
2951
2952 if (!dev->i2c_num)
2953 return 0;
2954
2955 if (i2c_read_regs16(&dev->i2c[0].adap,
2956 0x50, 0x0000, snr, 32) < 0 ||
2957 snr[0] == 0xff)
2958 return sprintf(buf, "NO SNR\n");
2959 snr[31] = 0; /* in case it is not terminated on EEPROM */
2960 return sprintf(buf, "%s\n", snr);
2961 }
2962
2963 static ssize_t redirect_show(struct device *device,
2964 struct device_attribute *attr, char *buf)
2965 {
2966 return 0;
2967 }
2968
2969 static ssize_t redirect_store(struct device *device,
2970 struct device_attribute *attr,
2971 const char *buf, size_t count)
2972 {
2973 unsigned int i, p;
2974 int res;
2975
2976 if (sscanf(buf, "%x %x\n", &i, &p) != 2)
2977 return -EINVAL;
2978 res = ddb_redirect(i, p);
2979 if (res < 0)
2980 return res;
2981 dev_info(device, "redirect: %02x, %02x\n", i, p);
2982 return count;
2983 }
2984
2985 static ssize_t gap_show(struct device *device,
2986 struct device_attribute *attr, char *buf)
2987 {
2988 struct ddb *dev = dev_get_drvdata(device);
2989 int num = attr->attr.name[3] - 0x30;
2990
2991 return sprintf(buf, "%d\n", dev->port[num].gap);
2992 }
2993
2994 static ssize_t gap_store(struct device *device, struct device_attribute *attr,
2995 const char *buf, size_t count)
2996 {
2997 struct ddb *dev = dev_get_drvdata(device);
2998 int num = attr->attr.name[3] - 0x30;
2999 unsigned int val;
3000
3001 if (sscanf(buf, "%u\n", &val) != 1)
3002 return -EINVAL;
3003 if (val > 128)
3004 return -EINVAL;
3005 if (val == 128)
3006 val = 0xffffffff;
3007 dev->port[num].gap = val;
3008 return count;
3009 }
3010
3011 static ssize_t version_show(struct device *device,
3012 struct device_attribute *attr, char *buf)
3013 {
3014 struct ddb *dev = dev_get_drvdata(device);
3015
3016 return sprintf(buf, "%08x %08x\n",
3017 dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
3018 }
3019
3020 static ssize_t hwid_show(struct device *device,
3021 struct device_attribute *attr, char *buf)
3022 {
3023 struct ddb *dev = dev_get_drvdata(device);
3024
3025 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid);
3026 }
3027
3028 static ssize_t regmap_show(struct device *device,
3029 struct device_attribute *attr, char *buf)
3030 {
3031 struct ddb *dev = dev_get_drvdata(device);
3032
3033 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid);
3034 }
3035
3036 static ssize_t fmode_show(struct device *device,
3037 struct device_attribute *attr, char *buf)
3038 {
3039 int num = attr->attr.name[5] - 0x30;
3040 struct ddb *dev = dev_get_drvdata(device);
3041
3042 return sprintf(buf, "%u\n", dev->link[num].lnb.fmode);
3043 }
3044
3045 static ssize_t devid_show(struct device *device,
3046 struct device_attribute *attr, char *buf)
3047 {
3048 int num = attr->attr.name[5] - 0x30;
3049 struct ddb *dev = dev_get_drvdata(device);
3050
3051 return sprintf(buf, "%08x\n", dev->link[num].ids.devid);
3052 }
3053
3054 static ssize_t fmode_store(struct device *device, struct device_attribute *attr,
3055 const char *buf, size_t count)
3056 {
3057 struct ddb *dev = dev_get_drvdata(device);
3058 int num = attr->attr.name[5] - 0x30;
3059 unsigned int val;
3060
3061 if (sscanf(buf, "%u\n", &val) != 1)
3062 return -EINVAL;
3063 if (val > 3)
3064 return -EINVAL;
3065 ddb_lnb_init_fmode(dev, &dev->link[num], val);
3066 return count;
3067 }
3068
3069 static struct device_attribute ddb_attrs[] = {
3070 __ATTR_RO(version),
3071 __ATTR_RO(ports),
3072 __ATTR_RO(ts_irq),
3073 __ATTR_RO(i2c_irq),
3074 __ATTR(gap0, 0664, gap_show, gap_store),
3075 __ATTR(gap1, 0664, gap_show, gap_store),
3076 __ATTR(gap2, 0664, gap_show, gap_store),
3077 __ATTR(gap3, 0664, gap_show, gap_store),
3078 __ATTR(fmode0, 0664, fmode_show, fmode_store),
3079 __ATTR(fmode1, 0664, fmode_show, fmode_store),
3080 __ATTR(fmode2, 0664, fmode_show, fmode_store),
3081 __ATTR(fmode3, 0664, fmode_show, fmode_store),
3082 __ATTR_MRO(devid0, devid_show),
3083 __ATTR_MRO(devid1, devid_show),
3084 __ATTR_MRO(devid2, devid_show),
3085 __ATTR_MRO(devid3, devid_show),
3086 __ATTR_RO(hwid),
3087 __ATTR_RO(regmap),
3088 __ATTR(redirect, 0664, redirect_show, redirect_store),
3089 __ATTR_MRO(snr, bsnr_show),
3090 __ATTR_RO(bpsnr),
3091 __ATTR_NULL,
3092 };
3093
3094 static struct device_attribute ddb_attrs_temp[] = {
3095 __ATTR_RO(temp),
3096 };
3097
3098 static struct device_attribute ddb_attrs_fan[] = {
3099 __ATTR(fan, 0664, fan_show, fan_store),
3100 };
3101
3102 static struct device_attribute ddb_attrs_snr[] = {
3103 __ATTR_MRO(snr0, snr_show),
3104 __ATTR_MRO(snr1, snr_show),
3105 __ATTR_MRO(snr2, snr_show),
3106 __ATTR_MRO(snr3, snr_show),
3107 };
3108
3109 static struct device_attribute ddb_attrs_ctemp[] = {
3110 __ATTR_MRO(temp0, ctemp_show),
3111 __ATTR_MRO(temp1, ctemp_show),
3112 __ATTR_MRO(temp2, ctemp_show),
3113 __ATTR_MRO(temp3, ctemp_show),
3114 };
3115
3116 static struct device_attribute ddb_attrs_led[] = {
3117 __ATTR(led0, 0664, led_show, led_store),
3118 __ATTR(led1, 0664, led_show, led_store),
3119 __ATTR(led2, 0664, led_show, led_store),
3120 __ATTR(led3, 0664, led_show, led_store),
3121 };
3122
3123 static struct device_attribute ddb_attrs_fanspeed[] = {
3124 __ATTR_MRO(fanspeed0, fanspeed_show),
3125 __ATTR_MRO(fanspeed1, fanspeed_show),
3126 __ATTR_MRO(fanspeed2, fanspeed_show),
3127 __ATTR_MRO(fanspeed3, fanspeed_show),
3128 };
3129
3130 static struct class ddb_class = {
3131 .name = "ddbridge",
3132 .owner = THIS_MODULE,
3133 .devnode = ddb_devnode,
3134 };
3135
3136 static int ddb_class_create(void)
3137 {
3138 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops);
3139 if (ddb_major < 0)
3140 return ddb_major;
3141 if (class_register(&ddb_class) < 0)
3142 return -1;
3143 return 0;
3144 }
3145
3146 static void ddb_class_destroy(void)
3147 {
3148 class_unregister(&ddb_class);
3149 unregister_chrdev(ddb_major, DDB_NAME);
3150 }
3151
3152 static void ddb_device_attrs_del(struct ddb *dev)
3153 {
3154 int i;
3155
3156 for (i = 0; i < 4; i++)
3157 if (dev->link[i].info && dev->link[i].info->tempmon_irq)
3158 device_remove_file(dev->ddb_dev,
3159 &ddb_attrs_fanspeed[i]);
3160 for (i = 0; i < dev->link[0].info->temp_num; i++)
3161 device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]);
3162 for (i = 0; i < dev->link[0].info->fan_num; i++)
3163 device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]);
3164 for (i = 0; i < dev->i2c_num && i < 4; i++) {
3165 if (dev->link[0].info->led_num)
3166 device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]);
3167 device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]);
3168 device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]);
3169 }
3170 for (i = 0; ddb_attrs[i].attr.name; i++)
3171 device_remove_file(dev->ddb_dev, &ddb_attrs[i]);
3172 }
3173
3174 static int ddb_device_attrs_add(struct ddb *dev)
3175 {
3176 int i;
3177
3178 for (i = 0; ddb_attrs[i].attr.name; i++)
3179 if (device_create_file(dev->ddb_dev, &ddb_attrs[i]))
3180 goto fail;
3181 for (i = 0; i < dev->link[0].info->temp_num; i++)
3182 if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i]))
3183 goto fail;
3184 for (i = 0; i < dev->link[0].info->fan_num; i++)
3185 if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i]))
3186 goto fail;
3187 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) {
3188 if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i]))
3189 goto fail;
3190 if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i]))
3191 goto fail;
3192 if (dev->link[0].info->led_num)
3193 if (device_create_file(dev->ddb_dev,
3194 &ddb_attrs_led[i]))
3195 goto fail;
3196 }
3197 for (i = 0; i < 4; i++)
3198 if (dev->link[i].info && dev->link[i].info->tempmon_irq)
3199 if (device_create_file(dev->ddb_dev,
3200 &ddb_attrs_fanspeed[i]))
3201 goto fail;
3202 return 0;
3203 fail:
3204 return -1;
3205 }
3206
3207 int ddb_device_create(struct ddb *dev)
3208 {
3209 int res = 0;
3210
3211 if (ddb_num == DDB_MAX_ADAPTER)
3212 return -ENOMEM;
3213 mutex_lock(&ddb_mutex);
3214 dev->nr = ddb_num;
3215 ddbs[dev->nr] = dev;
3216 dev->ddb_dev = device_create(&ddb_class, dev->dev,
3217 MKDEV(ddb_major, dev->nr),
3218 dev, "ddbridge%d", dev->nr);
3219 if (IS_ERR(dev->ddb_dev)) {
3220 res = PTR_ERR(dev->ddb_dev);
3221 dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr);
3222 goto fail;
3223 }
3224 res = ddb_device_attrs_add(dev);
3225 if (res) {
3226 ddb_device_attrs_del(dev);
3227 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
3228 ddbs[dev->nr] = NULL;
3229 dev->ddb_dev = ERR_PTR(-ENODEV);
3230 } else {
3231 ddb_num++;
3232 }
3233 fail:
3234 mutex_unlock(&ddb_mutex);
3235 return res;
3236 }
3237
3238 void ddb_device_destroy(struct ddb *dev)
3239 {
3240 if (IS_ERR(dev->ddb_dev))
3241 return;
3242 ddb_device_attrs_del(dev);
3243 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
3244 }
3245
3246 /****************************************************************************/
3247 /****************************************************************************/
3248 /****************************************************************************/
3249
3250 static void tempmon_setfan(struct ddb_link *link)
3251 {
3252 u32 temp, temp2, pwm;
3253
3254 if ((ddblreadl(link, TEMPMON_CONTROL) &
3255 TEMPMON_CONTROL_OVERTEMP) != 0) {
3256 dev_info(link->dev->dev, "Over temperature condition\n");
3257 link->overtemperature_error = 1;
3258 }
3259 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF;
3260 if (temp & 0x80)
3261 temp = 0;
3262 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF;
3263 if (temp2 & 0x80)
3264 temp2 = 0;
3265 if (temp2 > temp)
3266 temp = temp2;
3267
3268 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F;
3269 if (pwm > 10)
3270 pwm = 10;
3271
3272 if (temp >= link->temp_tab[pwm]) {
3273 while (pwm < 10 && temp >= link->temp_tab[pwm + 1])
3274 pwm += 1;
3275 } else {
3276 while (pwm > 1 && temp < link->temp_tab[pwm - 2])
3277 pwm -= 1;
3278 }
3279 ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
3280 }
3281
3282 static void temp_handler(void *data)
3283 {
3284 struct ddb_link *link = (struct ddb_link *)data;
3285
3286 spin_lock(&link->temp_lock);
3287 tempmon_setfan(link);
3288 spin_unlock(&link->temp_lock);
3289 }
3290
3291 static int tempmon_init(struct ddb_link *link, int first_time)
3292 {
3293 struct ddb *dev = link->dev;
3294 int status = 0;
3295 u32 l = link->nr;
3296
3297 spin_lock_irq(&link->temp_lock);
3298 if (first_time) {
3299 static u8 temperature_table[11] = {
3300 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 };
3301
3302 memcpy(link->temp_tab, temperature_table,
3303 sizeof(temperature_table));
3304 }
3305 ddb_irq_set(dev, l, link->info->tempmon_irq, temp_handler, link);
3306 ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN |
3307 TEMPMON_CONTROL_INTENABLE),
3308 TEMPMON_CONTROL);
3309 ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
3310
3311 link->overtemperature_error =
3312 ((ddblreadl(link, TEMPMON_CONTROL) &
3313 TEMPMON_CONTROL_OVERTEMP) != 0);
3314 if (link->overtemperature_error) {
3315 dev_info(link->dev->dev, "Over temperature condition\n");
3316 status = -1;
3317 }
3318 tempmon_setfan(link);
3319 spin_unlock_irq(&link->temp_lock);
3320 return status;
3321 }
3322
3323 static int ddb_init_tempmon(struct ddb_link *link)
3324 {
3325 const struct ddb_info *info = link->info;
3326
3327 if (!info->tempmon_irq)
3328 return 0;
3329 if (info->type == DDB_OCTOPUS_MAX_CT)
3330 if (link->ids.regmapid < 0x00010002)
3331 return 0;
3332 spin_lock_init(&link->temp_lock);
3333 dev_dbg(link->dev->dev, "init_tempmon\n");
3334 return tempmon_init(link, 1);
3335 }
3336
3337 /****************************************************************************/
3338 /****************************************************************************/
3339 /****************************************************************************/
3340
3341 static int ddb_init_boards(struct ddb *dev)
3342 {
3343 const struct ddb_info *info;
3344 struct ddb_link *link;
3345 u32 l;
3346
3347 for (l = 0; l < DDB_MAX_LINK; l++) {
3348 link = &dev->link[l];
3349 info = link->info;
3350
3351 if (!info)
3352 continue;
3353 if (info->board_control) {
3354 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL);
3355 msleep(100);
3356 ddbwritel(dev, info->board_control_2,
3357 DDB_LINK_TAG(l) | BOARD_CONTROL);
3358 usleep_range(2000, 3000);
3359 ddbwritel(dev,
3360 info->board_control_2 | info->board_control,
3361 DDB_LINK_TAG(l) | BOARD_CONTROL);
3362 usleep_range(2000, 3000);
3363 }
3364 ddb_init_tempmon(link);
3365 }
3366 return 0;
3367 }
3368
3369 int ddb_init(struct ddb *dev)
3370 {
3371 mutex_init(&dev->link[0].lnb.lock);
3372 mutex_init(&dev->link[0].flash_mutex);
3373 if (no_init) {
3374 ddb_device_create(dev);
3375 return 0;
3376 }
3377
3378 ddb_init_boards(dev);
3379
3380 if (ddb_i2c_init(dev) < 0)
3381 goto fail1;
3382 ddb_ports_init(dev);
3383 if (ddb_buffers_alloc(dev) < 0) {
3384 dev_info(dev->dev, "Could not allocate buffer memory\n");
3385 goto fail2;
3386 }
3387 if (ddb_ports_attach(dev) < 0)
3388 goto fail3;
3389
3390 ddb_device_create(dev);
3391
3392 if (dev->link[0].info->fan_num) {
3393 ddbwritel(dev, 1, GPIO_DIRECTION);
3394 ddbwritel(dev, 1, GPIO_OUTPUT);
3395 }
3396 return 0;
3397
3398 fail3:
3399 dev_err(dev->dev, "fail3\n");
3400 ddb_ports_detach(dev);
3401 ddb_buffers_free(dev);
3402 fail2:
3403 dev_err(dev->dev, "fail2\n");
3404 ddb_ports_release(dev);
3405 ddb_i2c_release(dev);
3406 fail1:
3407 dev_err(dev->dev, "fail1\n");
3408 return -1;
3409 }
3410
3411 void ddb_unmap(struct ddb *dev)
3412 {
3413 if (dev->regs)
3414 iounmap(dev->regs);
3415 vfree(dev);
3416 }
3417
3418 int ddb_exit_ddbridge(int stage, int error)
3419 {
3420 switch (stage) {
3421 default:
3422 case 2:
3423 destroy_workqueue(ddb_wq);
3424 /* fall-through */
3425 case 1:
3426 ddb_class_destroy();
3427 break;
3428 }
3429
3430 return error;
3431 }
3432
3433 int ddb_init_ddbridge(void)
3434 {
3435 if (dma_buf_num < 8)
3436 dma_buf_num = 8;
3437 if (dma_buf_num > 32)
3438 dma_buf_num = 32;
3439 if (dma_buf_size < 1)
3440 dma_buf_size = 1;
3441 if (dma_buf_size > 43)
3442 dma_buf_size = 43;
3443
3444 if (ddb_class_create() < 0)
3445 return -1;
3446 ddb_wq = alloc_workqueue("ddbridge", 0, 0);
3447 if (!ddb_wq)
3448 return ddb_exit_ddbridge(1, -1);
3449
3450 return 0;
3451 }
Linux with added FPC-III support