drivers/media/pci/ddbridge/ddbridge.h

   1 /*
   2  * ddbridge.h: Digital Devices PCIe bridge driver
   3  *
   4  * Copyright (C) 2010-2017 Digital Devices GmbH
   5  *                         Ralph Metzler <rmetzler@digitaldevices.de>
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * version 2 only, as published by the Free Software Foundation.
  10  *
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * To obtain the license, point your browser to
  18  * http://www.gnu.org/copyleft/gpl.html
  19  */
  20
  21 #ifndef _DDBRIDGE_H_
  22 #define _DDBRIDGE_H_
  23
  24 #include <linux/module.h>
  25 #include <linux/init.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/delay.h>
  28 #include <linux/slab.h>
  29 #include <linux/poll.h>
  30 #include <linux/io.h>
  31 #include <linux/pci.h>
  32 #include <linux/timer.h>
  33 #include <linux/i2c.h>
  34 #include <linux/swab.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/workqueue.h>
  37 #include <linux/kthread.h>
  38 #include <linux/platform_device.h>
  39 #include <linux/clk.h>
  40 #include <linux/spi/spi.h>
  41 #include <linux/gpio.h>
  42 #include <linux/completion.h>
  43
  44 #include <linux/types.h>
  45 #include <linux/sched.h>
  46 #include <linux/interrupt.h>
  47 #include <linux/mutex.h>
  48 #include <asm/dma.h>
  49 #include <asm/irq.h>
  50 #include <linux/io.h>
  51 #include <linux/uaccess.h>
  52
  53 #include <linux/dvb/ca.h>
  54 #include <linux/socket.h>
  55 #include <linux/device.h>
  56 #include <linux/io.h>
  57
  58 #include <media/dmxdev.h>
  59 #include <media/dvbdev.h>
  60 #include <media/dvb_demux.h>
  61 #include <media/dvb_frontend.h>
  62 #include <media/dvb_ringbuffer.h>
  63 #include <media/dvb_ca_en50221.h>
  64 #include <media/dvb_net.h>
  65
  66 #define DDBRIDGE_VERSION "0.9.33-integrated"
  67
  68 #define DDB_MAX_I2C    32
  69 #define DDB_MAX_PORT   32
  70 #define DDB_MAX_INPUT  64
  71 #define DDB_MAX_OUTPUT 32
  72 #define DDB_MAX_LINK    4
  73 #define DDB_LINK_SHIFT 28
  74
  75 #define DDB_LINK_TAG(_x) (_x << DDB_LINK_SHIFT)
  76
  77 struct ddb_regset {
  78         u32 base;
  79         u32 num;
  80         u32 size;
  81 };
  82
  83 struct ddb_regmap {
  84         u32 irq_base_i2c;
  85         u32 irq_base_idma;
  86         u32 irq_base_odma;
  87
  88         const struct ddb_regset *i2c;
  89         const struct ddb_regset *i2c_buf;
  90         const struct ddb_regset *idma;
  91         const struct ddb_regset *idma_buf;
  92         const struct ddb_regset *odma;
  93         const struct ddb_regset *odma_buf;
  94
  95         const struct ddb_regset *input;
  96         const struct ddb_regset *output;
  97
  98         const struct ddb_regset *channel;
  99 };
 100
 101 struct ddb_ids {
 102         u16 vendor;
 103         u16 device;
 104         u16 subvendor;
 105         u16 subdevice;
 106
 107         u32 hwid;
 108         u32 regmapid;
 109         u32 devid;
 110         u32 mac;
 111 };
 112
 113 struct ddb_info {
 114         int   type;
 115 #define DDB_NONE            0
 116 #define DDB_OCTOPUS         1
 117 #define DDB_OCTOPUS_CI      2
 118 #define DDB_OCTOPUS_MAX     5
 119 #define DDB_OCTOPUS_MAX_CT  6
 120 #define DDB_OCTOPUS_MCI     9
 121         char *name;
 122         u32   i2c_mask;
 123         u32   board_control;
 124         u32   board_control_2;
 125
 126         u8    port_num;
 127         u8    led_num;
 128         u8    fan_num;
 129         u8    temp_num;
 130         u8    temp_bus;
 131         u8    con_clock; /* use a continuous clock */
 132         u8    ts_quirks;
 133 #define TS_QUIRK_SERIAL   1
 134 #define TS_QUIRK_REVERSED 2
 135 #define TS_QUIRK_ALT_OSC  8
 136         u8    mci_ports;
 137         u8    mci_type;
 138
 139         u32   tempmon_irq;
 140         const struct ddb_regmap *regmap;
 141 };
 142
 143 #define DMA_MAX_BUFS 32      /* hardware table limit */
 144
 145 struct ddb;
 146 struct ddb_port;
 147
 148 struct ddb_dma {
 149         void                  *io;
 150         u32                    regs;
 151         u32                    bufregs;
 152
 153         dma_addr_t             pbuf[DMA_MAX_BUFS];
 154         u8                    *vbuf[DMA_MAX_BUFS];
 155         u32                    num;
 156         u32                    size;
 157         u32                    div;
 158         u32                    bufval;
 159
 160         struct work_struct     work;
 161         spinlock_t             lock; /* DMA lock */
 162         wait_queue_head_t      wq;
 163         int                    running;
 164         u32                    stat;
 165         u32                    ctrl;
 166         u32                    cbuf;
 167         u32                    coff;
 168 };
 169
 170 struct ddb_dvb {
 171         struct dvb_adapter    *adap;
 172         int                    adap_registered;
 173         struct dvb_device     *dev;
 174         struct i2c_client     *i2c_client[1];
 175         struct dvb_frontend   *fe;
 176         struct dvb_frontend   *fe2;
 177         struct dmxdev          dmxdev;
 178         struct dvb_demux       demux;
 179         struct dvb_net         dvbnet;
 180         struct dmx_frontend    hw_frontend;
 181         struct dmx_frontend    mem_frontend;
 182         int                    users;
 183         u32                    attached;
 184         u8                     input;
 185
 186         enum fe_sec_tone_mode  tone;
 187         enum fe_sec_voltage    voltage;
 188
 189         int (*i2c_gate_ctrl)(struct dvb_frontend *, int);
 190         int (*set_voltage)(struct dvb_frontend *fe,
 191                            enum fe_sec_voltage voltage);
 192         int (*set_input)(struct dvb_frontend *fe, int input);
 193         int (*diseqc_send_master_cmd)(struct dvb_frontend *fe,
 194                                       struct dvb_diseqc_master_cmd *cmd);
 195 };
 196
 197 struct ddb_ci {
 198         struct dvb_ca_en50221  en;
 199         struct ddb_port       *port;
 200         u32                    nr;
 201 };
 202
 203 struct ddb_io {
 204         struct ddb_port       *port;
 205         u32                    nr;
 206         u32                    regs;
 207         struct ddb_dma        *dma;
 208         struct ddb_io         *redo;
 209         struct ddb_io         *redi;
 210 };
 211
 212 #define ddb_output ddb_io
 213 #define ddb_input ddb_io
 214
 215 struct ddb_i2c {
 216         struct ddb            *dev;
 217         u32                    nr;
 218         u32                    regs;
 219         u32                    link;
 220         struct i2c_adapter     adap;
 221         u32                    rbuf;
 222         u32                    wbuf;
 223         u32                    bsize;
 224         struct completion      completion;
 225 };
 226
 227 struct ddb_port {
 228         struct ddb            *dev;
 229         u32                    nr;
 230         u32                    pnr;
 231         u32                    regs;
 232         u32                    lnr;
 233         struct ddb_i2c        *i2c;
 234         struct mutex           i2c_gate_lock; /* I2C access lock */
 235         u32                    class;
 236 #define DDB_PORT_NONE           0
 237 #define DDB_PORT_CI             1
 238 #define DDB_PORT_TUNER          2
 239 #define DDB_PORT_LOOP           3
 240         char                   *name;
 241         char                   *type_name;
 242         u32                     type;
 243 #define DDB_TUNER_DUMMY          0xffffffff
 244 #define DDB_TUNER_NONE           0
 245 #define DDB_TUNER_DVBS_ST        1
 246 #define DDB_TUNER_DVBS_ST_AA     2
 247 #define DDB_TUNER_DVBCT_TR       3
 248 #define DDB_TUNER_DVBCT_ST       4
 249 #define DDB_CI_INTERNAL          5
 250 #define DDB_CI_EXTERNAL_SONY     6
 251 #define DDB_TUNER_DVBCT2_SONY_P  7
 252 #define DDB_TUNER_DVBC2T2_SONY_P 8
 253 #define DDB_TUNER_ISDBT_SONY_P   9
 254 #define DDB_TUNER_DVBS_STV0910_P 10
 255 #define DDB_TUNER_MXL5XX         11
 256 #define DDB_CI_EXTERNAL_XO2      12
 257 #define DDB_CI_EXTERNAL_XO2_B    13
 258 #define DDB_TUNER_DVBS_STV0910_PR 14
 259 #define DDB_TUNER_DVBC2T2I_SONY_P 15
 260
 261 #define DDB_TUNER_XO2            32
 262 #define DDB_TUNER_DVBS_STV0910   (DDB_TUNER_XO2 + 0)
 263 #define DDB_TUNER_DVBCT2_SONY    (DDB_TUNER_XO2 + 1)
 264 #define DDB_TUNER_ISDBT_SONY     (DDB_TUNER_XO2 + 2)
 265 #define DDB_TUNER_DVBC2T2_SONY   (DDB_TUNER_XO2 + 3)
 266 #define DDB_TUNER_ATSC_ST        (DDB_TUNER_XO2 + 4)
 267 #define DDB_TUNER_DVBC2T2I_SONY  (DDB_TUNER_XO2 + 5)
 268
 269 #define DDB_TUNER_MCI            48
 270 #define DDB_TUNER_MCI_SX8        (DDB_TUNER_MCI + 0)
 271
 272         struct ddb_input      *input[2];
 273         struct ddb_output     *output;
 274         struct dvb_ca_en50221 *en;
 275         u8                     en_freedata;
 276         struct ddb_dvb         dvb[2];
 277         u32                    gap;
 278         u32                    obr;
 279         u8                     creg;
 280 };
 281
 282 #define CM_STARTUP_DELAY 2
 283 #define CM_AVERAGE  20
 284 #define CM_GAIN     10
 285
 286 #define HW_LSB_SHIFT    12
 287 #define HW_LSB_MASK     0x1000
 288
 289 #define CM_IDLE    0
 290 #define CM_STARTUP 1
 291 #define CM_ADJUST  2
 292
 293 #define TS_CAPTURE_LEN  (4096)
 294
 295 struct ddb_lnb {
 296         struct mutex           lock; /* lock lnb access */
 297         u32                    tone;
 298         enum fe_sec_voltage    oldvoltage[4];
 299         u32                    voltage[4];
 300         u32                    voltages;
 301         u32                    fmode;
 302 };
 303
 304 struct ddb_irq {
 305         void                   (*handler)(void *);
 306         void                  *data;
 307 };
 308
 309 struct ddb_link {
 310         struct ddb            *dev;
 311         const struct ddb_info *info;
 312         u32                    nr;
 313         u32                    regs;
 314         spinlock_t             lock; /* lock link access */
 315         struct mutex           flash_mutex; /* lock flash access */
 316         struct ddb_lnb         lnb;
 317         struct tasklet_struct  tasklet;
 318         struct ddb_ids         ids;
 319
 320         spinlock_t             temp_lock; /* lock temp chip access */
 321         int                    overtemperature_error;
 322         u8                     temp_tab[11];
 323         struct ddb_irq         irq[256];
 324 };
 325
 326 struct ddb {
 327         struct pci_dev          *pdev;
 328         struct platform_device  *pfdev;
 329         struct device           *dev;
 330
 331         int                      msi;
 332         struct workqueue_struct *wq;
 333         u32                      has_dma;
 334
 335         struct ddb_link          link[DDB_MAX_LINK];
 336         unsigned char __iomem   *regs;
 337         u32                      regs_len;
 338         u32                      port_num;
 339         struct ddb_port          port[DDB_MAX_PORT];
 340         u32                      i2c_num;
 341         struct ddb_i2c           i2c[DDB_MAX_I2C];
 342         struct ddb_input         input[DDB_MAX_INPUT];
 343         struct ddb_output        output[DDB_MAX_OUTPUT];
 344         struct dvb_adapter       adap[DDB_MAX_INPUT];
 345         struct ddb_dma           idma[DDB_MAX_INPUT];
 346         struct ddb_dma           odma[DDB_MAX_OUTPUT];
 347
 348         struct device           *ddb_dev;
 349         u32                      ddb_dev_users;
 350         u32                      nr;
 351         u8                       iobuf[1028];
 352
 353         u8                       leds;
 354         u32                      ts_irq;
 355         u32                      i2c_irq;
 356
 357         struct mutex             mutex; /* lock access to global ddb array */
 358
 359         u8                       tsbuf[TS_CAPTURE_LEN];
 360 };
 361
 362 /****************************************************************************/
 363 /****************************************************************************/
 364 /****************************************************************************/
 365
 366 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
 367
 368 /****************************************************************************/
 369
 370 /* ddbridge-core.c */
 371 struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr,
 372                             void (*handler)(void *), void *data);
 373 void ddb_ports_detach(struct ddb *dev);
 374 void ddb_ports_release(struct ddb *dev);
 375 void ddb_buffers_free(struct ddb *dev);
 376 void ddb_device_destroy(struct ddb *dev);
 377 irqreturn_t ddb_irq_handler0(int irq, void *dev_id);
 378 irqreturn_t ddb_irq_handler1(int irq, void *dev_id);
 379 irqreturn_t ddb_irq_handler(int irq, void *dev_id);
 380 void ddb_ports_init(struct ddb *dev);
 381 int ddb_buffers_alloc(struct ddb *dev);
 382 int ddb_ports_attach(struct ddb *dev);
 383 int ddb_device_create(struct ddb *dev);
 384 int ddb_init(struct ddb *dev);
 385 void ddb_unmap(struct ddb *dev);
 386 int ddb_exit_ddbridge(int stage, int error);
 387 int ddb_init_ddbridge(void);
 388
 389 #endif /* DDBRIDGE_H */