2 * tw68-reg.h - TW68xx register offsets
4 * Much of this code is derived from the cx88 and sa7134 drivers, which
5 * were in turn derived from the bt87x driver. The original work was by
6 * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
7 * Hans Verkuil, Andy Walls and many others. Their work is gratefully
8 * acknowledged. Full credit goes to them - any problems within this code
11 * Copyright (C) William M. Brack
13 * Refactored and updated to the latest v4l core frameworks:
15 * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
17 * This program is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License as published by
19 * the Free Software Foundation; either version 2 of the License, or
20 * (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
31 /* ---------------------------------------------------------------------- */
32 #define TW68_DMAC 0x000
33 #define TW68_DMAP_SA 0x004
34 #define TW68_DMAP_EXE 0x008
35 #define TW68_DMAP_PP 0x00c
36 #define TW68_VBIC 0x010
37 #define TW68_SBUSC 0x014
38 #define TW68_SBUSSD 0x018
39 #define TW68_INTSTAT 0x01C
40 #define TW68_INTMASK 0x020
41 #define TW68_GPIOC 0x024
42 #define TW68_GPOE 0x028
43 #define TW68_TESTREG 0x02C
44 #define TW68_SBUSRD 0x030
45 #define TW68_SBUS_TRIG 0x034
46 #define TW68_CAP_CTL 0x040
47 #define TW68_SUBSYS 0x054
48 #define TW68_I2C_RST 0x064
49 #define TW68_VBIINST 0x06C
50 /* define bits in FIFO and DMAP Control reg */
51 #define TW68_DMAP_EN (1 << 0)
52 #define TW68_FIFO_EN (1 << 1)
53 /* define the Interrupt Status Register bits */
54 #define TW68_SBDONE (1 << 0)
55 #define TW68_DMAPI (1 << 1)
56 #define TW68_GPINT (1 << 2)
57 #define TW68_FFOF (1 << 3)
58 #define TW68_FDMIS (1 << 4)
59 #define TW68_DMAPERR (1 << 5)
60 #define TW68_PABORT (1 << 6)
61 #define TW68_SBDONE2 (1 << 12)
62 #define TW68_SBERR2 (1 << 13)
63 #define TW68_PPERR (1 << 14)
64 #define TW68_FFERR (1 << 15)
65 #define TW68_DET50 (1 << 16)
66 #define TW68_FLOCK (1 << 17)
67 #define TW68_CCVALID (1 << 18)
68 #define TW68_VLOCK (1 << 19)
69 #define TW68_FIELD (1 << 20)
70 #define TW68_SLOCK (1 << 21)
71 #define TW68_HLOCK (1 << 22)
72 #define TW68_VDLOSS (1 << 23)
73 #define TW68_SBERR (1 << 24)
74 /* define the i2c control register bits */
75 #define TW68_SBMODE (0)
77 #define TW68_SSCLK (6)
78 #define TW68_SSDAT (7)
79 #define TW68_SBCLK (8)
80 #define TW68_WDLEN (16)
81 #define TW68_RDLEN (20)
82 #define TW68_SBRW (24)
83 #define TW68_SBDEV (25)
85 #define TW68_SBMODE_B (1 << TW68_SBMODE)
86 #define TW68_WREN_B (1 << TW68_WREN)
87 #define TW68_SSCLK_B (1 << TW68_SSCLK)
88 #define TW68_SSDAT_B (1 << TW68_SSDAT)
89 #define TW68_SBRW_B (1 << TW68_SBRW)
91 #define TW68_GPDATA 0x100
92 #define TW68_STATUS1 0x204
93 #define TW68_INFORM 0x208
94 #define TW68_OPFORM 0x20C
95 #define TW68_HSYNC 0x210
96 #define TW68_ACNTL 0x218
97 #define TW68_CROP_HI 0x21C
98 #define TW68_VDELAY_LO 0x220
99 #define TW68_VACTIVE_LO 0x224
100 #define TW68_HDELAY_LO 0x228
101 #define TW68_HACTIVE_LO 0x22C
102 #define TW68_CNTRL1 0x230
103 #define TW68_VSCALE_LO 0x234
104 #define TW68_SCALE_HI 0x238
105 #define TW68_HSCALE_LO 0x23C
106 #define TW68_BRIGHT 0x240
107 #define TW68_CONTRAST 0x244
108 #define TW68_SHARPNESS 0x248
109 #define TW68_SAT_U 0x24C
110 #define TW68_SAT_V 0x250
111 #define TW68_HUE 0x254
112 #define TW68_SHARP2 0x258
113 #define TW68_VSHARP 0x25C
114 #define TW68_CORING 0x260
115 #define TW68_VBICNTL 0x264
116 #define TW68_CNTRL2 0x268
117 #define TW68_CC_DATA 0x26C
118 #define TW68_SDT 0x270
119 #define TW68_SDTR 0x274
120 #define TW68_RESERV2 0x278
121 #define TW68_RESERV3 0x27C
122 #define TW68_CLMPG 0x280
123 #define TW68_IAGC 0x284
124 #define TW68_AGCGAIN 0x288
125 #define TW68_PEAKWT 0x28C
126 #define TW68_CLMPL 0x290
127 #define TW68_SYNCT 0x294
128 #define TW68_MISSCNT 0x298
129 #define TW68_PCLAMP 0x29C
130 #define TW68_VCNTL1 0x2A0
131 #define TW68_VCNTL2 0x2A4
132 #define TW68_CKILL 0x2A8
133 #define TW68_COMB 0x2AC
134 #define TW68_LDLY 0x2B0
135 #define TW68_MISC1 0x2B4
136 #define TW68_LOOP 0x2B8
137 #define TW68_MISC2 0x2BC
138 #define TW68_MVSN 0x2C0
139 #define TW68_STATUS2 0x2C4
140 #define TW68_HFREF 0x2C8
141 #define TW68_CLMD 0x2CC
142 #define TW68_IDCNTL 0x2D0
143 #define TW68_CLCNTL1 0x2D4
146 #define TW68_ACKI1 0x300
147 #define TW68_ACKI2 0x304
148 #define TW68_ACKI3 0x308
149 #define TW68_ACKN1 0x30C
150 #define TW68_ACKN2 0x310
151 #define TW68_ACKN3 0x314
152 #define TW68_SDIV 0x318
153 #define TW68_LRDIV 0x31C
154 #define TW68_ACCNTL 0x320
156 #define TW68_VSCTL 0x3B8
157 #define TW68_CHROMAGVAL 0x3BC
159 #define TW68_F2CROP_HI 0x3DC
160 #define TW68_F2VDELAY_LO 0x3E0
161 #define TW68_F2VACTIVE_LO 0x3E4
162 #define TW68_F2HDELAY_LO 0x3E8
163 #define TW68_F2HACTIVE_LO 0x3EC
164 #define TW68_F2CNT 0x3F0
165 #define TW68_F2VSCALE_LO 0x3F4
166 #define TW68_F2SCALE_HI 0x3F8
167 #define TW68_F2HSCALE_LO 0x3FC
169 #define RISC_INT_BIT 0x08000000
170 #define RISC_SYNCO 0xC0000000
171 #define RISC_SYNCE 0xD0000000
172 #define RISC_JUMP 0xB0000000
173 #define RISC_LINESTART 0x90000000
174 #define RISC_INLINE 0xA0000000
176 #define VideoFormatNTSC 0
177 #define VideoFormatNTSCJapan 0
178 #define VideoFormatPALBDGHI 1
179 #define VideoFormatSECAM 2
180 #define VideoFormatNTSC443 3
181 #define VideoFormatPALM 4
182 #define VideoFormatPALN 5
183 #define VideoFormatPALNC 5
184 #define VideoFormatPAL60 6
185 #define VideoFormatAuto 7
187 #define ColorFormatRGB32 0x00
188 #define ColorFormatRGB24 0x10
189 #define ColorFormatRGB16 0x20
190 #define ColorFormatRGB15 0x30
191 #define ColorFormatYUY2 0x40
192 #define ColorFormatBSWAP 0x04
193 #define ColorFormatWSWAP 0x08
194 #define ColorFormatGamma 0x80