4 * Normal mappings of chips in physical memory
7 #include <linux/module.h>
8 #include <linux/types.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/map.h>
15 #include <linux/mtd/cfi.h>
16 #include <linux/mtd/flashchip.h>
17 #include <linux/pci.h>
18 #include <linux/pci_ids.h>
19 #include <linux/list.h>
21 #define xstr(s) str(s)
23 #define MOD_NAME xstr(KBUILD_BASENAME)
25 #define ADDRESS_NAME_LEN 18
27 #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
29 #define BIOS_CNTL 0x4e
30 #define FWH_DEC_EN1 0xE3
31 #define FWH_DEC_EN2 0xF0
35 struct ichxrom_window
{
39 struct list_head maps
;
44 struct ichxrom_map_info
{
45 struct list_head list
;
49 char map_name
[sizeof(MOD_NAME
) + 2 + ADDRESS_NAME_LEN
];
52 static struct ichxrom_window ichxrom_window
= {
53 .maps
= LIST_HEAD_INIT(ichxrom_window
.maps
),
56 static void ichxrom_cleanup(struct ichxrom_window
*window
)
58 struct ichxrom_map_info
*map
, *scratch
;
62 /* Disable writes through the rom window */
63 ret
= pci_read_config_word(window
->pdev
, BIOS_CNTL
, &word
);
65 pci_write_config_word(window
->pdev
, BIOS_CNTL
, word
& ~1);
66 pci_dev_put(window
->pdev
);
68 /* Free all of the mtd devices */
69 list_for_each_entry_safe(map
, scratch
, &window
->maps
, list
) {
71 release_resource(&map
->rsrc
);
72 mtd_device_unregister(map
->mtd
);
73 map_destroy(map
->mtd
);
77 if (window
->rsrc
.parent
)
78 release_resource(&window
->rsrc
);
80 iounmap(window
->virt
);
89 static int __init
ichxrom_init_one(struct pci_dev
*pdev
,
90 const struct pci_device_id
*ent
)
92 static char *rom_probe_types
[] = { "cfi_probe", "jedec_probe", NULL
};
93 struct ichxrom_window
*window
= &ichxrom_window
;
94 struct ichxrom_map_info
*map
= NULL
;
95 unsigned long map_top
;
99 /* For now I just handle the ichx and I assume there
100 * are not a lot of resources up at the top of the address
101 * space. It is possible to handle other devices in the
102 * top 16MB but it is very painful. Also since
103 * you can only really attach a FWH to an ICHX there
104 * a number of simplifications you can make.
106 * Also you can page firmware hubs if an 8MB window isn't enough
107 * but don't currently handle that case either.
111 /* Find a region continuous to the end of the ROM window */
113 pci_read_config_byte(pdev
, FWH_DEC_EN1
, &byte
);
115 window
->phys
= 0xffc00000;
116 pci_read_config_byte(pdev
, FWH_DEC_EN2
, &byte
);
117 if ((byte
& 0x0f) == 0x0f) {
118 window
->phys
= 0xff400000;
120 else if ((byte
& 0x0e) == 0x0e) {
121 window
->phys
= 0xff500000;
123 else if ((byte
& 0x0c) == 0x0c) {
124 window
->phys
= 0xff600000;
126 else if ((byte
& 0x08) == 0x08) {
127 window
->phys
= 0xff700000;
130 else if ((byte
& 0xfe) == 0xfe) {
131 window
->phys
= 0xffc80000;
133 else if ((byte
& 0xfc) == 0xfc) {
134 window
->phys
= 0xffd00000;
136 else if ((byte
& 0xf8) == 0xf8) {
137 window
->phys
= 0xffd80000;
139 else if ((byte
& 0xf0) == 0xf0) {
140 window
->phys
= 0xffe00000;
142 else if ((byte
& 0xe0) == 0xe0) {
143 window
->phys
= 0xffe80000;
145 else if ((byte
& 0xc0) == 0xc0) {
146 window
->phys
= 0xfff00000;
148 else if ((byte
& 0x80) == 0x80) {
149 window
->phys
= 0xfff80000;
152 if (window
->phys
== 0) {
153 printk(KERN_ERR MOD_NAME
": Rom window is closed\n");
156 window
->phys
-= 0x400000UL
;
157 window
->size
= (0xffffffffUL
- window
->phys
) + 1UL;
159 /* Enable writes through the rom window */
160 pci_read_config_word(pdev
, BIOS_CNTL
, &word
);
161 if (!(word
& 1) && (word
& (1<<1))) {
162 /* The BIOS will generate an error if I enable
163 * this device, so don't even try.
165 printk(KERN_ERR MOD_NAME
": firmware access control, I can't enable writes\n");
168 pci_write_config_word(pdev
, BIOS_CNTL
, word
| 1);
171 * Try to reserve the window mem region. If this fails then
172 * it is likely due to the window being "reserved" by the BIOS.
174 window
->rsrc
.name
= MOD_NAME
;
175 window
->rsrc
.start
= window
->phys
;
176 window
->rsrc
.end
= window
->phys
+ window
->size
- 1;
177 window
->rsrc
.flags
= IORESOURCE_MEM
| IORESOURCE_BUSY
;
178 if (request_resource(&iomem_resource
, &window
->rsrc
)) {
179 window
->rsrc
.parent
= NULL
;
180 printk(KERN_DEBUG MOD_NAME
": "
181 "%s(): Unable to register resource %pR - kernel bug?\n",
182 __func__
, &window
->rsrc
);
185 /* Map the firmware hub into my address space. */
186 window
->virt
= ioremap_nocache(window
->phys
, window
->size
);
188 printk(KERN_ERR MOD_NAME
": ioremap(%08lx, %08lx) failed\n",
189 window
->phys
, window
->size
);
193 /* Get the first address to look for an rom chip at */
194 map_top
= window
->phys
;
195 if ((window
->phys
& 0x3fffff) != 0) {
196 map_top
= window
->phys
+ 0x400000;
199 /* The probe sequence run over the firmware hub lock
200 * registers sets them to 0x7 (no access).
201 * Probe at most the last 4M of the address space.
203 if (map_top
< 0xffc00000) {
204 map_top
= 0xffc00000;
207 /* Loop through and look for rom chips */
208 while((map_top
- 1) < 0xffffffffUL
) {
209 struct cfi_private
*cfi
;
210 unsigned long offset
;
214 map
= kmalloc(sizeof(*map
), GFP_KERNEL
);
217 printk(KERN_ERR MOD_NAME
": kmalloc failed");
220 memset(map
, 0, sizeof(*map
));
221 INIT_LIST_HEAD(&map
->list
);
222 map
->map
.name
= map
->map_name
;
223 map
->map
.phys
= map_top
;
224 offset
= map_top
- window
->phys
;
225 map
->map
.virt
= (void __iomem
*)
226 (((unsigned long)(window
->virt
)) + offset
);
227 map
->map
.size
= 0xffffffffUL
- map_top
+ 1UL;
228 /* Set the name of the map to the address I am trying */
229 sprintf(map
->map_name
, "%s @%08Lx",
230 MOD_NAME
, (unsigned long long)map
->map
.phys
);
232 /* Firmware hubs only use vpp when being programmed
233 * in a factory setting. So in-place programming
234 * needs to use a different method.
236 for(map
->map
.bankwidth
= 32; map
->map
.bankwidth
;
237 map
->map
.bankwidth
>>= 1)
240 /* Skip bankwidths that are not supported */
241 if (!map_bankwidth_supported(map
->map
.bankwidth
))
244 /* Setup the map methods */
245 simple_map_init(&map
->map
);
247 /* Try all of the probe methods */
248 probe_type
= rom_probe_types
;
249 for(; *probe_type
; probe_type
++) {
250 map
->mtd
= do_map_probe(*probe_type
, &map
->map
);
255 map_top
+= ROM_PROBE_STEP_SIZE
;
258 /* Trim the size if we are larger than the map */
259 if (map
->mtd
->size
> map
->map
.size
) {
260 printk(KERN_WARNING MOD_NAME
261 " rom(%llu) larger than window(%lu). fixing...\n",
262 (unsigned long long)map
->mtd
->size
, map
->map
.size
);
263 map
->mtd
->size
= map
->map
.size
;
265 if (window
->rsrc
.parent
) {
267 * Registering the MTD device in iomem may not be possible
268 * if there is a BIOS "reserved" and BUSY range. If this
269 * fails then continue anyway.
271 map
->rsrc
.name
= map
->map_name
;
272 map
->rsrc
.start
= map
->map
.phys
;
273 map
->rsrc
.end
= map
->map
.phys
+ map
->mtd
->size
- 1;
274 map
->rsrc
.flags
= IORESOURCE_MEM
| IORESOURCE_BUSY
;
275 if (request_resource(&window
->rsrc
, &map
->rsrc
)) {
276 printk(KERN_ERR MOD_NAME
277 ": cannot reserve MTD resource\n");
278 map
->rsrc
.parent
= NULL
;
282 /* Make the whole region visible in the map */
283 map
->map
.virt
= window
->virt
;
284 map
->map
.phys
= window
->phys
;
285 cfi
= map
->map
.fldrv_priv
;
286 for(i
= 0; i
< cfi
->numchips
; i
++) {
287 cfi
->chips
[i
].start
+= offset
;
290 /* Now that the mtd devices is complete claim and export it */
291 map
->mtd
->owner
= THIS_MODULE
;
292 if (mtd_device_register(map
->mtd
, NULL
, 0)) {
293 map_destroy(map
->mtd
);
299 /* Calculate the new value of map_top */
300 map_top
+= map
->mtd
->size
;
302 /* File away the map structure */
303 list_add(&map
->list
, &window
->maps
);
308 /* Free any left over map structures */
311 /* See if I have any map structures */
312 if (list_empty(&window
->maps
)) {
313 ichxrom_cleanup(window
);
320 static void ichxrom_remove_one(struct pci_dev
*pdev
)
322 struct ichxrom_window
*window
= &ichxrom_window
;
323 ichxrom_cleanup(window
);
326 static const struct pci_device_id ichxrom_pci_tbl
[] = {
327 { PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82801BA_0
,
328 PCI_ANY_ID
, PCI_ANY_ID
, },
329 { PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82801CA_0
,
330 PCI_ANY_ID
, PCI_ANY_ID
, },
331 { PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82801DB_0
,
332 PCI_ANY_ID
, PCI_ANY_ID
, },
333 { PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82801EB_0
,
334 PCI_ANY_ID
, PCI_ANY_ID
, },
335 { PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_ESB_1
,
336 PCI_ANY_ID
, PCI_ANY_ID
, },
341 MODULE_DEVICE_TABLE(pci
, ichxrom_pci_tbl
);
343 static struct pci_driver ichxrom_driver
= {
345 .id_table
= ichxrom_pci_tbl
,
346 .probe
= ichxrom_init_one
,
347 .remove
= ichxrom_remove_one
,
351 static int __init
init_ichxrom(void)
353 struct pci_dev
*pdev
;
354 const struct pci_device_id
*id
;
357 for (id
= ichxrom_pci_tbl
; id
->vendor
; id
++) {
358 pdev
= pci_get_device(id
->vendor
, id
->device
, NULL
);
364 return ichxrom_init_one(pdev
, &ichxrom_pci_tbl
[0]);
368 return pci_register_driver(&ichxrom_driver
);
372 static void __exit
cleanup_ichxrom(void)
374 ichxrom_remove_one(ichxrom_window
.pdev
);
377 module_init(init_ichxrom
);
378 module_exit(cleanup_ichxrom
);
380 MODULE_LICENSE("GPL");
381 MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
382 MODULE_DESCRIPTION("MTD map driver for BIOS chips on the ICHX southbridge");