drivers/mtd/nand/raw/mpc5121_nfc.c

   1 /*
   2  * Copyright 2004-2008 Freescale Semiconductor, Inc.
   3  * Copyright 2009 Semihalf.
   4  *
   5  * Approved as OSADL project by a majority of OSADL members and funded
   6  * by OSADL membership fees in 2009;  for details see www.osadl.org.
   7  *
   8  * Based on original driver from Freescale Semiconductor
   9  * written by John Rigby <jrigby@freescale.com> on basis of mxc_nand.c.
  10  * Reworked and extended by Piotr Ziecik <kosmo@semihalf.com>.
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  * This program is distributed in the hope that it will be useful,
  17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19  * GNU General Public License for more details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  24  * MA 02110-1301, USA.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/clk.h>
  29 #include <linux/gfp.h>
  30 #include <linux/delay.h>
  31 #include <linux/err.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/io.h>
  34 #include <linux/mtd/mtd.h>
  35 #include <linux/mtd/rawnand.h>
  36 #include <linux/mtd/partitions.h>
  37 #include <linux/of_address.h>
  38 #include <linux/of_device.h>
  39 #include <linux/of_irq.h>
  40 #include <linux/of_platform.h>
  41
  42 #include <asm/mpc5121.h>
  43
  44 /* Addresses for NFC MAIN RAM BUFFER areas */
  45 #define NFC_MAIN_AREA(n)        ((n) *  0x200)
  46
  47 /* Addresses for NFC SPARE BUFFER areas */
  48 #define NFC_SPARE_BUFFERS       8
  49 #define NFC_SPARE_LEN           0x40
  50 #define NFC_SPARE_AREA(n)       (0x1000 + ((n) * NFC_SPARE_LEN))
  51
  52 /* MPC5121 NFC registers */
  53 #define NFC_BUF_ADDR            0x1E04
  54 #define NFC_FLASH_ADDR          0x1E06
  55 #define NFC_FLASH_CMD           0x1E08
  56 #define NFC_CONFIG              0x1E0A
  57 #define NFC_ECC_STATUS1         0x1E0C
  58 #define NFC_ECC_STATUS2         0x1E0E
  59 #define NFC_SPAS                0x1E10
  60 #define NFC_WRPROT              0x1E12
  61 #define NFC_NF_WRPRST           0x1E18
  62 #define NFC_CONFIG1             0x1E1A
  63 #define NFC_CONFIG2             0x1E1C
  64 #define NFC_UNLOCKSTART_BLK0    0x1E20
  65 #define NFC_UNLOCKEND_BLK0      0x1E22
  66 #define NFC_UNLOCKSTART_BLK1    0x1E24
  67 #define NFC_UNLOCKEND_BLK1      0x1E26
  68 #define NFC_UNLOCKSTART_BLK2    0x1E28
  69 #define NFC_UNLOCKEND_BLK2      0x1E2A
  70 #define NFC_UNLOCKSTART_BLK3    0x1E2C
  71 #define NFC_UNLOCKEND_BLK3      0x1E2E
  72
  73 /* Bit Definitions: NFC_BUF_ADDR */
  74 #define NFC_RBA_MASK            (7 << 0)
  75 #define NFC_ACTIVE_CS_SHIFT     5
  76 #define NFC_ACTIVE_CS_MASK      (3 << NFC_ACTIVE_CS_SHIFT)
  77
  78 /* Bit Definitions: NFC_CONFIG */
  79 #define NFC_BLS_UNLOCKED        (1 << 1)
  80
  81 /* Bit Definitions: NFC_CONFIG1 */
  82 #define NFC_ECC_4BIT            (1 << 0)
  83 #define NFC_FULL_PAGE_DMA       (1 << 1)
  84 #define NFC_SPARE_ONLY          (1 << 2)
  85 #define NFC_ECC_ENABLE          (1 << 3)
  86 #define NFC_INT_MASK            (1 << 4)
  87 #define NFC_BIG_ENDIAN          (1 << 5)
  88 #define NFC_RESET               (1 << 6)
  89 #define NFC_CE                  (1 << 7)
  90 #define NFC_ONE_CYCLE           (1 << 8)
  91 #define NFC_PPB_32              (0 << 9)
  92 #define NFC_PPB_64              (1 << 9)
  93 #define NFC_PPB_128             (2 << 9)
  94 #define NFC_PPB_256             (3 << 9)
  95 #define NFC_PPB_MASK            (3 << 9)
  96 #define NFC_FULL_PAGE_INT       (1 << 11)
  97
  98 /* Bit Definitions: NFC_CONFIG2 */
  99 #define NFC_COMMAND             (1 << 0)
 100 #define NFC_ADDRESS             (1 << 1)
 101 #define NFC_INPUT               (1 << 2)
 102 #define NFC_OUTPUT              (1 << 3)
 103 #define NFC_ID                  (1 << 4)
 104 #define NFC_STATUS              (1 << 5)
 105 #define NFC_CMD_FAIL            (1 << 15)
 106 #define NFC_INT                 (1 << 15)
 107
 108 /* Bit Definitions: NFC_WRPROT */
 109 #define NFC_WPC_LOCK_TIGHT      (1 << 0)
 110 #define NFC_WPC_LOCK            (1 << 1)
 111 #define NFC_WPC_UNLOCK          (1 << 2)
 112
 113 #define DRV_NAME                "mpc5121_nfc"
 114
 115 /* Timeouts */
 116 #define NFC_RESET_TIMEOUT       1000            /* 1 ms */
 117 #define NFC_TIMEOUT             (HZ / 10)       /* 1/10 s */
 118
 119 struct mpc5121_nfc_prv {
 120         struct nand_chip        chip;
 121         int                     irq;
 122         void __iomem            *regs;
 123         struct clk              *clk;
 124         wait_queue_head_t       irq_waitq;
 125         uint                    column;
 126         int                     spareonly;
 127         void __iomem            *csreg;
 128         struct device           *dev;
 129 };
 130
 131 static void mpc5121_nfc_done(struct mtd_info *mtd);
 132
 133 /* Read NFC register */
 134 static inline u16 nfc_read(struct mtd_info *mtd, uint reg)
 135 {
 136         struct nand_chip *chip = mtd_to_nand(mtd);
 137         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 138
 139         return in_be16(prv->regs + reg);
 140 }
 141
 142 /* Write NFC register */
 143 static inline void nfc_write(struct mtd_info *mtd, uint reg, u16 val)
 144 {
 145         struct nand_chip *chip = mtd_to_nand(mtd);
 146         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 147
 148         out_be16(prv->regs + reg, val);
 149 }
 150
 151 /* Set bits in NFC register */
 152 static inline void nfc_set(struct mtd_info *mtd, uint reg, u16 bits)
 153 {
 154         nfc_write(mtd, reg, nfc_read(mtd, reg) | bits);
 155 }
 156
 157 /* Clear bits in NFC register */
 158 static inline void nfc_clear(struct mtd_info *mtd, uint reg, u16 bits)
 159 {
 160         nfc_write(mtd, reg, nfc_read(mtd, reg) & ~bits);
 161 }
 162
 163 /* Invoke address cycle */
 164 static inline void mpc5121_nfc_send_addr(struct mtd_info *mtd, u16 addr)
 165 {
 166         nfc_write(mtd, NFC_FLASH_ADDR, addr);
 167         nfc_write(mtd, NFC_CONFIG2, NFC_ADDRESS);
 168         mpc5121_nfc_done(mtd);
 169 }
 170
 171 /* Invoke command cycle */
 172 static inline void mpc5121_nfc_send_cmd(struct mtd_info *mtd, u16 cmd)
 173 {
 174         nfc_write(mtd, NFC_FLASH_CMD, cmd);
 175         nfc_write(mtd, NFC_CONFIG2, NFC_COMMAND);
 176         mpc5121_nfc_done(mtd);
 177 }
 178
 179 /* Send data from NFC buffers to NAND flash */
 180 static inline void mpc5121_nfc_send_prog_page(struct mtd_info *mtd)
 181 {
 182         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 183         nfc_write(mtd, NFC_CONFIG2, NFC_INPUT);
 184         mpc5121_nfc_done(mtd);
 185 }
 186
 187 /* Receive data from NAND flash */
 188 static inline void mpc5121_nfc_send_read_page(struct mtd_info *mtd)
 189 {
 190         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 191         nfc_write(mtd, NFC_CONFIG2, NFC_OUTPUT);
 192         mpc5121_nfc_done(mtd);
 193 }
 194
 195 /* Receive ID from NAND flash */
 196 static inline void mpc5121_nfc_send_read_id(struct mtd_info *mtd)
 197 {
 198         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 199         nfc_write(mtd, NFC_CONFIG2, NFC_ID);
 200         mpc5121_nfc_done(mtd);
 201 }
 202
 203 /* Receive status from NAND flash */
 204 static inline void mpc5121_nfc_send_read_status(struct mtd_info *mtd)
 205 {
 206         nfc_clear(mtd, NFC_BUF_ADDR, NFC_RBA_MASK);
 207         nfc_write(mtd, NFC_CONFIG2, NFC_STATUS);
 208         mpc5121_nfc_done(mtd);
 209 }
 210
 211 /* NFC interrupt handler */
 212 static irqreturn_t mpc5121_nfc_irq(int irq, void *data)
 213 {
 214         struct mtd_info *mtd = data;
 215         struct nand_chip *chip = mtd_to_nand(mtd);
 216         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 217
 218         nfc_set(mtd, NFC_CONFIG1, NFC_INT_MASK);
 219         wake_up(&prv->irq_waitq);
 220
 221         return IRQ_HANDLED;
 222 }
 223
 224 /* Wait for operation complete */
 225 static void mpc5121_nfc_done(struct mtd_info *mtd)
 226 {
 227         struct nand_chip *chip = mtd_to_nand(mtd);
 228         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 229         int rv;
 230
 231         if ((nfc_read(mtd, NFC_CONFIG2) & NFC_INT) == 0) {
 232                 nfc_clear(mtd, NFC_CONFIG1, NFC_INT_MASK);
 233                 rv = wait_event_timeout(prv->irq_waitq,
 234                         (nfc_read(mtd, NFC_CONFIG2) & NFC_INT), NFC_TIMEOUT);
 235
 236                 if (!rv)
 237                         dev_warn(prv->dev,
 238                                 "Timeout while waiting for interrupt.\n");
 239         }
 240
 241         nfc_clear(mtd, NFC_CONFIG2, NFC_INT);
 242 }
 243
 244 /* Do address cycle(s) */
 245 static void mpc5121_nfc_addr_cycle(struct mtd_info *mtd, int column, int page)
 246 {
 247         struct nand_chip *chip = mtd_to_nand(mtd);
 248         u32 pagemask = chip->pagemask;
 249
 250         if (column != -1) {
 251                 mpc5121_nfc_send_addr(mtd, column);
 252                 if (mtd->writesize > 512)
 253                         mpc5121_nfc_send_addr(mtd, column >> 8);
 254         }
 255
 256         if (page != -1) {
 257                 do {
 258                         mpc5121_nfc_send_addr(mtd, page & 0xFF);
 259                         page >>= 8;
 260                         pagemask >>= 8;
 261                 } while (pagemask);
 262         }
 263 }
 264
 265 /* Control chip select signals */
 266 static void mpc5121_nfc_select_chip(struct mtd_info *mtd, int chip)
 267 {
 268         if (chip < 0) {
 269                 nfc_clear(mtd, NFC_CONFIG1, NFC_CE);
 270                 return;
 271         }
 272
 273         nfc_clear(mtd, NFC_BUF_ADDR, NFC_ACTIVE_CS_MASK);
 274         nfc_set(mtd, NFC_BUF_ADDR, (chip << NFC_ACTIVE_CS_SHIFT) &
 275                                                         NFC_ACTIVE_CS_MASK);
 276         nfc_set(mtd, NFC_CONFIG1, NFC_CE);
 277 }
 278
 279 /* Init external chip select logic on ADS5121 board */
 280 static int ads5121_chipselect_init(struct mtd_info *mtd)
 281 {
 282         struct nand_chip *chip = mtd_to_nand(mtd);
 283         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 284         struct device_node *dn;
 285
 286         dn = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld");
 287         if (dn) {
 288                 prv->csreg = of_iomap(dn, 0);
 289                 of_node_put(dn);
 290                 if (!prv->csreg)
 291                         return -ENOMEM;
 292
 293                 /* CPLD Register 9 controls NAND /CE Lines */
 294                 prv->csreg += 9;
 295                 return 0;
 296         }
 297
 298         return -EINVAL;
 299 }
 300
 301 /* Control chips select signal on ADS5121 board */
 302 static void ads5121_select_chip(struct mtd_info *mtd, int chip)
 303 {
 304         struct nand_chip *nand = mtd_to_nand(mtd);
 305         struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand);
 306         u8 v;
 307
 308         v = in_8(prv->csreg);
 309         v |= 0x0F;
 310
 311         if (chip >= 0) {
 312                 mpc5121_nfc_select_chip(mtd, 0);
 313                 v &= ~(1 << chip);
 314         } else
 315                 mpc5121_nfc_select_chip(mtd, -1);
 316
 317         out_8(prv->csreg, v);
 318 }
 319
 320 /* Read NAND Ready/Busy signal */
 321 static int mpc5121_nfc_dev_ready(struct mtd_info *mtd)
 322 {
 323         /*
 324          * NFC handles ready/busy signal internally. Therefore, this function
 325          * always returns status as ready.
 326          */
 327         return 1;
 328 }
 329
 330 /* Write command to NAND flash */
 331 static void mpc5121_nfc_command(struct mtd_info *mtd, unsigned command,
 332                                                         int column, int page)
 333 {
 334         struct nand_chip *chip = mtd_to_nand(mtd);
 335         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 336
 337         prv->column = (column >= 0) ? column : 0;
 338         prv->spareonly = 0;
 339
 340         switch (command) {
 341         case NAND_CMD_PAGEPROG:
 342                 mpc5121_nfc_send_prog_page(mtd);
 343                 break;
 344         /*
 345          * NFC does not support sub-page reads and writes,
 346          * so emulate them using full page transfers.
 347          */
 348         case NAND_CMD_READ0:
 349                 column = 0;
 350                 break;
 351
 352         case NAND_CMD_READ1:
 353                 prv->column += 256;
 354                 command = NAND_CMD_READ0;
 355                 column = 0;
 356                 break;
 357
 358         case NAND_CMD_READOOB:
 359                 prv->spareonly = 1;
 360                 command = NAND_CMD_READ0;
 361                 column = 0;
 362                 break;
 363
 364         case NAND_CMD_SEQIN:
 365                 mpc5121_nfc_command(mtd, NAND_CMD_READ0, column, page);
 366                 column = 0;
 367                 break;
 368
 369         case NAND_CMD_ERASE1:
 370         case NAND_CMD_ERASE2:
 371         case NAND_CMD_READID:
 372         case NAND_CMD_STATUS:
 373                 break;
 374
 375         default:
 376                 return;
 377         }
 378
 379         mpc5121_nfc_send_cmd(mtd, command);
 380         mpc5121_nfc_addr_cycle(mtd, column, page);
 381
 382         switch (command) {
 383         case NAND_CMD_READ0:
 384                 if (mtd->writesize > 512)
 385                         mpc5121_nfc_send_cmd(mtd, NAND_CMD_READSTART);
 386                 mpc5121_nfc_send_read_page(mtd);
 387                 break;
 388
 389         case NAND_CMD_READID:
 390                 mpc5121_nfc_send_read_id(mtd);
 391                 break;
 392
 393         case NAND_CMD_STATUS:
 394                 mpc5121_nfc_send_read_status(mtd);
 395                 if (chip->options & NAND_BUSWIDTH_16)
 396                         prv->column = 1;
 397                 else
 398                         prv->column = 0;
 399                 break;
 400         }
 401 }
 402
 403 /* Copy data from/to NFC spare buffers. */
 404 static void mpc5121_nfc_copy_spare(struct mtd_info *mtd, uint offset,
 405                                                 u8 *buffer, uint size, int wr)
 406 {
 407         struct nand_chip *nand = mtd_to_nand(mtd);
 408         struct mpc5121_nfc_prv *prv = nand_get_controller_data(nand);
 409         uint o, s, sbsize, blksize;
 410
 411         /*
 412          * NAND spare area is available through NFC spare buffers.
 413          * The NFC divides spare area into (page_size / 512) chunks.
 414          * Each chunk is placed into separate spare memory area, using
 415          * first (spare_size / num_of_chunks) bytes of the buffer.
 416          *
 417          * For NAND device in which the spare area is not divided fully
 418          * by the number of chunks, number of used bytes in each spare
 419          * buffer is rounded down to the nearest even number of bytes,
 420          * and all remaining bytes are added to the last used spare area.
 421          *
 422          * For more information read section 26.6.10 of MPC5121e
 423          * Microcontroller Reference Manual, Rev. 3.
 424          */
 425
 426         /* Calculate number of valid bytes in each spare buffer */
 427         sbsize = (mtd->oobsize / (mtd->writesize / 512)) & ~1;
 428
 429         while (size) {
 430                 /* Calculate spare buffer number */
 431                 s = offset / sbsize;
 432                 if (s > NFC_SPARE_BUFFERS - 1)
 433                         s = NFC_SPARE_BUFFERS - 1;
 434
 435                 /*
 436                  * Calculate offset to requested data block in selected spare
 437                  * buffer and its size.
 438                  */
 439                 o = offset - (s * sbsize);
 440                 blksize = min(sbsize - o, size);
 441
 442                 if (wr)
 443                         memcpy_toio(prv->regs + NFC_SPARE_AREA(s) + o,
 444                                                         buffer, blksize);
 445                 else
 446                         memcpy_fromio(buffer,
 447                                 prv->regs + NFC_SPARE_AREA(s) + o, blksize);
 448
 449                 buffer += blksize;
 450                 offset += blksize;
 451                 size -= blksize;
 452         };
 453 }
 454
 455 /* Copy data from/to NFC main and spare buffers */
 456 static void mpc5121_nfc_buf_copy(struct mtd_info *mtd, u_char *buf, int len,
 457                                                                         int wr)
 458 {
 459         struct nand_chip *chip = mtd_to_nand(mtd);
 460         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 461         uint c = prv->column;
 462         uint l;
 463
 464         /* Handle spare area access */
 465         if (prv->spareonly || c >= mtd->writesize) {
 466                 /* Calculate offset from beginning of spare area */
 467                 if (c >= mtd->writesize)
 468                         c -= mtd->writesize;
 469
 470                 prv->column += len;
 471                 mpc5121_nfc_copy_spare(mtd, c, buf, len, wr);
 472                 return;
 473         }
 474
 475         /*
 476          * Handle main area access - limit copy length to prevent
 477          * crossing main/spare boundary.
 478          */
 479         l = min((uint)len, mtd->writesize - c);
 480         prv->column += l;
 481
 482         if (wr)
 483                 memcpy_toio(prv->regs + NFC_MAIN_AREA(0) + c, buf, l);
 484         else
 485                 memcpy_fromio(buf, prv->regs + NFC_MAIN_AREA(0) + c, l);
 486
 487         /* Handle crossing main/spare boundary */
 488         if (l != len) {
 489                 buf += l;
 490                 len -= l;
 491                 mpc5121_nfc_buf_copy(mtd, buf, len, wr);
 492         }
 493 }
 494
 495 /* Read data from NFC buffers */
 496 static void mpc5121_nfc_read_buf(struct mtd_info *mtd, u_char *buf, int len)
 497 {
 498         mpc5121_nfc_buf_copy(mtd, buf, len, 0);
 499 }
 500
 501 /* Write data to NFC buffers */
 502 static void mpc5121_nfc_write_buf(struct mtd_info *mtd,
 503                                                 const u_char *buf, int len)
 504 {
 505         mpc5121_nfc_buf_copy(mtd, (u_char *)buf, len, 1);
 506 }
 507
 508 /* Read byte from NFC buffers */
 509 static u8 mpc5121_nfc_read_byte(struct mtd_info *mtd)
 510 {
 511         u8 tmp;
 512
 513         mpc5121_nfc_read_buf(mtd, &tmp, sizeof(tmp));
 514
 515         return tmp;
 516 }
 517
 518 /* Read word from NFC buffers */
 519 static u16 mpc5121_nfc_read_word(struct mtd_info *mtd)
 520 {
 521         u16 tmp;
 522
 523         mpc5121_nfc_read_buf(mtd, (u_char *)&tmp, sizeof(tmp));
 524
 525         return tmp;
 526 }
 527
 528 /*
 529  * Read NFC configuration from Reset Config Word
 530  *
 531  * NFC is configured during reset in basis of information stored
 532  * in Reset Config Word. There is no other way to set NAND block
 533  * size, spare size and bus width.
 534  */
 535 static int mpc5121_nfc_read_hw_config(struct mtd_info *mtd)
 536 {
 537         struct nand_chip *chip = mtd_to_nand(mtd);
 538         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 539         struct mpc512x_reset_module *rm;
 540         struct device_node *rmnode;
 541         uint rcw_pagesize = 0;
 542         uint rcw_sparesize = 0;
 543         uint rcw_width;
 544         uint rcwh;
 545         uint romloc, ps;
 546         int ret = 0;
 547
 548         rmnode = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-reset");
 549         if (!rmnode) {
 550                 dev_err(prv->dev, "Missing 'fsl,mpc5121-reset' "
 551                                         "node in device tree!\n");
 552                 return -ENODEV;
 553         }
 554
 555         rm = of_iomap(rmnode, 0);
 556         if (!rm) {
 557                 dev_err(prv->dev, "Error mapping reset module node!\n");
 558                 ret = -EBUSY;
 559                 goto out;
 560         }
 561
 562         rcwh = in_be32(&rm->rcwhr);
 563
 564         /* Bit 6: NFC bus width */
 565         rcw_width = ((rcwh >> 6) & 0x1) ? 2 : 1;
 566
 567         /* Bit 7: NFC Page/Spare size */
 568         ps = (rcwh >> 7) & 0x1;
 569
 570         /* Bits [22:21]: ROM Location */
 571         romloc = (rcwh >> 21) & 0x3;
 572
 573         /* Decode RCW bits */
 574         switch ((ps << 2) | romloc) {
 575         case 0x00:
 576         case 0x01:
 577                 rcw_pagesize = 512;
 578                 rcw_sparesize = 16;
 579                 break;
 580         case 0x02:
 581         case 0x03:
 582                 rcw_pagesize = 4096;
 583                 rcw_sparesize = 128;
 584                 break;
 585         case 0x04:
 586         case 0x05:
 587                 rcw_pagesize = 2048;
 588                 rcw_sparesize = 64;
 589                 break;
 590         case 0x06:
 591         case 0x07:
 592                 rcw_pagesize = 4096;
 593                 rcw_sparesize = 218;
 594                 break;
 595         }
 596
 597         mtd->writesize = rcw_pagesize;
 598         mtd->oobsize = rcw_sparesize;
 599         if (rcw_width == 2)
 600                 chip->options |= NAND_BUSWIDTH_16;
 601
 602         dev_notice(prv->dev, "Configured for "
 603                                 "%u-bit NAND, page size %u "
 604                                 "with %u spare.\n",
 605                                 rcw_width * 8, rcw_pagesize,
 606                                 rcw_sparesize);
 607         iounmap(rm);
 608 out:
 609         of_node_put(rmnode);
 610         return ret;
 611 }
 612
 613 /* Free driver resources */
 614 static void mpc5121_nfc_free(struct device *dev, struct mtd_info *mtd)
 615 {
 616         struct nand_chip *chip = mtd_to_nand(mtd);
 617         struct mpc5121_nfc_prv *prv = nand_get_controller_data(chip);
 618
 619         if (prv->clk)
 620                 clk_disable_unprepare(prv->clk);
 621
 622         if (prv->csreg)
 623                 iounmap(prv->csreg);
 624 }
 625
 626 static int mpc5121_nfc_probe(struct platform_device *op)
 627 {
 628         struct device_node *dn = op->dev.of_node;
 629         struct clk *clk;
 630         struct device *dev = &op->dev;
 631         struct mpc5121_nfc_prv *prv;
 632         struct resource res;
 633         struct mtd_info *mtd;
 634         struct nand_chip *chip;
 635         unsigned long regs_paddr, regs_size;
 636         const __be32 *chips_no;
 637         int resettime = 0;
 638         int retval = 0;
 639         int rev, len;
 640
 641         /*
 642          * Check SoC revision. This driver supports only NFC
 643          * in MPC5121 revision 2 and MPC5123 revision 3.
 644          */
 645         rev = (mfspr(SPRN_SVR) >> 4) & 0xF;
 646         if ((rev != 2) && (rev != 3)) {
 647                 dev_err(dev, "SoC revision %u is not supported!\n", rev);
 648                 return -ENXIO;
 649         }
 650
 651         prv = devm_kzalloc(dev, sizeof(*prv), GFP_KERNEL);
 652         if (!prv)
 653                 return -ENOMEM;
 654
 655         chip = &prv->chip;
 656         mtd = nand_to_mtd(chip);
 657
 658         mtd->dev.parent = dev;
 659         nand_set_controller_data(chip, prv);
 660         nand_set_flash_node(chip, dn);
 661         prv->dev = dev;
 662
 663         /* Read NFC configuration from Reset Config Word */
 664         retval = mpc5121_nfc_read_hw_config(mtd);
 665         if (retval) {
 666                 dev_err(dev, "Unable to read NFC config!\n");
 667                 return retval;
 668         }
 669
 670         prv->irq = irq_of_parse_and_map(dn, 0);
 671         if (prv->irq == NO_IRQ) {
 672                 dev_err(dev, "Error mapping IRQ!\n");
 673                 return -EINVAL;
 674         }
 675
 676         retval = of_address_to_resource(dn, 0, &res);
 677         if (retval) {
 678                 dev_err(dev, "Error parsing memory region!\n");
 679                 return retval;
 680         }
 681
 682         chips_no = of_get_property(dn, "chips", &len);
 683         if (!chips_no || len != sizeof(*chips_no)) {
 684                 dev_err(dev, "Invalid/missing 'chips' property!\n");
 685                 return -EINVAL;
 686         }
 687
 688         regs_paddr = res.start;
 689         regs_size = resource_size(&res);
 690
 691         if (!devm_request_mem_region(dev, regs_paddr, regs_size, DRV_NAME)) {
 692                 dev_err(dev, "Error requesting memory region!\n");
 693                 return -EBUSY;
 694         }
 695
 696         prv->regs = devm_ioremap(dev, regs_paddr, regs_size);
 697         if (!prv->regs) {
 698                 dev_err(dev, "Error mapping memory region!\n");
 699                 return -ENOMEM;
 700         }
 701
 702         mtd->name = "MPC5121 NAND";
 703         chip->dev_ready = mpc5121_nfc_dev_ready;
 704         chip->cmdfunc = mpc5121_nfc_command;
 705         chip->read_byte = mpc5121_nfc_read_byte;
 706         chip->read_word = mpc5121_nfc_read_word;
 707         chip->read_buf = mpc5121_nfc_read_buf;
 708         chip->write_buf = mpc5121_nfc_write_buf;
 709         chip->select_chip = mpc5121_nfc_select_chip;
 710         chip->set_features      = nand_get_set_features_notsupp;
 711         chip->get_features      = nand_get_set_features_notsupp;
 712         chip->bbt_options = NAND_BBT_USE_FLASH;
 713         chip->ecc.mode = NAND_ECC_SOFT;
 714         chip->ecc.algo = NAND_ECC_HAMMING;
 715
 716         /* Support external chip-select logic on ADS5121 board */
 717         if (of_machine_is_compatible("fsl,mpc5121ads")) {
 718                 retval = ads5121_chipselect_init(mtd);
 719                 if (retval) {
 720                         dev_err(dev, "Chipselect init error!\n");
 721                         return retval;
 722                 }
 723
 724                 chip->select_chip = ads5121_select_chip;
 725         }
 726
 727         /* Enable NFC clock */
 728         clk = devm_clk_get(dev, "ipg");
 729         if (IS_ERR(clk)) {
 730                 dev_err(dev, "Unable to acquire NFC clock!\n");
 731                 retval = PTR_ERR(clk);
 732                 goto error;
 733         }
 734         retval = clk_prepare_enable(clk);
 735         if (retval) {
 736                 dev_err(dev, "Unable to enable NFC clock!\n");
 737                 goto error;
 738         }
 739         prv->clk = clk;
 740
 741         /* Reset NAND Flash controller */
 742         nfc_set(mtd, NFC_CONFIG1, NFC_RESET);
 743         while (nfc_read(mtd, NFC_CONFIG1) & NFC_RESET) {
 744                 if (resettime++ >= NFC_RESET_TIMEOUT) {
 745                         dev_err(dev, "Timeout while resetting NFC!\n");
 746                         retval = -EINVAL;
 747                         goto error;
 748                 }
 749
 750                 udelay(1);
 751         }
 752
 753         /* Enable write to NFC memory */
 754         nfc_write(mtd, NFC_CONFIG, NFC_BLS_UNLOCKED);
 755
 756         /* Enable write to all NAND pages */
 757         nfc_write(mtd, NFC_UNLOCKSTART_BLK0, 0x0000);
 758         nfc_write(mtd, NFC_UNLOCKEND_BLK0, 0xFFFF);
 759         nfc_write(mtd, NFC_WRPROT, NFC_WPC_UNLOCK);
 760
 761         /*
 762          * Setup NFC:
 763          *      - Big Endian transfers,
 764          *      - Interrupt after full page read/write.
 765          */
 766         nfc_write(mtd, NFC_CONFIG1, NFC_BIG_ENDIAN | NFC_INT_MASK |
 767                                                         NFC_FULL_PAGE_INT);
 768
 769         /* Set spare area size */
 770         nfc_write(mtd, NFC_SPAS, mtd->oobsize >> 1);
 771
 772         init_waitqueue_head(&prv->irq_waitq);
 773         retval = devm_request_irq(dev, prv->irq, &mpc5121_nfc_irq, 0, DRV_NAME,
 774                                                                         mtd);
 775         if (retval) {
 776                 dev_err(dev, "Error requesting IRQ!\n");
 777                 goto error;
 778         }
 779
 780         /* Detect NAND chips */
 781         retval = nand_scan(chip, be32_to_cpup(chips_no));
 782         if (retval) {
 783                 dev_err(dev, "NAND Flash not found !\n");
 784                 goto error;
 785         }
 786
 787         /* Set erase block size */
 788         switch (mtd->erasesize / mtd->writesize) {
 789         case 32:
 790                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_32);
 791                 break;
 792
 793         case 64:
 794                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_64);
 795                 break;
 796
 797         case 128:
 798                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_128);
 799                 break;
 800
 801         case 256:
 802                 nfc_set(mtd, NFC_CONFIG1, NFC_PPB_256);
 803                 break;
 804
 805         default:
 806                 dev_err(dev, "Unsupported NAND flash!\n");
 807                 retval = -ENXIO;
 808                 goto error;
 809         }
 810
 811         dev_set_drvdata(dev, mtd);
 812
 813         /* Register device in MTD */
 814         retval = mtd_device_register(mtd, NULL, 0);
 815         if (retval) {
 816                 dev_err(dev, "Error adding MTD device!\n");
 817                 goto error;
 818         }
 819
 820         return 0;
 821 error:
 822         mpc5121_nfc_free(dev, mtd);
 823         return retval;
 824 }
 825
 826 static int mpc5121_nfc_remove(struct platform_device *op)
 827 {
 828         struct device *dev = &op->dev;
 829         struct mtd_info *mtd = dev_get_drvdata(dev);
 830
 831         nand_release(mtd_to_nand(mtd));
 832         mpc5121_nfc_free(dev, mtd);
 833
 834         return 0;
 835 }
 836
 837 static const struct of_device_id mpc5121_nfc_match[] = {
 838         { .compatible = "fsl,mpc5121-nfc", },
 839         {},
 840 };
 841 MODULE_DEVICE_TABLE(of, mpc5121_nfc_match);
 842
 843 static struct platform_driver mpc5121_nfc_driver = {
 844         .probe          = mpc5121_nfc_probe,
 845         .remove         = mpc5121_nfc_remove,
 846         .driver         = {
 847                 .name = DRV_NAME,
 848                 .of_match_table = mpc5121_nfc_match,
 849         },
 850 };
 851
 852 module_platform_driver(mpc5121_nfc_driver);
 853
 854 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
 855 MODULE_DESCRIPTION("MPC5121 NAND MTD driver");
 856 MODULE_LICENSE("GPL");