drivers/mtd/nand/spi/core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2016-2017 Micron Technology, Inc.
   4  *
   5  * Authors:
   6  *      Peter Pan <peterpandong@micron.com>
   7  *      Boris Brezillon <boris.brezillon@bootlin.com>
   8  */
   9
  10 #define pr_fmt(fmt)     "spi-nand: " fmt
  11
  12 #include <linux/device.h>
  13 #include <linux/jiffies.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/mtd/spinand.h>
  17 #include <linux/of.h>
  18 #include <linux/slab.h>
  19 #include <linux/spi/spi.h>
  20 #include <linux/spi/spi-mem.h>
  21
  22 static void spinand_cache_op_adjust_colum(struct spinand_device *spinand,
  23                                           const struct nand_page_io_req *req,
  24                                           u16 *column)
  25 {
  26         struct nand_device *nand = spinand_to_nand(spinand);
  27         unsigned int shift;
  28
  29         if (nand->memorg.planes_per_lun < 2)
  30                 return;
  31
  32         /* The plane number is passed in MSB just above the column address */
  33         shift = fls(nand->memorg.pagesize);
  34         *column |= req->pos.plane << shift;
  35 }
  36
  37 static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
  38 {
  39         struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg,
  40                                                       spinand->scratchbuf);
  41         int ret;
  42
  43         ret = spi_mem_exec_op(spinand->spimem, &op);
  44         if (ret)
  45                 return ret;
  46
  47         *val = *spinand->scratchbuf;
  48         return 0;
  49 }
  50
  51 static int spinand_write_reg_op(struct spinand_device *spinand, u8 reg, u8 val)
  52 {
  53         struct spi_mem_op op = SPINAND_SET_FEATURE_OP(reg,
  54                                                       spinand->scratchbuf);
  55
  56         *spinand->scratchbuf = val;
  57         return spi_mem_exec_op(spinand->spimem, &op);
  58 }
  59
  60 static int spinand_read_status(struct spinand_device *spinand, u8 *status)
  61 {
  62         return spinand_read_reg_op(spinand, REG_STATUS, status);
  63 }
  64
  65 static int spinand_get_cfg(struct spinand_device *spinand, u8 *cfg)
  66 {
  67         struct nand_device *nand = spinand_to_nand(spinand);
  68
  69         if (WARN_ON(spinand->cur_target < 0 ||
  70                     spinand->cur_target >= nand->memorg.ntargets))
  71                 return -EINVAL;
  72
  73         *cfg = spinand->cfg_cache[spinand->cur_target];
  74         return 0;
  75 }
  76
  77 static int spinand_set_cfg(struct spinand_device *spinand, u8 cfg)
  78 {
  79         struct nand_device *nand = spinand_to_nand(spinand);
  80         int ret;
  81
  82         if (WARN_ON(spinand->cur_target < 0 ||
  83                     spinand->cur_target >= nand->memorg.ntargets))
  84                 return -EINVAL;
  85
  86         if (spinand->cfg_cache[spinand->cur_target] == cfg)
  87                 return 0;
  88
  89         ret = spinand_write_reg_op(spinand, REG_CFG, cfg);
  90         if (ret)
  91                 return ret;
  92
  93         spinand->cfg_cache[spinand->cur_target] = cfg;
  94         return 0;
  95 }
  96
  97 /**
  98  * spinand_upd_cfg() - Update the configuration register
  99  * @spinand: the spinand device
 100  * @mask: the mask encoding the bits to update in the config reg
 101  * @val: the new value to apply
 102  *
 103  * Update the configuration register.
 104  *
 105  * Return: 0 on success, a negative error code otherwise.
 106  */
 107 int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val)
 108 {
 109         int ret;
 110         u8 cfg;
 111
 112         ret = spinand_get_cfg(spinand, &cfg);
 113         if (ret)
 114                 return ret;
 115
 116         cfg &= ~mask;
 117         cfg |= val;
 118
 119         return spinand_set_cfg(spinand, cfg);
 120 }
 121
 122 /**
 123  * spinand_select_target() - Select a specific NAND target/die
 124  * @spinand: the spinand device
 125  * @target: the target/die to select
 126  *
 127  * Select a new target/die. If chip only has one die, this function is a NOOP.
 128  *
 129  * Return: 0 on success, a negative error code otherwise.
 130  */
 131 int spinand_select_target(struct spinand_device *spinand, unsigned int target)
 132 {
 133         struct nand_device *nand = spinand_to_nand(spinand);
 134         int ret;
 135
 136         if (WARN_ON(target >= nand->memorg.ntargets))
 137                 return -EINVAL;
 138
 139         if (spinand->cur_target == target)
 140                 return 0;
 141
 142         if (nand->memorg.ntargets == 1) {
 143                 spinand->cur_target = target;
 144                 return 0;
 145         }
 146
 147         ret = spinand->select_target(spinand, target);
 148         if (ret)
 149                 return ret;
 150
 151         spinand->cur_target = target;
 152         return 0;
 153 }
 154
 155 static int spinand_init_cfg_cache(struct spinand_device *spinand)
 156 {
 157         struct nand_device *nand = spinand_to_nand(spinand);
 158         struct device *dev = &spinand->spimem->spi->dev;
 159         unsigned int target;
 160         int ret;
 161
 162         spinand->cfg_cache = devm_kcalloc(dev,
 163                                           nand->memorg.ntargets,
 164                                           sizeof(*spinand->cfg_cache),
 165                                           GFP_KERNEL);
 166         if (!spinand->cfg_cache)
 167                 return -ENOMEM;
 168
 169         for (target = 0; target < nand->memorg.ntargets; target++) {
 170                 ret = spinand_select_target(spinand, target);
 171                 if (ret)
 172                         return ret;
 173
 174                 /*
 175                  * We use spinand_read_reg_op() instead of spinand_get_cfg()
 176                  * here to bypass the config cache.
 177                  */
 178                 ret = spinand_read_reg_op(spinand, REG_CFG,
 179                                           &spinand->cfg_cache[target]);
 180                 if (ret)
 181                         return ret;
 182         }
 183
 184         return 0;
 185 }
 186
 187 static int spinand_init_quad_enable(struct spinand_device *spinand)
 188 {
 189         bool enable = false;
 190
 191         if (!(spinand->flags & SPINAND_HAS_QE_BIT))
 192                 return 0;
 193
 194         if (spinand->op_templates.read_cache->data.buswidth == 4 ||
 195             spinand->op_templates.write_cache->data.buswidth == 4 ||
 196             spinand->op_templates.update_cache->data.buswidth == 4)
 197                 enable = true;
 198
 199         return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE,
 200                                enable ? CFG_QUAD_ENABLE : 0);
 201 }
 202
 203 static int spinand_ecc_enable(struct spinand_device *spinand,
 204                               bool enable)
 205 {
 206         return spinand_upd_cfg(spinand, CFG_ECC_ENABLE,
 207                                enable ? CFG_ECC_ENABLE : 0);
 208 }
 209
 210 static int spinand_write_enable_op(struct spinand_device *spinand)
 211 {
 212         struct spi_mem_op op = SPINAND_WR_EN_DIS_OP(true);
 213
 214         return spi_mem_exec_op(spinand->spimem, &op);
 215 }
 216
 217 static int spinand_load_page_op(struct spinand_device *spinand,
 218                                 const struct nand_page_io_req *req)
 219 {
 220         struct nand_device *nand = spinand_to_nand(spinand);
 221         unsigned int row = nanddev_pos_to_row(nand, &req->pos);
 222         struct spi_mem_op op = SPINAND_PAGE_READ_OP(row);
 223
 224         return spi_mem_exec_op(spinand->spimem, &op);
 225 }
 226
 227 static int spinand_read_from_cache_op(struct spinand_device *spinand,
 228                                       const struct nand_page_io_req *req)
 229 {
 230         struct spi_mem_op op = *spinand->op_templates.read_cache;
 231         struct nand_device *nand = spinand_to_nand(spinand);
 232         struct mtd_info *mtd = nanddev_to_mtd(nand);
 233         struct nand_page_io_req adjreq = *req;
 234         unsigned int nbytes = 0;
 235         void *buf = NULL;
 236         u16 column = 0;
 237         int ret;
 238
 239         if (req->datalen) {
 240                 adjreq.datalen = nanddev_page_size(nand);
 241                 adjreq.dataoffs = 0;
 242                 adjreq.databuf.in = spinand->databuf;
 243                 buf = spinand->databuf;
 244                 nbytes = adjreq.datalen;
 245         }
 246
 247         if (req->ooblen) {
 248                 adjreq.ooblen = nanddev_per_page_oobsize(nand);
 249                 adjreq.ooboffs = 0;
 250                 adjreq.oobbuf.in = spinand->oobbuf;
 251                 nbytes += nanddev_per_page_oobsize(nand);
 252                 if (!buf) {
 253                         buf = spinand->oobbuf;
 254                         column = nanddev_page_size(nand);
 255                 }
 256         }
 257
 258         spinand_cache_op_adjust_colum(spinand, &adjreq, &column);
 259         op.addr.val = column;
 260
 261         /*
 262          * Some controllers are limited in term of max RX data size. In this
 263          * case, just repeat the READ_CACHE operation after updating the
 264          * column.
 265          */
 266         while (nbytes) {
 267                 op.data.buf.in = buf;
 268                 op.data.nbytes = nbytes;
 269                 ret = spi_mem_adjust_op_size(spinand->spimem, &op);
 270                 if (ret)
 271                         return ret;
 272
 273                 ret = spi_mem_exec_op(spinand->spimem, &op);
 274                 if (ret)
 275                         return ret;
 276
 277                 buf += op.data.nbytes;
 278                 nbytes -= op.data.nbytes;
 279                 op.addr.val += op.data.nbytes;
 280         }
 281
 282         if (req->datalen)
 283                 memcpy(req->databuf.in, spinand->databuf + req->dataoffs,
 284                        req->datalen);
 285
 286         if (req->ooblen) {
 287                 if (req->mode == MTD_OPS_AUTO_OOB)
 288                         mtd_ooblayout_get_databytes(mtd, req->oobbuf.in,
 289                                                     spinand->oobbuf,
 290                                                     req->ooboffs,
 291                                                     req->ooblen);
 292                 else
 293                         memcpy(req->oobbuf.in, spinand->oobbuf + req->ooboffs,
 294                                req->ooblen);
 295         }
 296
 297         return 0;
 298 }
 299
 300 static int spinand_write_to_cache_op(struct spinand_device *spinand,
 301                                      const struct nand_page_io_req *req)
 302 {
 303         struct spi_mem_op op = *spinand->op_templates.write_cache;
 304         struct nand_device *nand = spinand_to_nand(spinand);
 305         struct mtd_info *mtd = nanddev_to_mtd(nand);
 306         struct nand_page_io_req adjreq = *req;
 307         void *buf = spinand->databuf;
 308         unsigned int nbytes;
 309         u16 column = 0;
 310         int ret;
 311
 312         /*
 313          * Looks like PROGRAM LOAD (AKA write cache) does not necessarily reset
 314          * the cache content to 0xFF (depends on vendor implementation), so we
 315          * must fill the page cache entirely even if we only want to program
 316          * the data portion of the page, otherwise we might corrupt the BBM or
 317          * user data previously programmed in OOB area.
 318          */
 319         nbytes = nanddev_page_size(nand) + nanddev_per_page_oobsize(nand);
 320         memset(spinand->databuf, 0xff, nbytes);
 321         adjreq.dataoffs = 0;
 322         adjreq.datalen = nanddev_page_size(nand);
 323         adjreq.databuf.out = spinand->databuf;
 324         adjreq.ooblen = nanddev_per_page_oobsize(nand);
 325         adjreq.ooboffs = 0;
 326         adjreq.oobbuf.out = spinand->oobbuf;
 327
 328         if (req->datalen)
 329                 memcpy(spinand->databuf + req->dataoffs, req->databuf.out,
 330                        req->datalen);
 331
 332         if (req->ooblen) {
 333                 if (req->mode == MTD_OPS_AUTO_OOB)
 334                         mtd_ooblayout_set_databytes(mtd, req->oobbuf.out,
 335                                                     spinand->oobbuf,
 336                                                     req->ooboffs,
 337                                                     req->ooblen);
 338                 else
 339                         memcpy(spinand->oobbuf + req->ooboffs, req->oobbuf.out,
 340                                req->ooblen);
 341         }
 342
 343         spinand_cache_op_adjust_colum(spinand, &adjreq, &column);
 344
 345         op = *spinand->op_templates.write_cache;
 346         op.addr.val = column;
 347
 348         /*
 349          * Some controllers are limited in term of max TX data size. In this
 350          * case, split the operation into one LOAD CACHE and one or more
 351          * LOAD RANDOM CACHE.
 352          */
 353         while (nbytes) {
 354                 op.data.buf.out = buf;
 355                 op.data.nbytes = nbytes;
 356
 357                 ret = spi_mem_adjust_op_size(spinand->spimem, &op);
 358                 if (ret)
 359                         return ret;
 360
 361                 ret = spi_mem_exec_op(spinand->spimem, &op);
 362                 if (ret)
 363                         return ret;
 364
 365                 buf += op.data.nbytes;
 366                 nbytes -= op.data.nbytes;
 367                 op.addr.val += op.data.nbytes;
 368
 369                 /*
 370                  * We need to use the RANDOM LOAD CACHE operation if there's
 371                  * more than one iteration, because the LOAD operation might
 372                  * reset the cache to 0xff.
 373                  */
 374                 if (nbytes) {
 375                         column = op.addr.val;
 376                         op = *spinand->op_templates.update_cache;
 377                         op.addr.val = column;
 378                 }
 379         }
 380
 381         return 0;
 382 }
 383
 384 static int spinand_program_op(struct spinand_device *spinand,
 385                               const struct nand_page_io_req *req)
 386 {
 387         struct nand_device *nand = spinand_to_nand(spinand);
 388         unsigned int row = nanddev_pos_to_row(nand, &req->pos);
 389         struct spi_mem_op op = SPINAND_PROG_EXEC_OP(row);
 390
 391         return spi_mem_exec_op(spinand->spimem, &op);
 392 }
 393
 394 static int spinand_erase_op(struct spinand_device *spinand,
 395                             const struct nand_pos *pos)
 396 {
 397         struct nand_device *nand = spinand_to_nand(spinand);
 398         unsigned int row = nanddev_pos_to_row(nand, pos);
 399         struct spi_mem_op op = SPINAND_BLK_ERASE_OP(row);
 400
 401         return spi_mem_exec_op(spinand->spimem, &op);
 402 }
 403
 404 static int spinand_wait(struct spinand_device *spinand, u8 *s)
 405 {
 406         unsigned long timeo =  jiffies + msecs_to_jiffies(400);
 407         u8 status;
 408         int ret;
 409
 410         do {
 411                 ret = spinand_read_status(spinand, &status);
 412                 if (ret)
 413                         return ret;
 414
 415                 if (!(status & STATUS_BUSY))
 416                         goto out;
 417         } while (time_before(jiffies, timeo));
 418
 419         /*
 420          * Extra read, just in case the STATUS_READY bit has changed
 421          * since our last check
 422          */
 423         ret = spinand_read_status(spinand, &status);
 424         if (ret)
 425                 return ret;
 426
 427 out:
 428         if (s)
 429                 *s = status;
 430
 431         return status & STATUS_BUSY ? -ETIMEDOUT : 0;
 432 }
 433
 434 static int spinand_read_id_op(struct spinand_device *spinand, u8 *buf)
 435 {
 436         struct spi_mem_op op = SPINAND_READID_OP(0, spinand->scratchbuf,
 437                                                  SPINAND_MAX_ID_LEN);
 438         int ret;
 439
 440         ret = spi_mem_exec_op(spinand->spimem, &op);
 441         if (!ret)
 442                 memcpy(buf, spinand->scratchbuf, SPINAND_MAX_ID_LEN);
 443
 444         return ret;
 445 }
 446
 447 static int spinand_reset_op(struct spinand_device *spinand)
 448 {
 449         struct spi_mem_op op = SPINAND_RESET_OP;
 450         int ret;
 451
 452         ret = spi_mem_exec_op(spinand->spimem, &op);
 453         if (ret)
 454                 return ret;
 455
 456         return spinand_wait(spinand, NULL);
 457 }
 458
 459 static int spinand_lock_block(struct spinand_device *spinand, u8 lock)
 460 {
 461         return spinand_write_reg_op(spinand, REG_BLOCK_LOCK, lock);
 462 }
 463
 464 static int spinand_check_ecc_status(struct spinand_device *spinand, u8 status)
 465 {
 466         struct nand_device *nand = spinand_to_nand(spinand);
 467
 468         if (spinand->eccinfo.get_status)
 469                 return spinand->eccinfo.get_status(spinand, status);
 470
 471         switch (status & STATUS_ECC_MASK) {
 472         case STATUS_ECC_NO_BITFLIPS:
 473                 return 0;
 474
 475         case STATUS_ECC_HAS_BITFLIPS:
 476                 /*
 477                  * We have no way to know exactly how many bitflips have been
 478                  * fixed, so let's return the maximum possible value so that
 479                  * wear-leveling layers move the data immediately.
 480                  */
 481                 return nand->eccreq.strength;
 482
 483         case STATUS_ECC_UNCOR_ERROR:
 484                 return -EBADMSG;
 485
 486         default:
 487                 break;
 488         }
 489
 490         return -EINVAL;
 491 }
 492
 493 static int spinand_read_page(struct spinand_device *spinand,
 494                              const struct nand_page_io_req *req,
 495                              bool ecc_enabled)
 496 {
 497         u8 status;
 498         int ret;
 499
 500         ret = spinand_load_page_op(spinand, req);
 501         if (ret)
 502                 return ret;
 503
 504         ret = spinand_wait(spinand, &status);
 505         if (ret < 0)
 506                 return ret;
 507
 508         ret = spinand_read_from_cache_op(spinand, req);
 509         if (ret)
 510                 return ret;
 511
 512         if (!ecc_enabled)
 513                 return 0;
 514
 515         return spinand_check_ecc_status(spinand, status);
 516 }
 517
 518 static int spinand_write_page(struct spinand_device *spinand,
 519                               const struct nand_page_io_req *req)
 520 {
 521         u8 status;
 522         int ret;
 523
 524         ret = spinand_write_enable_op(spinand);
 525         if (ret)
 526                 return ret;
 527
 528         ret = spinand_write_to_cache_op(spinand, req);
 529         if (ret)
 530                 return ret;
 531
 532         ret = spinand_program_op(spinand, req);
 533         if (ret)
 534                 return ret;
 535
 536         ret = spinand_wait(spinand, &status);
 537         if (!ret && (status & STATUS_PROG_FAILED))
 538                 ret = -EIO;
 539
 540         return ret;
 541 }
 542
 543 static int spinand_mtd_read(struct mtd_info *mtd, loff_t from,
 544                             struct mtd_oob_ops *ops)
 545 {
 546         struct spinand_device *spinand = mtd_to_spinand(mtd);
 547         struct nand_device *nand = mtd_to_nanddev(mtd);
 548         unsigned int max_bitflips = 0;
 549         struct nand_io_iter iter;
 550         bool enable_ecc = false;
 551         bool ecc_failed = false;
 552         int ret = 0;
 553
 554         if (ops->mode != MTD_OPS_RAW && spinand->eccinfo.ooblayout)
 555                 enable_ecc = true;
 556
 557         mutex_lock(&spinand->lock);
 558
 559         nanddev_io_for_each_page(nand, from, ops, &iter) {
 560                 ret = spinand_select_target(spinand, iter.req.pos.target);
 561                 if (ret)
 562                         break;
 563
 564                 ret = spinand_ecc_enable(spinand, enable_ecc);
 565                 if (ret)
 566                         break;
 567
 568                 ret = spinand_read_page(spinand, &iter.req, enable_ecc);
 569                 if (ret < 0 && ret != -EBADMSG)
 570                         break;
 571
 572                 if (ret == -EBADMSG) {
 573                         ecc_failed = true;
 574                         mtd->ecc_stats.failed++;
 575                 } else {
 576                         mtd->ecc_stats.corrected += ret;
 577                         max_bitflips = max_t(unsigned int, max_bitflips, ret);
 578                 }
 579
 580                 ret = 0;
 581                 ops->retlen += iter.req.datalen;
 582                 ops->oobretlen += iter.req.ooblen;
 583         }
 584
 585         mutex_unlock(&spinand->lock);
 586
 587         if (ecc_failed && !ret)
 588                 ret = -EBADMSG;
 589
 590         return ret ? ret : max_bitflips;
 591 }
 592
 593 static int spinand_mtd_write(struct mtd_info *mtd, loff_t to,
 594                              struct mtd_oob_ops *ops)
 595 {
 596         struct spinand_device *spinand = mtd_to_spinand(mtd);
 597         struct nand_device *nand = mtd_to_nanddev(mtd);
 598         struct nand_io_iter iter;
 599         bool enable_ecc = false;
 600         int ret = 0;
 601
 602         if (ops->mode != MTD_OPS_RAW && mtd->ooblayout)
 603                 enable_ecc = true;
 604
 605         mutex_lock(&spinand->lock);
 606
 607         nanddev_io_for_each_page(nand, to, ops, &iter) {
 608                 ret = spinand_select_target(spinand, iter.req.pos.target);
 609                 if (ret)
 610                         break;
 611
 612                 ret = spinand_ecc_enable(spinand, enable_ecc);
 613                 if (ret)
 614                         break;
 615
 616                 ret = spinand_write_page(spinand, &iter.req);
 617                 if (ret)
 618                         break;
 619
 620                 ops->retlen += iter.req.datalen;
 621                 ops->oobretlen += iter.req.ooblen;
 622         }
 623
 624         mutex_unlock(&spinand->lock);
 625
 626         return ret;
 627 }
 628
 629 static bool spinand_isbad(struct nand_device *nand, const struct nand_pos *pos)
 630 {
 631         struct spinand_device *spinand = nand_to_spinand(nand);
 632         u8 marker[2] = { };
 633         struct nand_page_io_req req = {
 634                 .pos = *pos,
 635                 .ooblen = sizeof(marker),
 636                 .ooboffs = 0,
 637                 .oobbuf.in = marker,
 638                 .mode = MTD_OPS_RAW,
 639         };
 640
 641         spinand_select_target(spinand, pos->target);
 642         spinand_read_page(spinand, &req, false);
 643         if (marker[0] != 0xff || marker[1] != 0xff)
 644                 return true;
 645
 646         return false;
 647 }
 648
 649 static int spinand_mtd_block_isbad(struct mtd_info *mtd, loff_t offs)
 650 {
 651         struct nand_device *nand = mtd_to_nanddev(mtd);
 652         struct spinand_device *spinand = nand_to_spinand(nand);
 653         struct nand_pos pos;
 654         int ret;
 655
 656         nanddev_offs_to_pos(nand, offs, &pos);
 657         mutex_lock(&spinand->lock);
 658         ret = nanddev_isbad(nand, &pos);
 659         mutex_unlock(&spinand->lock);
 660
 661         return ret;
 662 }
 663
 664 static int spinand_markbad(struct nand_device *nand, const struct nand_pos *pos)
 665 {
 666         struct spinand_device *spinand = nand_to_spinand(nand);
 667         u8 marker[2] = { };
 668         struct nand_page_io_req req = {
 669                 .pos = *pos,
 670                 .ooboffs = 0,
 671                 .ooblen = sizeof(marker),
 672                 .oobbuf.out = marker,
 673                 .mode = MTD_OPS_RAW,
 674         };
 675         int ret;
 676
 677         ret = spinand_select_target(spinand, pos->target);
 678         if (ret)
 679                 return ret;
 680
 681         ret = spinand_write_enable_op(spinand);
 682         if (ret)
 683                 return ret;
 684
 685         return spinand_write_page(spinand, &req);
 686 }
 687
 688 static int spinand_mtd_block_markbad(struct mtd_info *mtd, loff_t offs)
 689 {
 690         struct nand_device *nand = mtd_to_nanddev(mtd);
 691         struct spinand_device *spinand = nand_to_spinand(nand);
 692         struct nand_pos pos;
 693         int ret;
 694
 695         nanddev_offs_to_pos(nand, offs, &pos);
 696         mutex_lock(&spinand->lock);
 697         ret = nanddev_markbad(nand, &pos);
 698         mutex_unlock(&spinand->lock);
 699
 700         return ret;
 701 }
 702
 703 static int spinand_erase(struct nand_device *nand, const struct nand_pos *pos)
 704 {
 705         struct spinand_device *spinand = nand_to_spinand(nand);
 706         u8 status;
 707         int ret;
 708
 709         ret = spinand_select_target(spinand, pos->target);
 710         if (ret)
 711                 return ret;
 712
 713         ret = spinand_write_enable_op(spinand);
 714         if (ret)
 715                 return ret;
 716
 717         ret = spinand_erase_op(spinand, pos);
 718         if (ret)
 719                 return ret;
 720
 721         ret = spinand_wait(spinand, &status);
 722         if (!ret && (status & STATUS_ERASE_FAILED))
 723                 ret = -EIO;
 724
 725         return ret;
 726 }
 727
 728 static int spinand_mtd_erase(struct mtd_info *mtd,
 729                              struct erase_info *einfo)
 730 {
 731         struct spinand_device *spinand = mtd_to_spinand(mtd);
 732         int ret;
 733
 734         mutex_lock(&spinand->lock);
 735         ret = nanddev_mtd_erase(mtd, einfo);
 736         mutex_unlock(&spinand->lock);
 737
 738         return ret;
 739 }
 740
 741 static int spinand_mtd_block_isreserved(struct mtd_info *mtd, loff_t offs)
 742 {
 743         struct spinand_device *spinand = mtd_to_spinand(mtd);
 744         struct nand_device *nand = mtd_to_nanddev(mtd);
 745         struct nand_pos pos;
 746         int ret;
 747
 748         nanddev_offs_to_pos(nand, offs, &pos);
 749         mutex_lock(&spinand->lock);
 750         ret = nanddev_isreserved(nand, &pos);
 751         mutex_unlock(&spinand->lock);
 752
 753         return ret;
 754 }
 755
 756 static const struct nand_ops spinand_ops = {
 757         .erase = spinand_erase,
 758         .markbad = spinand_markbad,
 759         .isbad = spinand_isbad,
 760 };
 761
 762 static const struct spinand_manufacturer *spinand_manufacturers[] = {
 763         &macronix_spinand_manufacturer,
 764         &micron_spinand_manufacturer,
 765         &winbond_spinand_manufacturer,
 766 };
 767
 768 static int spinand_manufacturer_detect(struct spinand_device *spinand)
 769 {
 770         unsigned int i;
 771         int ret;
 772
 773         for (i = 0; i < ARRAY_SIZE(spinand_manufacturers); i++) {
 774                 ret = spinand_manufacturers[i]->ops->detect(spinand);
 775                 if (ret > 0) {
 776                         spinand->manufacturer = spinand_manufacturers[i];
 777                         return 0;
 778                 } else if (ret < 0) {
 779                         return ret;
 780                 }
 781         }
 782
 783         return -ENOTSUPP;
 784 }
 785
 786 static int spinand_manufacturer_init(struct spinand_device *spinand)
 787 {
 788         if (spinand->manufacturer->ops->init)
 789                 return spinand->manufacturer->ops->init(spinand);
 790
 791         return 0;
 792 }
 793
 794 static void spinand_manufacturer_cleanup(struct spinand_device *spinand)
 795 {
 796         /* Release manufacturer private data */
 797         if (spinand->manufacturer->ops->cleanup)
 798                 return spinand->manufacturer->ops->cleanup(spinand);
 799 }
 800
 801 static const struct spi_mem_op *
 802 spinand_select_op_variant(struct spinand_device *spinand,
 803                           const struct spinand_op_variants *variants)
 804 {
 805         struct nand_device *nand = spinand_to_nand(spinand);
 806         unsigned int i;
 807
 808         for (i = 0; i < variants->nops; i++) {
 809                 struct spi_mem_op op = variants->ops[i];
 810                 unsigned int nbytes;
 811                 int ret;
 812
 813                 nbytes = nanddev_per_page_oobsize(nand) +
 814                          nanddev_page_size(nand);
 815
 816                 while (nbytes) {
 817                         op.data.nbytes = nbytes;
 818                         ret = spi_mem_adjust_op_size(spinand->spimem, &op);
 819                         if (ret)
 820                                 break;
 821
 822                         if (!spi_mem_supports_op(spinand->spimem, &op))
 823                                 break;
 824
 825                         nbytes -= op.data.nbytes;
 826                 }
 827
 828                 if (!nbytes)
 829                         return &variants->ops[i];
 830         }
 831
 832         return NULL;
 833 }
 834
 835 /**
 836  * spinand_match_and_init() - Try to find a match between a device ID and an
 837  *                            entry in a spinand_info table
 838  * @spinand: SPI NAND object
 839  * @table: SPI NAND device description table
 840  * @table_size: size of the device description table
 841  *
 842  * Should be used by SPI NAND manufacturer drivers when they want to find a
 843  * match between a device ID retrieved through the READ_ID command and an
 844  * entry in the SPI NAND description table. If a match is found, the spinand
 845  * object will be initialized with information provided by the matching
 846  * spinand_info entry.
 847  *
 848  * Return: 0 on success, a negative error code otherwise.
 849  */
 850 int spinand_match_and_init(struct spinand_device *spinand,
 851                            const struct spinand_info *table,
 852                            unsigned int table_size, u8 devid)
 853 {
 854         struct nand_device *nand = spinand_to_nand(spinand);
 855         unsigned int i;
 856
 857         for (i = 0; i < table_size; i++) {
 858                 const struct spinand_info *info = &table[i];
 859                 const struct spi_mem_op *op;
 860
 861                 if (devid != info->devid)
 862                         continue;
 863
 864                 nand->memorg = table[i].memorg;
 865                 nand->eccreq = table[i].eccreq;
 866                 spinand->eccinfo = table[i].eccinfo;
 867                 spinand->flags = table[i].flags;
 868                 spinand->select_target = table[i].select_target;
 869
 870                 op = spinand_select_op_variant(spinand,
 871                                                info->op_variants.read_cache);
 872                 if (!op)
 873                         return -ENOTSUPP;
 874
 875                 spinand->op_templates.read_cache = op;
 876
 877                 op = spinand_select_op_variant(spinand,
 878                                                info->op_variants.write_cache);
 879                 if (!op)
 880                         return -ENOTSUPP;
 881
 882                 spinand->op_templates.write_cache = op;
 883
 884                 op = spinand_select_op_variant(spinand,
 885                                                info->op_variants.update_cache);
 886                 spinand->op_templates.update_cache = op;
 887
 888                 return 0;
 889         }
 890
 891         return -ENOTSUPP;
 892 }
 893
 894 static int spinand_detect(struct spinand_device *spinand)
 895 {
 896         struct device *dev = &spinand->spimem->spi->dev;
 897         struct nand_device *nand = spinand_to_nand(spinand);
 898         int ret;
 899
 900         ret = spinand_reset_op(spinand);
 901         if (ret)
 902                 return ret;
 903
 904         ret = spinand_read_id_op(spinand, spinand->id.data);
 905         if (ret)
 906                 return ret;
 907
 908         spinand->id.len = SPINAND_MAX_ID_LEN;
 909
 910         ret = spinand_manufacturer_detect(spinand);
 911         if (ret) {
 912                 dev_err(dev, "unknown raw ID %*phN\n", SPINAND_MAX_ID_LEN,
 913                         spinand->id.data);
 914                 return ret;
 915         }
 916
 917         if (nand->memorg.ntargets > 1 && !spinand->select_target) {
 918                 dev_err(dev,
 919                         "SPI NANDs with more than one die must implement ->select_target()\n");
 920                 return -EINVAL;
 921         }
 922
 923         dev_info(&spinand->spimem->spi->dev,
 924                  "%s SPI NAND was found.\n", spinand->manufacturer->name);
 925         dev_info(&spinand->spimem->spi->dev,
 926                  "%llu MiB, block size: %zu KiB, page size: %zu, OOB size: %u\n",
 927                  nanddev_size(nand) >> 20, nanddev_eraseblock_size(nand) >> 10,
 928                  nanddev_page_size(nand), nanddev_per_page_oobsize(nand));
 929
 930         return 0;
 931 }
 932
 933 static int spinand_noecc_ooblayout_ecc(struct mtd_info *mtd, int section,
 934                                        struct mtd_oob_region *region)
 935 {
 936         return -ERANGE;
 937 }
 938
 939 static int spinand_noecc_ooblayout_free(struct mtd_info *mtd, int section,
 940                                         struct mtd_oob_region *region)
 941 {
 942         if (section)
 943                 return -ERANGE;
 944
 945         /* Reserve 2 bytes for the BBM. */
 946         region->offset = 2;
 947         region->length = 62;
 948
 949         return 0;
 950 }
 951
 952 static const struct mtd_ooblayout_ops spinand_noecc_ooblayout = {
 953         .ecc = spinand_noecc_ooblayout_ecc,
 954         .free = spinand_noecc_ooblayout_free,
 955 };
 956
 957 static int spinand_init(struct spinand_device *spinand)
 958 {
 959         struct device *dev = &spinand->spimem->spi->dev;
 960         struct mtd_info *mtd = spinand_to_mtd(spinand);
 961         struct nand_device *nand = mtd_to_nanddev(mtd);
 962         int ret, i;
 963
 964         /*
 965          * We need a scratch buffer because the spi_mem interface requires that
 966          * buf passed in spi_mem_op->data.buf be DMA-able.
 967          */
 968         spinand->scratchbuf = kzalloc(SPINAND_MAX_ID_LEN, GFP_KERNEL);
 969         if (!spinand->scratchbuf)
 970                 return -ENOMEM;
 971
 972         ret = spinand_detect(spinand);
 973         if (ret)
 974                 goto err_free_bufs;
 975
 976         /*
 977          * Use kzalloc() instead of devm_kzalloc() here, because some drivers
 978          * may use this buffer for DMA access.
 979          * Memory allocated by devm_ does not guarantee DMA-safe alignment.
 980          */
 981         spinand->databuf = kzalloc(nanddev_page_size(nand) +
 982                                nanddev_per_page_oobsize(nand),
 983                                GFP_KERNEL);
 984         if (!spinand->databuf) {
 985                 ret = -ENOMEM;
 986                 goto err_free_bufs;
 987         }
 988
 989         spinand->oobbuf = spinand->databuf + nanddev_page_size(nand);
 990
 991         ret = spinand_init_cfg_cache(spinand);
 992         if (ret)
 993                 goto err_free_bufs;
 994
 995         ret = spinand_init_quad_enable(spinand);
 996         if (ret)
 997                 goto err_free_bufs;
 998
 999         ret = spinand_upd_cfg(spinand, CFG_OTP_ENABLE, 0);
1000         if (ret)
1001                 goto err_free_bufs;
1002
1003         ret = spinand_manufacturer_init(spinand);
1004         if (ret) {
1005                 dev_err(dev,
1006                         "Failed to initialize the SPI NAND chip (err = %d)\n",
1007                         ret);
1008                 goto err_free_bufs;
1009         }
1010
1011         /* After power up, all blocks are locked, so unlock them here. */
1012         for (i = 0; i < nand->memorg.ntargets; i++) {
1013                 ret = spinand_select_target(spinand, i);
1014                 if (ret)
1015                         goto err_manuf_cleanup;
1016
1017                 ret = spinand_lock_block(spinand, BL_ALL_UNLOCKED);
1018                 if (ret)
1019                         goto err_manuf_cleanup;
1020         }
1021
1022         ret = nanddev_init(nand, &spinand_ops, THIS_MODULE);
1023         if (ret)
1024                 goto err_manuf_cleanup;
1025
1026         /*
1027          * Right now, we don't support ECC, so let the whole oob
1028          * area is available for user.
1029          */
1030         mtd->_read_oob = spinand_mtd_read;
1031         mtd->_write_oob = spinand_mtd_write;
1032         mtd->_block_isbad = spinand_mtd_block_isbad;
1033         mtd->_block_markbad = spinand_mtd_block_markbad;
1034         mtd->_block_isreserved = spinand_mtd_block_isreserved;
1035         mtd->_erase = spinand_mtd_erase;
1036
1037         if (spinand->eccinfo.ooblayout)
1038                 mtd_set_ooblayout(mtd, spinand->eccinfo.ooblayout);
1039         else
1040                 mtd_set_ooblayout(mtd, &spinand_noecc_ooblayout);
1041
1042         ret = mtd_ooblayout_count_freebytes(mtd);
1043         if (ret < 0)
1044                 goto err_cleanup_nanddev;
1045
1046         mtd->oobavail = ret;
1047
1048         /* Propagate ECC information to mtd_info */
1049         mtd->ecc_strength = nand->eccreq.strength;
1050         mtd->ecc_step_size = nand->eccreq.step_size;
1051
1052         return 0;
1053
1054 err_cleanup_nanddev:
1055         nanddev_cleanup(nand);
1056
1057 err_manuf_cleanup:
1058         spinand_manufacturer_cleanup(spinand);
1059
1060 err_free_bufs:
1061         kfree(spinand->databuf);
1062         kfree(spinand->scratchbuf);
1063         return ret;
1064 }
1065
1066 static void spinand_cleanup(struct spinand_device *spinand)
1067 {
1068         struct nand_device *nand = spinand_to_nand(spinand);
1069
1070         nanddev_cleanup(nand);
1071         spinand_manufacturer_cleanup(spinand);
1072         kfree(spinand->databuf);
1073         kfree(spinand->scratchbuf);
1074 }
1075
1076 static int spinand_probe(struct spi_mem *mem)
1077 {
1078         struct spinand_device *spinand;
1079         struct mtd_info *mtd;
1080         int ret;
1081
1082         spinand = devm_kzalloc(&mem->spi->dev, sizeof(*spinand),
1083                                GFP_KERNEL);
1084         if (!spinand)
1085                 return -ENOMEM;
1086
1087         spinand->spimem = mem;
1088         spi_mem_set_drvdata(mem, spinand);
1089         spinand_set_of_node(spinand, mem->spi->dev.of_node);
1090         mutex_init(&spinand->lock);
1091         mtd = spinand_to_mtd(spinand);
1092         mtd->dev.parent = &mem->spi->dev;
1093
1094         ret = spinand_init(spinand);
1095         if (ret)
1096                 return ret;
1097
1098         ret = mtd_device_register(mtd, NULL, 0);
1099         if (ret)
1100                 goto err_spinand_cleanup;
1101
1102         return 0;
1103
1104 err_spinand_cleanup:
1105         spinand_cleanup(spinand);
1106
1107         return ret;
1108 }
1109
1110 static int spinand_remove(struct spi_mem *mem)
1111 {
1112         struct spinand_device *spinand;
1113         struct mtd_info *mtd;
1114         int ret;
1115
1116         spinand = spi_mem_get_drvdata(mem);
1117         mtd = spinand_to_mtd(spinand);
1118
1119         ret = mtd_device_unregister(mtd);
1120         if (ret)
1121                 return ret;
1122
1123         spinand_cleanup(spinand);
1124
1125         return 0;
1126 }
1127
1128 static const struct spi_device_id spinand_ids[] = {
1129         { .name = "spi-nand" },
1130         { /* sentinel */ },
1131 };
1132
1133 #ifdef CONFIG_OF
1134 static const struct of_device_id spinand_of_ids[] = {
1135         { .compatible = "spi-nand" },
1136         { /* sentinel */ },
1137 };
1138 #endif
1139
1140 static struct spi_mem_driver spinand_drv = {
1141         .spidrv = {
1142                 .id_table = spinand_ids,
1143                 .driver = {
1144                         .name = "spi-nand",
1145                         .of_match_table = of_match_ptr(spinand_of_ids),
1146                 },
1147         },
1148         .probe = spinand_probe,
1149         .remove = spinand_remove,
1150 };
1151 module_spi_mem_driver(spinand_drv);
1152
1153 MODULE_DESCRIPTION("SPI NAND framework");
1154 MODULE_AUTHOR("Peter Pan<peterpandong@micron.com>");
1155 MODULE_LICENSE("GPL v2");