2 * Marvell 88E6xxx Switch hardware timestamping support
4 * Copyright (c) 2008 Marvell Semiconductor
6 * Copyright (c) 2017 National Instruments
7 * Erik Hons <erik.hons@ni.com>
8 * Brandon Streiff <brandon.streiff@ni.com>
9 * Dane Wagner <dane.wagner@ni.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
21 #include <linux/ptp_classify.h>
23 #define SKB_PTP_TYPE(__skb) (*(unsigned int *)((__skb)->cb))
25 static int mv88e6xxx_port_ptp_read(struct mv88e6xxx_chip
*chip
, int port
,
26 int addr
, u16
*data
, int len
)
28 if (!chip
->info
->ops
->avb_ops
->port_ptp_read
)
31 return chip
->info
->ops
->avb_ops
->port_ptp_read(chip
, port
, addr
,
35 static int mv88e6xxx_port_ptp_write(struct mv88e6xxx_chip
*chip
, int port
,
38 if (!chip
->info
->ops
->avb_ops
->port_ptp_write
)
41 return chip
->info
->ops
->avb_ops
->port_ptp_write(chip
, port
, addr
,
45 static int mv88e6xxx_ptp_write(struct mv88e6xxx_chip
*chip
, int addr
,
48 if (!chip
->info
->ops
->avb_ops
->ptp_write
)
51 return chip
->info
->ops
->avb_ops
->ptp_write(chip
, addr
, data
);
54 static int mv88e6xxx_ptp_read(struct mv88e6xxx_chip
*chip
, int addr
,
57 if (!chip
->info
->ops
->avb_ops
->ptp_read
)
60 return chip
->info
->ops
->avb_ops
->ptp_read(chip
, addr
, data
, 1);
63 /* TX_TSTAMP_TIMEOUT: This limits the time spent polling for a TX
64 * timestamp. When working properly, hardware will produce a timestamp
65 * within 1ms. Software may enounter delays due to MDIO contention, so
66 * the timeout is set accordingly.
68 #define TX_TSTAMP_TIMEOUT msecs_to_jiffies(40)
70 int mv88e6xxx_get_ts_info(struct dsa_switch
*ds
, int port
,
71 struct ethtool_ts_info
*info
)
73 const struct mv88e6xxx_ptp_ops
*ptp_ops
;
74 struct mv88e6xxx_chip
*chip
;
77 ptp_ops
= chip
->info
->ops
->ptp_ops
;
79 if (!chip
->info
->ptp_support
)
82 info
->so_timestamping
=
83 SOF_TIMESTAMPING_TX_HARDWARE
|
84 SOF_TIMESTAMPING_RX_HARDWARE
|
85 SOF_TIMESTAMPING_RAW_HARDWARE
;
86 info
->phc_index
= ptp_clock_index(chip
->ptp_clock
);
88 (1 << HWTSTAMP_TX_OFF
) |
89 (1 << HWTSTAMP_TX_ON
);
90 info
->rx_filters
= ptp_ops
->rx_filters
;
95 static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip
*chip
, int port
,
96 struct hwtstamp_config
*config
)
98 const struct mv88e6xxx_ptp_ops
*ptp_ops
= chip
->info
->ops
->ptp_ops
;
99 struct mv88e6xxx_port_hwtstamp
*ps
= &chip
->port_hwtstamp
[port
];
100 bool tstamp_enable
= false;
102 /* Prevent the TX/RX paths from trying to interact with the
103 * timestamp hardware while we reconfigure it.
105 clear_bit_unlock(MV88E6XXX_HWTSTAMP_ENABLED
, &ps
->state
);
107 /* reserved for future extensions */
111 switch (config
->tx_type
) {
112 case HWTSTAMP_TX_OFF
:
113 tstamp_enable
= false;
116 tstamp_enable
= true;
122 /* The switch supports timestamping both L2 and L4; one cannot be
123 * disabled independently of the other.
126 if (!(BIT(config
->rx_filter
) & ptp_ops
->rx_filters
)) {
127 config
->rx_filter
= HWTSTAMP_FILTER_NONE
;
128 dev_dbg(chip
->dev
, "Unsupported rx_filter %d\n",
133 switch (config
->rx_filter
) {
134 case HWTSTAMP_FILTER_NONE
:
135 tstamp_enable
= false;
137 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
138 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
139 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
140 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
141 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
142 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
143 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
144 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
145 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
146 config
->rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
148 case HWTSTAMP_FILTER_ALL
:
150 config
->rx_filter
= HWTSTAMP_FILTER_NONE
;
154 mutex_lock(&chip
->reg_lock
);
156 chip
->enable_count
+= 1;
157 if (chip
->enable_count
== 1 && ptp_ops
->global_enable
)
158 ptp_ops
->global_enable(chip
);
159 if (ptp_ops
->port_enable
)
160 ptp_ops
->port_enable(chip
, port
);
162 if (ptp_ops
->port_disable
)
163 ptp_ops
->port_disable(chip
, port
);
164 chip
->enable_count
-= 1;
165 if (chip
->enable_count
== 0 && ptp_ops
->global_disable
)
166 ptp_ops
->global_disable(chip
);
168 mutex_unlock(&chip
->reg_lock
);
170 /* Once hardware has been configured, enable timestamp checks
171 * in the RX/TX paths.
174 set_bit(MV88E6XXX_HWTSTAMP_ENABLED
, &ps
->state
);
179 int mv88e6xxx_port_hwtstamp_set(struct dsa_switch
*ds
, int port
,
182 struct mv88e6xxx_chip
*chip
= ds
->priv
;
183 struct mv88e6xxx_port_hwtstamp
*ps
= &chip
->port_hwtstamp
[port
];
184 struct hwtstamp_config config
;
187 if (!chip
->info
->ptp_support
)
190 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
193 err
= mv88e6xxx_set_hwtstamp_config(chip
, port
, &config
);
197 /* Save the chosen configuration to be returned later. */
198 memcpy(&ps
->tstamp_config
, &config
, sizeof(config
));
200 return copy_to_user(ifr
->ifr_data
, &config
, sizeof(config
)) ?
204 int mv88e6xxx_port_hwtstamp_get(struct dsa_switch
*ds
, int port
,
207 struct mv88e6xxx_chip
*chip
= ds
->priv
;
208 struct mv88e6xxx_port_hwtstamp
*ps
= &chip
->port_hwtstamp
[port
];
209 struct hwtstamp_config
*config
= &ps
->tstamp_config
;
211 if (!chip
->info
->ptp_support
)
214 return copy_to_user(ifr
->ifr_data
, config
, sizeof(*config
)) ?
218 /* Get the start of the PTP header in this skb */
219 static u8
*parse_ptp_header(struct sk_buff
*skb
, unsigned int type
)
221 u8
*data
= skb_mac_header(skb
);
222 unsigned int offset
= 0;
224 if (type
& PTP_CLASS_VLAN
)
227 switch (type
& PTP_CLASS_PMASK
) {
229 offset
+= ETH_HLEN
+ IPV4_HLEN(data
+ offset
) + UDP_HLEN
;
232 offset
+= ETH_HLEN
+ IP6_HLEN
+ UDP_HLEN
;
241 /* Ensure that the entire header is present in this packet. */
242 if (skb
->len
+ ETH_HLEN
< offset
+ 34)
245 return data
+ offset
;
248 /* Returns a pointer to the PTP header if the caller should time stamp,
249 * or NULL if the caller should not.
251 static u8
*mv88e6xxx_should_tstamp(struct mv88e6xxx_chip
*chip
, int port
,
252 struct sk_buff
*skb
, unsigned int type
)
254 struct mv88e6xxx_port_hwtstamp
*ps
= &chip
->port_hwtstamp
[port
];
257 if (!chip
->info
->ptp_support
)
260 hdr
= parse_ptp_header(skb
, type
);
264 if (!test_bit(MV88E6XXX_HWTSTAMP_ENABLED
, &ps
->state
))
270 static int mv88e6xxx_ts_valid(u16 status
)
272 if (!(status
& MV88E6XXX_PTP_TS_VALID
))
274 if (status
& MV88E6XXX_PTP_TS_STATUS_MASK
)
279 static int seq_match(struct sk_buff
*skb
, u16 ts_seqid
)
281 unsigned int type
= SKB_PTP_TYPE(skb
);
282 u8
*hdr
= parse_ptp_header(skb
, type
);
285 seqid
= (__be16
*)(hdr
+ OFF_PTP_SEQUENCE_ID
);
287 return ts_seqid
== ntohs(*seqid
);
290 static void mv88e6xxx_get_rxts(struct mv88e6xxx_chip
*chip
,
291 struct mv88e6xxx_port_hwtstamp
*ps
,
292 struct sk_buff
*skb
, u16 reg
,
293 struct sk_buff_head
*rxq
)
295 u16 buf
[4] = { 0 }, status
, seq_id
;
296 struct skb_shared_hwtstamps
*shwt
;
297 struct sk_buff_head received
;
298 u64 ns
, timelo
, timehi
;
302 /* The latched timestamp belongs to one of the received frames. */
303 __skb_queue_head_init(&received
);
304 spin_lock_irqsave(&rxq
->lock
, flags
);
305 skb_queue_splice_tail_init(rxq
, &received
);
306 spin_unlock_irqrestore(&rxq
->lock
, flags
);
308 mutex_lock(&chip
->reg_lock
);
309 err
= mv88e6xxx_port_ptp_read(chip
, ps
->port_id
,
310 reg
, buf
, ARRAY_SIZE(buf
));
311 mutex_unlock(&chip
->reg_lock
);
313 pr_err("failed to get the receive time stamp\n");
320 if (status
& MV88E6XXX_PTP_TS_VALID
) {
321 mutex_lock(&chip
->reg_lock
);
322 err
= mv88e6xxx_port_ptp_write(chip
, ps
->port_id
, reg
, 0);
323 mutex_unlock(&chip
->reg_lock
);
325 pr_err("failed to clear the receive status\n");
327 /* Since the device can only handle one time stamp at a time,
328 * we purge any extra frames from the queue.
330 for ( ; skb
; skb
= __skb_dequeue(&received
)) {
331 if (mv88e6xxx_ts_valid(status
) && seq_match(skb
, seq_id
)) {
332 ns
= timehi
<< 16 | timelo
;
334 mutex_lock(&chip
->reg_lock
);
335 ns
= timecounter_cyc2time(&chip
->tstamp_tc
, ns
);
336 mutex_unlock(&chip
->reg_lock
);
337 shwt
= skb_hwtstamps(skb
);
338 memset(shwt
, 0, sizeof(*shwt
));
339 shwt
->hwtstamp
= ns_to_ktime(ns
);
340 status
&= ~MV88E6XXX_PTP_TS_VALID
;
346 static void mv88e6xxx_rxtstamp_work(struct mv88e6xxx_chip
*chip
,
347 struct mv88e6xxx_port_hwtstamp
*ps
)
349 const struct mv88e6xxx_ptp_ops
*ptp_ops
= chip
->info
->ops
->ptp_ops
;
352 skb
= skb_dequeue(&ps
->rx_queue
);
355 mv88e6xxx_get_rxts(chip
, ps
, skb
, ptp_ops
->arr0_sts_reg
,
358 skb
= skb_dequeue(&ps
->rx_queue2
);
360 mv88e6xxx_get_rxts(chip
, ps
, skb
, ptp_ops
->arr1_sts_reg
,
364 static int is_pdelay_resp(u8
*msgtype
)
366 return (*msgtype
& 0xf) == 3;
369 bool mv88e6xxx_port_rxtstamp(struct dsa_switch
*ds
, int port
,
370 struct sk_buff
*skb
, unsigned int type
)
372 struct mv88e6xxx_port_hwtstamp
*ps
;
373 struct mv88e6xxx_chip
*chip
;
377 ps
= &chip
->port_hwtstamp
[port
];
379 if (ps
->tstamp_config
.rx_filter
!= HWTSTAMP_FILTER_PTP_V2_EVENT
)
382 hdr
= mv88e6xxx_should_tstamp(chip
, port
, skb
, type
);
386 SKB_PTP_TYPE(skb
) = type
;
388 if (is_pdelay_resp(hdr
))
389 skb_queue_tail(&ps
->rx_queue2
, skb
);
391 skb_queue_tail(&ps
->rx_queue
, skb
);
393 ptp_schedule_worker(chip
->ptp_clock
, 0);
398 static int mv88e6xxx_txtstamp_work(struct mv88e6xxx_chip
*chip
,
399 struct mv88e6xxx_port_hwtstamp
*ps
)
401 const struct mv88e6xxx_ptp_ops
*ptp_ops
= chip
->info
->ops
->ptp_ops
;
402 struct skb_shared_hwtstamps shhwtstamps
;
403 u16 departure_block
[4], status
;
404 struct sk_buff
*tmp_skb
;
412 mutex_lock(&chip
->reg_lock
);
413 err
= mv88e6xxx_port_ptp_read(chip
, ps
->port_id
,
414 ptp_ops
->dep_sts_reg
,
416 ARRAY_SIZE(departure_block
));
417 mutex_unlock(&chip
->reg_lock
);
420 goto free_and_clear_skb
;
422 if (!(departure_block
[0] & MV88E6XXX_PTP_TS_VALID
)) {
423 if (time_is_before_jiffies(ps
->tx_tstamp_start
+
424 TX_TSTAMP_TIMEOUT
)) {
425 dev_warn(chip
->dev
, "p%d: clearing tx timestamp hang\n",
427 goto free_and_clear_skb
;
429 /* The timestamp should be available quickly, while getting it
430 * is high priority and time bounded to only 10ms. A poll is
431 * warranted so restart the work.
436 /* We have the timestamp; go ahead and clear valid now */
437 mutex_lock(&chip
->reg_lock
);
438 mv88e6xxx_port_ptp_write(chip
, ps
->port_id
, ptp_ops
->dep_sts_reg
, 0);
439 mutex_unlock(&chip
->reg_lock
);
441 status
= departure_block
[0] & MV88E6XXX_PTP_TS_STATUS_MASK
;
442 if (status
!= MV88E6XXX_PTP_TS_STATUS_NORMAL
) {
443 dev_warn(chip
->dev
, "p%d: tx timestamp overrun\n", ps
->port_id
);
444 goto free_and_clear_skb
;
447 if (departure_block
[3] != ps
->tx_seq_id
) {
448 dev_warn(chip
->dev
, "p%d: unexpected seq. id\n", ps
->port_id
);
449 goto free_and_clear_skb
;
452 memset(&shhwtstamps
, 0, sizeof(shhwtstamps
));
453 time_raw
= ((u32
)departure_block
[2] << 16) | departure_block
[1];
454 mutex_lock(&chip
->reg_lock
);
455 ns
= timecounter_cyc2time(&chip
->tstamp_tc
, time_raw
);
456 mutex_unlock(&chip
->reg_lock
);
457 shhwtstamps
.hwtstamp
= ns_to_ktime(ns
);
460 "p%d: txtstamp %llx status 0x%04x skb ID 0x%04x hw ID 0x%04x\n",
461 ps
->port_id
, ktime_to_ns(shhwtstamps
.hwtstamp
),
462 departure_block
[0], ps
->tx_seq_id
, departure_block
[3]);
464 /* skb_complete_tx_timestamp() will free up the client to make
465 * another timestamp-able transmit. We have to be ready for it
466 * -- by clearing the ps->tx_skb "flag" -- beforehand.
469 tmp_skb
= ps
->tx_skb
;
471 clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS
, &ps
->state
);
472 skb_complete_tx_timestamp(tmp_skb
, &shhwtstamps
);
477 dev_kfree_skb_any(ps
->tx_skb
);
479 clear_bit_unlock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS
, &ps
->state
);
484 long mv88e6xxx_hwtstamp_work(struct ptp_clock_info
*ptp
)
486 struct mv88e6xxx_chip
*chip
= ptp_to_chip(ptp
);
487 struct dsa_switch
*ds
= chip
->ds
;
488 struct mv88e6xxx_port_hwtstamp
*ps
;
491 for (i
= 0; i
< ds
->num_ports
; i
++) {
492 if (!dsa_is_user_port(ds
, i
))
495 ps
= &chip
->port_hwtstamp
[i
];
496 if (test_bit(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS
, &ps
->state
))
497 restart
|= mv88e6xxx_txtstamp_work(chip
, ps
);
499 mv88e6xxx_rxtstamp_work(chip
, ps
);
502 return restart
? 1 : -1;
505 bool mv88e6xxx_port_txtstamp(struct dsa_switch
*ds
, int port
,
506 struct sk_buff
*clone
, unsigned int type
)
508 struct mv88e6xxx_chip
*chip
= ds
->priv
;
509 struct mv88e6xxx_port_hwtstamp
*ps
= &chip
->port_hwtstamp
[port
];
513 if (!(skb_shinfo(clone
)->tx_flags
& SKBTX_HW_TSTAMP
))
516 hdr
= mv88e6xxx_should_tstamp(chip
, port
, clone
, type
);
520 seq_ptr
= (__be16
*)(hdr
+ OFF_PTP_SEQUENCE_ID
);
522 if (test_and_set_bit_lock(MV88E6XXX_HWTSTAMP_TX_IN_PROGRESS
,
527 ps
->tx_tstamp_start
= jiffies
;
528 ps
->tx_seq_id
= be16_to_cpup(seq_ptr
);
530 ptp_schedule_worker(chip
->ptp_clock
, 0);
534 int mv88e6165_global_disable(struct mv88e6xxx_chip
*chip
)
539 err
= mv88e6xxx_ptp_read(chip
, MV88E6165_PTP_CFG
, &val
);
542 val
|= MV88E6165_PTP_CFG_DISABLE_PTP
;
544 return mv88e6xxx_ptp_write(chip
, MV88E6165_PTP_CFG
, val
);
547 int mv88e6165_global_enable(struct mv88e6xxx_chip
*chip
)
552 err
= mv88e6xxx_ptp_read(chip
, MV88E6165_PTP_CFG
, &val
);
556 val
&= ~(MV88E6165_PTP_CFG_DISABLE_PTP
| MV88E6165_PTP_CFG_TSPEC_MASK
);
558 return mv88e6xxx_ptp_write(chip
, MV88E6165_PTP_CFG
, val
);
561 int mv88e6352_hwtstamp_port_disable(struct mv88e6xxx_chip
*chip
, int port
)
563 return mv88e6xxx_port_ptp_write(chip
, port
, MV88E6XXX_PORT_PTP_CFG0
,
564 MV88E6XXX_PORT_PTP_CFG0_DISABLE_PTP
);
567 int mv88e6352_hwtstamp_port_enable(struct mv88e6xxx_chip
*chip
, int port
)
569 return mv88e6xxx_port_ptp_write(chip
, port
, MV88E6XXX_PORT_PTP_CFG0
,
570 MV88E6XXX_PORT_PTP_CFG0_DISABLE_TSPEC_MATCH
);
573 static int mv88e6xxx_hwtstamp_port_setup(struct mv88e6xxx_chip
*chip
, int port
)
575 const struct mv88e6xxx_ptp_ops
*ptp_ops
= chip
->info
->ops
->ptp_ops
;
576 struct mv88e6xxx_port_hwtstamp
*ps
= &chip
->port_hwtstamp
[port
];
580 skb_queue_head_init(&ps
->rx_queue
);
581 skb_queue_head_init(&ps
->rx_queue2
);
583 if (ptp_ops
->port_disable
)
584 return ptp_ops
->port_disable(chip
, port
);
589 int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip
*chip
)
591 const struct mv88e6xxx_ptp_ops
*ptp_ops
= chip
->info
->ops
->ptp_ops
;
595 /* Disable timestamping on all ports. */
596 for (i
= 0; i
< mv88e6xxx_num_ports(chip
); ++i
) {
597 err
= mv88e6xxx_hwtstamp_port_setup(chip
, i
);
602 /* Disable PTP globally */
603 if (ptp_ops
->global_disable
) {
604 err
= ptp_ops
->global_disable(chip
);
609 /* Set the ethertype of L2 PTP messages */
610 err
= mv88e6xxx_ptp_write(chip
, MV88E6XXX_PTP_GC_ETYPE
, ETH_P_1588
);
614 /* MV88E6XXX_PTP_MSG_TYPE is a mask of PTP message types to
615 * timestamp. This affects all ports that have timestamping enabled,
616 * but the timestamp config is per-port; thus we configure all events
617 * here and only support the HWTSTAMP_FILTER_*_EVENT filter types.
619 err
= mv88e6xxx_ptp_write(chip
, MV88E6XXX_PTP_MSGTYPE
,
620 MV88E6XXX_PTP_MSGTYPE_ALL_EVENT
);
624 /* Use ARRIVAL1 for peer delay response messages. */
625 err
= mv88e6xxx_ptp_write(chip
, MV88E6XXX_PTP_TS_ARRIVAL_PTR
,
626 MV88E6XXX_PTP_MSGTYPE_PDLAY_RES
);
630 /* 88E6341 devices default to timestamping at the PHY, but this has
631 * a hardware issue that results in unreliable timestamps. Force
632 * these devices to timestamp at the MAC.
634 if (chip
->info
->family
== MV88E6XXX_FAMILY_6341
) {
635 u16 val
= MV88E6341_PTP_CFG_UPDATE
|
636 MV88E6341_PTP_CFG_MODE_IDX
|
637 MV88E6341_PTP_CFG_MODE_TS_AT_MAC
;
638 err
= mv88e6xxx_ptp_write(chip
, MV88E6341_PTP_CFG
, val
);
646 void mv88e6xxx_hwtstamp_free(struct mv88e6xxx_chip
*chip
)